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产品型号SN74CB3Q3253PWR的概述

芯片SN74CB3Q3253PWR的概述 SN74CB3Q3253PWR是德州仪器（Texas Instruments）公司所研发的一款高性能双向多路复用开关芯片。作为一款特定用途的集成电路，其主要应用于高速信号切换和选择功能，广泛应用于通信、计算机及存储设备领域。该芯片的设计旨在提供低功耗、高速开关特性及良好的信号完整性，满足现代电子设备日益增长的需求。芯片SN74CB3Q3253PWR的详细参数 SN74CB3Q3253PWR具备多种关键技术参数，确保其在不同应用场景下的优秀性能。以下是该芯片的一些重要参数： - 工作电压范围：该芯片支持1.65V至3.6V的电源电压，具有良好的兼容性，能够在多种电压环境下稳定运行。 - Crosstalk（串扰）：该器件的串扰非常低，具体数值通常小于-30dB，确保信号之间的干扰降至最低。 - 开关时间：典型的开关时间在1.5ns左右，使芯片能...

产品型号SN74CB3Q3253PWR的Datasheet PDF文件预览

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

High-Bandwidth Data Path

(Up To 500 MHz

Data and Control Inputs Provide

Undershoot Clamp Diodes

†)

5-V Tolerant I/Os with Device Powered-Up

or Powered-Down

Low Power Consumption

= 0.6 mA Typical)

Low and Flat ON-State Resistance (r

)

Operating Range From 2.3 V to 3.6 V

Characteristics Over Operating Range

(r = 4 Ω Typical)

Data I/Os Support 0 to 5-V Signaling Levels

(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

Rail-to-Rail Switching on Data I/O Ports

− 0- to 5-V Switching With 3.3-V V

Control Inputs Can be Driven by TTL or

5-V/3.3-V CMOS Outputs

− 0- to 3.3-V Switching With 2.5-V V

Supports Partial-Power-Down Mode

off

Bidirectional Data Flow, With Near-Zero

Propagation Delay

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model

(A114-B, Class II)

= 3.5 pF Typical)

io(OFF)

Fast Switching Frequency

(f = 20 MHz Max)

− 1000-V Charged-Device Model (C101)

†

For additional information regarding the performance

characteristics of the CB3Q family, refer to the TI

application report, CBT-C, CB3T, and CB3Q

Signal-Switch Families, literature number SCDA008.

Supports Both Digital and Analog

Applications: USB Interface, Differential

Signal Interface Bus Isolation,

Low-Distortion Signal Gating

DBQ, DGV, OR PW PACKAGE

(TOP VIEW)

RGY PACKAGE

(TOP VIEW)

1OE

15 2OE

14 S0

1B4

1B3

1B2

1B1

2OE

2B4

2B3

2B2

2B1

13 2B4

12 2B3

1B4

1B3

1B2

1B1

2B2

2B1

GND

description/ordering information

The SN74CB3Q3253 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage

of the pass transistor, providing a low and flat ON-state resistance (r ). The low and flat ON-state resistance

allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The

device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data

bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3253 provides an optimized

interface solution ideally suited for broadband communications, networking, and data-intensive computing

systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

description/ordering information (continued)

The SN74CB3Q3253 is organized as two 1-of-4 multiplexers/demultiplexers with separate output-enable

(1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. When

OE is low, the associated multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing

bidirectional data flow between ports. When OE is high, the associated multiplexer/demultiplexer is disabled,

and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I . The I circuitry prevents damaging

off

current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

QFN − RGY

SSOP (QSOP) − DBQ Tape and reel SN74CB3Q3253DBQR

Tube SN74CB3Q3253PW

Tape and reel SN74CB3Q3253RGYR

BU253

−40°C to 85°C

TSSOP − PW

BU253

Tape and reel SN74CB3Q3253PWR

Tape and reel SN74CB3Q3253DGVR

TVSOP − DGV

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

FUNCTION TABLE

(each multiplexer/demultiplexer)

INPUTS

INPUT/OUTPUT

FUNCTION

A port = B1 port

A port = B2 port

A port = B3 port

A port = B4 port

Disconnect

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

logic diagram (positive logic)

1B1

1B2

1B3

1B4

2B1

2B2

2B3

2B4

1OE

2OE

simplified schematic, each FET switch (SW)

Charge

Pump

†

EN is the internal enable signal applied to the switch.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Control input voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Switch I/O voltage range, V (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Control input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

I/O

IK IN

I/O port clamp current, I

(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

I/OK I/O

ON-state switch current, I (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA

Continuous current through V

I/O

or GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

Package thermal impedance, θ (see Note 5): DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W

(see Note 5): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W

(see Note 5): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W

(see Note 6): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to ground unless otherwise specified.

2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3. V and V are used to denote specific conditions for V

I/O

4. I and I are used to denote specific conditions for I .

I/O

5. The package thermal impedance is calculated in accordance with JESD 51-7.

6. The package thermal impedance is calculated in accordance with JESD 51-5.

recommended operating conditions (see Note 7)

MIN

2.3

1.7

MAX

3.6

5.5

0.7

0.8

5.5

UNIT

Supply voltage

= 2.3 V to 2.7 V

= 2.7 V to 3.6 V

= 2.3 V to 2.7 V

= 2.7 V to 3.6 V

High-level control input voltage

Low-level control input voltage

Data input/output voltage

I/O

Operating free-air temperature

−40

°C

NOTE 7: All unused control inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN TYP

MAX

−1.8

UNIT

= 3.6 V,

I = −18 mA

Control inputs

= 0 to 5.5 V

µA

= 0 to 5.5 V,

Switch OFF,

‡

= 3.6 V,

= 0,

µA

V = 0,

= V

or GND

V = 0

= 0 to 5.5 V,

= 0,

off

I/O

= 3.6 V,

= V

or GND

0.6

Switch ON or OFF,

∆I

Control inputs

= 3.6 V,

One input at 3 V,

Other inputs at V

or GND

0.16

0.05

3.5

A and B ports open, OE input

S input

0.15

0.04

2.5

Per control

input

mA/

MHz

CCD

Control input switching at 50% duty cycle

Control inputs

A port

= 3.3 V,

= 5.5 V, 3.3 V, or 0

Switch OFF,

= V or GND,

= 3.3 V,

I/O

= 5.5 V, 3.3 V, or 0

3.5

4.5

Switch OFF,

= V

io(OFF)

B port

= 3.3 V,

or GND,

Switch ON,

= V

= 3.3 V,

= 2.3 V,

io(ON)

V = 0,

= 30 mA

4.5

3.5

TYP at V

= 2.5 V

V = 1.7 V,

= −15 mA

= 30 mA

= −15 mA

Ω

V = 0,

= 3 V

V = 2.4 V,

†

‡

and I refer to control inputs. V , V , I , and I refer to data pins.

All typical values are at V

= 3.3 V (unless otherwise noted), T = 25°C.

For I/O ports, the parameter I

includes the input leakage current.

This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V

or GND.

This parameter specifies the dynamic power-supply current associated with the operating frequency of a single control input (see Figure 2).

Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by

the lower of the voltages of the two (A or B) terminals.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figure 3)

= 2.5 V

= 3.3 V

0.2 V

0.3 V

FROM

(INPUT)

(OUTPUT)

PARAMETER

UNIT

MIN MAX

or f

OE or S

A or B

B or A

0.12

6.7

0.18

5.9

MHz

A or B

1.5

pd(s)

6.7

5.9

A or B

6.7

5.9

6.1

dis

A or B

6.1

Maximum switching frequency for control input (V > V , V = 5 V, R ≥ 1 MΩ, C = 0).

The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance,

when driven by an ideal voltage source (zero output impedance).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

TYPICAL r

= 3.3 V

= 25°C ,

= −15 mA

0.0

0.5

1.0

1.5

2.0

2.5

V − V

3.0

3.5

4.0

4.5

5.0

Figure 1. Typical r vs V , V

= 3.3 V and I = −15 mA

TYPICAL I

CONTROL INPUT SWITCHING FREQUENCY

= 3.3 V

= 25°C

A and B ports Open

One S Switching

One OE Switching

OE or S Switching Frequency − MHz

Figure 2. Typical I

vs OE or S Switching Frequency, V

= 3.3 V

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SCDS145A − OCTOBER 2003 − REVISED NOVEMBER 2003

PARAMETER MEASUREMENT INFORMATION

Input Generator

50 Ω

TEST CIRCUIT

DUT

2 × V

Open

Input Generator

50 Ω

GND

50 Ω

(see Note A)

∆

TEST

2.5 V 0.2 V

3.3 V 0.3 V

Open

500 Ω

or GND

30 pF

50 pF

pd(s)

2.5 V 0.2 V

3.3 V 0.3 V

2 × V

500 Ω

GND

30 pF

50 pF

0.15 V

0.3 V

PLZ PZL

2.5 V 0.2 V

3.3 V 0.3 V

GND

500 Ω

30 pF

50 pF

0.15 V

0.3 V

PHZ PZH

Output

Control

)

0 V

PLZ

PZL

Output

Waveform 1

Output

Control

S1 at 2 × V

(see Note B)

+ V

∆

)

0 V

PZH

PHZ

PLH

PHL

Output

Waveform 2

S1 at GND

− V

∆

Output

0 V

(see Note B)

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES (t

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

)

pd(s)

C includes probe and jig capacitance.

NOTES: A.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.

D. The outputs are measured one at a time with one transition per measurement.

and t

are the same as t

PLZ

PZL

PLH

PHZ

PZH

PHL

dis

. The tpd propagation delay is the calculated RC time constant of the typical ON-state

pd(s)

resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).

H. All parameters and waveforms are not applicable to all devices.

Figure 3. Test Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

25-Feb-2005

PACKAGING INFORMATION

Orderable Device

SN74CB3Q3253DBQR

SN74CB3Q3253DGVR

SN74CB3Q3253PW

SN74CB3Q3253PWR

SN74CB3Q3253RGYR

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SSOP/

QSOP

DBQ

2500

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

TVSOP

TSSOP

QFN

DGV

Pb-Free

(RoHS)

CU NIPDAU Level-1-250C-UNLIM

Pb-Free

(RoHS)

2000

Pb-Free

(RoHS)

RGY

1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

MECHANICAL DATA

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000

DGV (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,23

0,13

0,07

0,40

0,16 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

0°–ā8°

0,75

0,50

Seating Plane

0,08

0,15

0,05

1,20 MAX

PINS **

DIM

A MAX

A MIN

3,70

3,50

3,70

3,50

5,10

4,90

5,10

4,90

7,90

7,70

9,80

9,60

11,40

11,20

4073251/E 08/00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.

D. Falls within JEDEC: 24/48 Pins – MO-153

14/16/20/56 Pins – MO-194

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

0,10

0,65

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

0°–8°

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

in which TI products or services are used. Information published by TI regarding third-party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

Applications

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Amplifiers

amplifier.ti.com

www.ti.com/audio

Data Converters

dataconverter.ti.com

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www.ti.com/automotive

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dsp.ti.com

Broadband

Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

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SN74CB3Q3253PWR产品参数

型号:	SN74CB3Q3253PWR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	TSSOP
包装说明：	TSSOP-16
针数：	16
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	6 weeks
风险等级：	0.92
Is Samacsys：	N
系列：	CB3Q/3VH/3C/2B
JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e4
长度：	5 mm
逻辑集成电路类型：	MULTIPLEXER AND DEMUX/DECODER
湿度敏感等级：	1
功能数量：	2
输入次数：	1
输出次数：	4
端子数量：	16
最高工作温度：	85 °C
最低工作温度：	-40 °C
输出特性：	3-STATE
输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：	TR
峰值回流温度（摄氏度）：	260
电源：	2.5/3.3 V
最大电源电流（ICC）：	1.5 mA
Prop。Delay @ Nom-Sup：	0.12 ns
传播延迟（tpd）：	0.18 ns
认证状态：	Not Qualified
座面最大高度：	1.2 mm
子类别：	Other Logic ICs
最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	4.4 mm
Base Number Matches：	1

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