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产品型号SN74LVC126ARGYRG4的概述

芯片 SN74LVC126ARGYRG4 概述 SN74LVC126ARGYRG4 是一款来自德州仪器(Texas Instruments)的四路非反相缓冲器/驱动器,设计为适应低电压逻辑电平的应用。这种芯片主要用于高速数据处理和信号放大等场景,因其具有较强的抗噪性能,能够有效减少信号传输过程中的失真。 该芯片采用低电压 CMOS 技术,支持的电源电压范围为 1.65V 到 5.5V,特别适合在现代数字电路中应用,例如通信、消费电子及工业自动化设备。其输入和输出的逻辑电平可以兼容多种 CMOS 和 TTL 逻辑电平,为设计者提供了极大灵活性。 芯片详细参数 1. 电源电压范围:1.65V - 5.5V 2. 输入高电平(VIH):达到逻辑高状态所需的电压,通常为 0.7×VCC。 3. 输入低电平(VIL):达到逻辑低状态所需的电压,通常为 0.3×VCC。 4. 输出高电平(VOH)...

产品型号SN74LVC126ARGYRG4的Datasheet PDF文件预览

SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS339QMARCH 1994REVISED JULY 2005  
FEATURES  
D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Specified From –40°C to 85°C and  
From –40°C to 125°C  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1OE  
1A  
V
CC  
4OE  
4A  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.7 ns at 3.3 V  
1Y  
2OE  
2A  
4Y  
Typical VOLP (Output Ground Bounce)  
< 0.8 V at VCC = 3.3 V, TA = 25°C  
3OE  
3A  
2Y  
Typical VOHV (Output VOH Undershoot)  
> 2 V at VCC = 3.3 V, TA = 25°C  
8
GND  
3Y  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
RGY PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
1
14  
1A  
13 4OE  
2
3
4
5
6
12  
11  
10  
9
1Y  
2OE  
2A  
4A  
DESCRIPTION/ORDERING INFORMATION  
4Y  
3OE  
3A  
This quadruple bus buffer gate is designed for 1.65-V  
to 3.6-V VCC operation.  
2Y  
The SN74LVC126A features independent line drivers  
with 3-state outputs. Each output is disabled when  
the associated output-enable (OE) input is low.  
7
8
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC126ARGYR  
SN74LVC126AD  
TOP-SIDE MARKING  
–40°C to 85°C  
QFN – RGY  
SOIC – D  
Reel of 1000  
LC126A  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LVC126ADR  
LVC126A  
SN74LVC126ADT  
SOP – NS  
SN74LVC126ANSR  
SN74LVC126ADBR  
SN74LVC126APW  
LVC126A  
LC126A  
–40°C to 125°C  
SSOP – DB  
TSSOP – PW  
TVSOP – DGV  
Reel of 2000  
Reel of 250  
Reel of 2000  
SN74LVC126APWR  
SN74LVC126APWT  
SN74LVC126ADGVR  
LC126A  
LC126A  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1994–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS339QMARCH 1994REVISED JULY 2005  
FUNCTION TABLE  
(EACH BUFFER)  
INPUTS  
OUTPUT  
Y
OE  
H
A
H
L
H
L
H
L
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)  
1
10  
1OE  
3OE  
2
3
6
9
8
1A  
1Y  
2Y  
3A  
3Y  
4Y  
4
13  
12  
2OE  
4OE  
4A  
5
11  
2A  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.5  
–0.5  
MAX  
UNIT  
V
VCC  
VI  
Supply voltage range  
Input voltage range(2)  
6.5  
6.5  
V
VO  
IIK  
Output voltage range(2)(3)  
–0.5 VCC + 0.5  
V
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
86  
mA  
mA  
mA  
mA  
IOK  
IO  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCC or GND  
D package(4)  
DB package(4)  
DGV package(4)  
NS package(4)  
PW package(4)  
RGY package(5)  
96  
127  
76  
θJA  
Package thermal impedance  
°C/W  
113  
47  
Tstg  
Ptot  
Storage temperature range  
Power dissipation  
–65  
150  
500  
°C  
TA = –40°C to 125°C(6)(7)  
mW  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The value of VCC is provided in the recommended operating conditions table.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
(5) The package thermal impedance is calculated in accordance with JESD 51-5.  
(6) For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.  
(7) For the DB, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.  
2
SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS339QMARCH 1994REVISED JULY 2005  
Recommended Operating Conditions(1)  
TA = 25°C  
MIN  
–40 TO 85°C  
–40 TO 125°C  
UNIT  
MAX  
MIN  
MAX  
MIN  
MAX  
Operating  
1.65  
1.5  
3.6  
1.65  
3.6  
1.65  
3.6  
VCC  
Supply voltage  
V
Data retention only  
1.5  
1.5  
VCC = 1.65 V to 1.95 V 0.65 × VCC  
0.65 × VCC  
0.65 × VCC  
High-level  
input voltage  
VIH  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
1.7  
2
1.7  
2
1.7  
2
V
V
0.35 × VCC  
0.35 × VCC  
0.35 × VCC  
Low-level  
input voltage  
VIL  
0.7  
0.8  
5.5  
VCC  
–4  
0.7  
0.8  
5.5  
VCC  
–4  
0.7  
0.8  
5.5  
VCC  
–4  
VI  
Input voltage  
0
0
0
0
0
0
V
V
VO  
Output voltage  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 2.7 V  
VCC = 3 V  
–8  
–8  
–8  
High-level  
output current  
IOH  
mA  
–12  
–24  
4
–12  
–24  
4
–12  
–24  
4
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 2.7 V  
VCC = 3 V  
8
8
8
Low-level  
output current  
IOL  
mA  
12  
12  
12  
24  
24  
24  
t/v Input transition rise or fall rate  
10  
10  
10  
ns/V  
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
Electrical Characteristics  
over recommended operating free-air temperature range (unless otherwise noted)  
TA = 25°C  
–40 TO 85°C  
–40 TO 125°C  
PARAMETER  
TEST CONDITIONS  
IOH = –100 µA  
VCC  
UNIT  
MIN TYP MAX  
MIN  
VCC – 0.2  
1.2  
MAX  
MIN MAX  
1.65 V to 3.6 V  
1.65 V  
2.3 V  
VCC – 0.2  
VCC – 0.3  
1.05  
1.55  
2.05  
2.25  
2
IOH = –4 mA  
IOH = –8 mA  
1.29  
1.9  
2.2  
2.4  
2.3  
1.7  
VOH  
V
2.7 V  
2.2  
IOH = –12 mA  
3 V  
2.4  
IOH = –24 mA  
IOL = 100 µA  
IOL = 4 mA  
3 V  
2.2  
1.65 V to 3.6 V  
1.65 V  
2.3 V  
0.1  
0.24  
0.3  
0.4  
0.55  
±1  
0.2  
0.45  
0.7  
0.3  
0.6  
VOL  
IOL = 8 mA  
0.75  
0.6  
V
IOL = 12 mA  
2.7 V  
0.4  
IOL = 24 mA  
3 V  
0.55  
±5  
0.8  
II  
VI = 5.5 V or GND  
VO = VCC or GND  
VI = VCC or GND,  
3.6 V  
±20  
±20  
40  
µA  
µA  
µA  
IOZ  
ICC  
3.6 V  
±1  
±10  
10  
IO = 0  
3.6 V  
1
One input at VCC – 0.6 V,  
Other inputs at VCC or GND  
ICC  
2.7 V to 3.6 V  
500  
500  
5000  
µA  
Ci  
VI = VCC or GND  
VO = VCC or GND  
3.3 V  
3.3 V  
4.5  
7
pF  
pF  
Co  
3
SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS339QMARCH 1994REVISED JULY 2005  
Switching Characteristics  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
TA = 25°C  
TYP MAX  
–40 TO 85°C  
–40 TO 125°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
VCC  
UNIT  
MIN  
1
MIN  
1
MAX  
MIN  
1
MAX  
11.3  
9.3  
6.5  
6
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
2.7 V  
4.2  
2.7  
2.9  
2.5  
4.8  
2.8  
3.1  
2.5  
9.3  
6.7  
5
9.8  
7.2  
5.2  
4.7  
10  
1
1
1
tpd  
A
Y
Y
Y
ns  
ns  
1
1
1
3.3 V ± 0.3 V  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
2.7 V  
1
4.5  
9.5  
7.8  
6.1  
5.5  
1
1
1
1
1
11.5  
10.4  
8
1
1
8.3  
6.3  
5.7  
12.6  
8.7  
6.7  
6
1
ten  
OE  
OE  
1
1
1
3.3 V ± 0.3 V  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
2.7 V  
1
1
1
7.5  
14.1  
10.8  
8.5  
7.5  
1.5  
1
4.4 12.1  
1
1
1
2.7  
2.7  
2.3  
8.2  
6.5  
5.8  
1
1
tdis  
ns  
ns  
1
1
1
3.3 V ± 0.3 V  
3.3 V ± 0.3 V  
1.3  
1.3  
1.3  
tsk(o)  
1
Operating Characteristics  
TA = 25°C  
TEST  
CONDITIONS  
PARAMETER  
VCC  
TYP  
UNIT  
1.8 V  
2.5 V  
3.3 V  
1.8 V  
2.5 V  
3.3 V  
20  
21  
22  
2
Outputs enabled  
Outputs disabled  
Cpd  
Power dissipation capacitance per gate  
f = 10 MHz  
pF  
3
4
4
SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS339QMARCH 1994REVISED JULY 2005  
PARAMETER MEASUREMENT INFORMATION  
V
LOAD  
S1  
Open  
R
L
From Output  
Under Test  
TEST  
/t  
S1  
GND  
t
t
Open  
PLH PHL  
C
L
t
/t  
V
R
L
PLZ PZL  
LOAD  
GND  
(see Note A)  
/t  
PHZ PZH  
LOAD CIRCUIT  
INPUTS  
V
CC  
V
M
V
LOAD  
C
L
R
L
V
V
I
t /t  
r f  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
2.7 V  
V
V
2.7 V  
2.7 V  
2 ns  
2 ns  
2.5 ns  
2.5 ns  
V
/2  
/2  
2 × V  
2 × V  
6 V  
6 V  
30 pF  
30 pF  
50 pF  
50 pF  
1 k  
500 Ω  
500 Ω  
500 Ω  
0.15 V  
0.15 V  
0.3 V  
CC  
CC  
CC  
V
CC  
CC  
CC  
1.5 V  
1.5 V  
3.3 V ± 0.3 V  
0.3 V  
V
I
Timing Input  
Data Input  
V
M
0 V  
t
w
t
t
h
su  
V
I
V
I
Input  
V
M
V
M
V
M
V
M
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
I
V
I
Output  
Control  
V
M
V
M
Input  
V
M
V
M
0 V  
0 V  
t
t
t
t
t
PHL  
PZL  
PLZ  
PLH  
Output  
Waveform 1  
V
V
OH  
V
V
/2  
LOAD  
V
V
V
M
M
Output  
V
V
M
S1 at V  
LOAD  
V
OL  
+ V  
OL  
(see Note B)  
OL  
t
PHL  
PLH  
t
t
PHZ  
PZH  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
V
OH  
V
- V  
V
M
OH  
M
Output  
M
0 V  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 .  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
.
PLZ  
PZL  
PLH  
PHZ  
are the same as t  
PZH  
en  
are the same as t .  
PHL pd  
H. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
5
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SN74LVC126AD  
ACTIVE  
SOIC  
D
14  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126ADBLE  
SN74LVC126ADBR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
14  
14  
TBD  
Call TI  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126ADBRE4  
SN74LVC126ADE4  
SN74LVC126ADGVR  
SN74LVC126ADGVRE4  
SN74LVC126ADR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SOIC  
DB  
D
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TVSOP  
TVSOP  
SOIC  
DGV  
DGV  
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126ADRE4  
SN74LVC126ADT  
SOIC  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126ADTE4  
SN74LVC126ANSR  
SN74LVC126ANSRE4  
SN74LVC126APW  
SOIC  
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
NS  
NS  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126APWE4  
SN74LVC126APWG4  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126APWLE  
SN74LVC126APWR  
OBSOLETE TSSOP  
PW  
PW  
14  
14  
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
QFN  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126APWRE4  
SN74LVC126APWRG4  
SN74LVC126APWT  
PW  
PW  
14  
14  
14  
14  
14  
14  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
PW  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74LVC126APWTE4  
SN74LVC126ARGYR  
SN74LVC126ARGYRG4  
PW  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
RGY  
RGY  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR  
no Sb/Br)  
QFN  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
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Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
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Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
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www.ti.com/automotive  
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dsp.ti.com  
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www.ti.com/broadband  
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interface.ti.com  
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www.ti.com/wireless  
Mailing Address:  
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Post Office Box 655303 Dallas, Texas 75265  
Copyright 2006, Texas Instruments Incorporated  
配单直通车
SN74LVC126ARGYRG4产品参数
型号:SN74LVC126ARGYRG4
Brand Name:Texas Instruments
是否无铅:不含铅
是否Rohs认证:符合
生命周期:Active
IHS 制造商:TEXAS INSTRUMENTS INC
零件包装代码:QFN
包装说明:QFN-14
针数:14
Reach Compliance Code:compliant
HTS代码:8542.39.00.01
Factory Lead Time:8 weeks
风险等级:5.37
Is Samacsys:N
控制类型:ENABLE HIGH
计数方向:UNIDIRECTIONAL
系列:LVC/LCX/Z
JESD-30 代码:S-PQCC-N14
JESD-609代码:e4
长度:3.5 mm
负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A
湿度敏感等级:2
位数:1
功能数量:4
端口数量:2
端子数量:14
最高工作温度:125 °C
最低工作温度:-40 °C
输出特性:3-STATE
输出极性:TRUE
封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN
封装等效代码:LCC14/18,.14SQ,20
封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TR
峰值回流温度(摄氏度):260
电源:3.3 V
最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:4.7 ns
传播延迟(tpd):9.8 ns
认证状态:Not Qualified
座面最大高度:1 mm
子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V
表面贴装:YES
技术:CMOS
温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD
端子节距:0.5 mm
端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.5 mm
Base Number Matches:1
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