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产品型号TC1302BDTVMF的Datasheet PDF文件预览

TC1302A/B  
Low Quiescent Current Dual Output LDO  
Features  
Description  
• Dual Output LDO:  
The TC1302A/B combines two Low Dropout (LDO)  
regulators into a single 8-pin MSOP or DFN package.  
Both regulator outputs feature low dropout voltage,  
104 mV @ 300 mA for VOUT1, 150 mV @ 150 mA for  
VOUT2, low quiescent current consumption, 58 µA each  
and a typical regulation accuracy of 0.5%. Several  
fixed-output voltage combinations are available. A  
reference bypass pin is available to further reduce  
output noise and improve the power supply rejection  
ratio of both LDOs.  
- VOUT1 = 1.5V to 3.3V @ 300 mA  
- VOUT2 = 1.5V to 3.3V @ 150 mA  
• Output Voltage (See Table 8-1)  
• Low Dropout Voltage:  
- VOUT1 = 104 mV @ 300 mA Typical  
- VOUT2 = 150 mV @ 150 mA Typical  
• Low Supply Current: 116 µA Typical  
TC1302A/B with both output voltages available  
The TC1302A/B is stable over all line and load  
conditions, with a minimum of 1 µF of ceramic output  
capacitance, and utilizes a unique compensation  
scheme to provide fast dynamic response to sudden  
line voltage and load current changes.  
• Reference Bypass Input for Low-Noise Operation  
• Both Output Voltages Stable with a Minimum of  
1 µF Ceramic Output Capacitor  
• Separate VOUT1 and VOUT2 SHDN pins  
(TC1302B)  
Additional features include an overcurrent limit and  
overtemperature protection that combine to provide a  
robust design for all load fault conditions.  
• Power-Saving Shutdown Mode of Operation  
• Wake-up from SHDN: 5.3 µs. Typical  
• Small 8-pin DFN or MSOP Package Options  
• Operating Junction Temperature Range:  
- -40°C to +125°C  
Package Types  
• Overtemperature and Overcurrent Protection  
8-Pin DFN/MSOP  
TC1302A  
Applications  
DFN8  
DFN8  
MSOP8  
• Cellular/GSM/PHS Phones  
• Battery-Operated Systems  
• Hand-Held Medical Instruments  
• Portable Computers/PDAs  
• Linear Post-Regulators for SMPS  
• Pagers  
NC  
NC  
1
2
3
4
8
7
6
5
NC  
1
2
3
4
8 NC  
V
V
V
V
7
OUT1  
IN  
OUT1  
IN  
V
V
GND  
GND  
6
5
OUT2  
OUT2  
Bypass  
SHDN2  
Bypass  
SHDN2  
TC1302B  
MSOP8  
Related Literature  
1
2
3
4
8
7
6
5
• AN765, “Using Microchip’s Micropower LDOs”,  
DS00765, Microchip Technology Inc., 2002  
1
2
3
4
SHDN1  
NC  
8
7
NC  
SHDN1  
V
V
V
V
IN  
OUT1  
OUT1  
IN  
• AN766, “Pin-Compatible CMOS Upgrades to  
BiPolar LDOs”, DS00766,  
Microchip Technology Inc., 2002  
6 V  
5
V
GND  
GND  
OUT2  
OUT2  
Bypass  
SHDN2  
Bypass  
SHDN2  
• AN792, “A Method to Determine How Much  
Power a SOT23 Can Dissipate in an Application”,  
DS00792, Microchip Technology Inc., 2001  
© 2005 Microchip Technology Inc.  
DS21333B-page 1  
TC1302A/B  
Functional Block Diagrams  
TC1302B  
LDO #1  
TC1302A  
VOUT1  
VIN  
VIN  
VOUT1  
LDO #1  
300 mA  
SHDN1  
300 mA  
VOUT2  
VOUT2  
LDO #2  
150 mA  
LDO #2  
150 mA  
SHDN2  
SHDN2  
GND  
Bandgap  
Reference  
1.2V  
GND  
Bandgap  
Reference  
1.2V  
Bypass  
Bypass  
Typical Application Circuits  
TC1302A  
8
7
6
1
2
3
NC  
NC  
VIN  
BATTERY  
2.8V @ 300 mA  
VOUT1  
GND  
COUT1  
CIN  
1 µF  
2.6V @ 150 mA  
1 µF Ceramic  
X5R  
VOUT2  
COUT2  
1 µF Ceramic  
X5R  
4
5
Bypass SHDN2  
2.7V  
to  
(Note)  
CBYPASS  
4.2V  
10 nF Ceramic  
ON/OFF Control VOUT2  
ON/OFF Control VOUT1  
TC1302B  
1
2
3
8
7
6
NC  
SHDN1  
VIN  
BATTERY  
2.8V @ 300 mA  
VOUT1  
COUT1  
CIN  
1 µF  
2.6V @ 150 mA  
COUT2  
1 µF Ceramic  
X5R  
VOUT2  
GND  
4
5
Bypass SHDN2  
2.7V  
to  
4.2V  
1 µF Ceramic  
X5R  
ON/OFF Control VOUT2  
Note: CBYPASS is optional  
DS21333B-page 2  
© 2005 Microchip Technology Inc.  
TC1302A/B  
† Notice: Stresses above those listed under “Maximum Rat-  
ings” may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at  
those or any other conditions above those indicated in the  
operational listings of this specification is not implied. Expo-  
sure to maximum rating conditions for extended periods may  
affect device reliability.  
1.0  
ELECTRICAL  
CHARACTERISTICS  
Absolute Maximum Ratings †  
V
...................................................................................6.5V  
DD  
Maximum Voltage on Any Pin ...... (V – 0.3) to (V + 0.3)V  
SS  
IN  
Power Dissipation ..........................Internally Limited (Note 7)  
Storage temperature .....................................-65°C to +150°C  
Maximum Junction Temperature, T ...........................+150°C  
J
Continuous Operating Temperature Range ..-40°C to +125°C  
ESD protection on all pins, HBM, MM..................... 4 kV, 400V  
DC CHARACTERISTICS  
Electrical Specifications: Unless otherwise noted, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF,  
IN  
R
OUT1  
OUT2  
IN  
C
= C  
= 1 µF, C  
= 10 nF, SHDN > V , T = +25°C.  
OUT1  
OUT2  
BYPASS IH A  
Boldface type specifications apply for junction temperatures of -40°C to +125°C.  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Input Operating Voltage  
Maximum Output Current  
Maximum Output Current  
Output Voltage Tolerance  
V
2.7  
300  
150  
6.0  
V
Note 1  
IN  
I
I
mA  
mA  
%
V
V
= 2.7V to 6.0V (Note 1)  
= 2.7V to 6.0V (Note 1)  
OUT1Max  
OUT2Max  
IN  
IN  
V
V
– 2.5 V ±0.5  
V + 2.5  
R
Note 2  
OUT  
R
R
(V  
and V  
)
OUT1  
OUT2  
Temperature Coefficient  
TCV  
-1  
25  
0.02  
0.1  
0.2  
+1  
ppm/°C Note 3  
OUT  
(V  
and V  
)
OUT1  
OUT2  
Line Regulation  
(V and V  
ΔV  
/ΔV  
%/V  
%
(V + 1V) V 6V  
OUT  
IN  
R
IN  
)
OUT1  
OUT2  
Load Regulation, V  
2.5V  
ΔV  
/
/
I
I
= 0.1 mA to I  
, (Note 4)  
, (Note 4)  
OUT  
OUT  
OUT  
OUTX  
OUTMax  
(V  
and V  
)
V
OUT1  
OUT2  
OUT  
Load Regulation, V  
(V and V  
< 2.5V  
ΔV  
-1.5  
0.1  
+1.5  
%
= 0.1 mA to I  
OUT  
OUT  
OUTX  
OUTMax  
)
OUT2  
V
OUT1  
Thermal Regulation  
Dropout Voltage (Note 6)  
ΔV  
/ΔP  
0.04  
%/W  
Note 5  
OUT  
D
V
V
> 2.7V  
> 2.6V  
V
V
– V  
– V  
104  
150  
180  
250  
mV  
mV  
I
I
= 300 mA  
= 150 mA  
OUT1  
OUT2  
IN  
IN  
OUT  
OUT1  
OUT  
OUT2  
Supply Current  
TC1302A  
I
103  
114  
180  
180  
µA  
µA  
SHDN2 = V , I  
= I  
= 0 mA  
OUT2  
IN(A)  
IN(B)  
IN OUT1  
TC1302B  
I
SHDN1 = SHDN2 = V ,  
IN  
I
= I  
= 0 mA  
OUT1  
OUT2  
Note 1: The minimum V has to meet two conditions: V 2.7V and V V + V  
.
IN  
IN  
IN  
R
DROPOUT  
2:  
V
is defined as the higher of the two regulator nominal output voltages (V  
or V  
).  
R
OUT1  
OUT2  
6
3: TCV  
= ((V  
- V  
) * 10 )/(V  
* ΔT).  
OUT  
OUTmax  
OUTmin  
OUT  
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested  
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating  
effects are covered by the thermal regulation specification.  
5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,  
excluding load or line regulation effects. Specifications are for a current pulse equal to I  
at V = 6V for t = 10 msec.  
IN  
LMAX  
6: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its  
value measured at a 1V differential.  
7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power  
A
J
JA  
dissipation causes the device to initiate thermal shutdown.  
© 2005 Microchip Technology Inc.  
DS21333B-page 3  
TC1302A/B  
DC CHARACTERISTICS (Continued)  
Electrical Specifications: Unless otherwise noted, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF,  
IN  
R
OUT1  
OUT2  
IN  
C
= C  
= 1 µF, C  
= 10 nF, SHDN > V , T = +25°C.  
OUT1  
OUT2  
BYPASS IH A  
Boldface type specifications apply for junction temperatures of -40°C to +125°C.  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Shutdown Supply Current  
TC1302A  
I
I
58  
90  
µA  
SHDN2 = GND  
IN_SHDNA  
Shutdown Supply Current  
TC1302B  
0.1  
58  
1
µA  
dB  
SHDN1 = SHDN2 = GND  
f 100 Hz, I = I = 50 mA,  
OUT2  
IN_SHDNB  
Power Supply Rejection Ratio  
PSRR  
OUT1  
C
= 0 µF  
IN  
½
Output Noise  
eN  
830  
nV/(Hz)  
f 1 kHz, I  
= I  
= 50 mA,  
OUT1  
OUT2  
C
= 0 µF  
IN  
Output Short Circuit Current (Average)  
V
V
I
I
45  
200  
140  
15  
20  
mA  
mA  
R
R
1Ω  
OUT1  
OUT2  
OUTsc1  
OUTsc2  
LOAD1  
LOAD2  
1Ω  
SHDN Input High Threshold  
SHDN Input Low Threshold  
Wake Up Time (From SHDN  
V
%V  
%V  
V
V
V
= 2.7V to 6.0V  
= 2.7V to 6.0V  
IH  
IN  
IN  
IN  
IN  
IN  
V
IL  
t
5.3  
µs  
µs  
°C  
°C  
= 5V, I  
= I  
= I  
= I  
= 30 mA,  
= 50 mA,  
= 100 µA  
WK  
OUT1  
OUT2  
OUT2  
OUT2  
mode), (V  
)
See Figure 5-1  
OUT2  
Settling Time (From SHDN mode),  
(V  
t
50  
150  
10  
V
IN  
= 5V, I  
S
OUT1  
)
See Figure 5-2  
OUT2  
Thermal Shutdown Die  
Temperature  
T
V
= 5V, I  
SD  
IN  
IN  
OUT1  
Thermal Shutdown Hysteresis  
T
HYS  
V
= 5V  
Note 1: The minimum V has to meet two conditions: V 2.7V and V V + V .  
DROPOUT  
IN  
IN  
IN  
R
2:  
V
is defined as the higher of the two regulator nominal output voltages (V  
or V  
).  
R
OUT1  
OUT2  
6
3: TCV  
= ((V  
- V  
) * 10 )/(V  
* ΔT).  
OUT  
OUTmax  
OUTmin  
OUT  
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested  
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating  
effects are covered by the thermal regulation specification.  
5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,  
excluding load or line regulation effects. Specifications are for a current pulse equal to I  
at V = 6V for t = 10 msec.  
IN  
LMAX  
6: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its  
value measured at a 1V differential.  
7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air (i.e., T , T , θ ). Exceeding the maximum allowable power  
A
J
JA  
dissipation causes the device to initiate thermal shutdown.  
TEMPERATURE SPECIFICATIONS  
Electrical Specifications: Unless otherwise indicated, all limits are specified for: V = +2.7V to +6.0V.  
IN  
Parameters  
Temperature Ranges  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Operating Junction Temperature Range  
Storage Temperature Range  
T
-40  
-65  
+125  
+150  
+150  
°C  
°C  
°C  
Steady State  
Transient  
A
T
A
Maximum Junction Temperature  
Thermal Package Resistances  
Thermal Resistance, MSOP8  
Thermal Resistance, DFN8  
T
J
θ
θ
208  
41  
°C/W Typical 4-Layer Board  
JA  
JA  
°C/W Typical 4-Layer Board with Vias  
DS21333B-page 4  
© 2005 Microchip Technology Inc.  
TC1302A/B  
2.0  
TYPICAL PERFORMANCE CURVES  
Note:  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
Note: Unless otherwise indicated, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF, C  
C
= 1 µF (X5R or X7R),  
IN  
R
OUT1  
OUT2  
IN  
OUT1 = OUT2  
C
= 0 pF, SHDN1 = SHDN2 > V , T = +25°C.  
BYPASS  
IH  
A
350  
3.00  
2.90  
2.80  
2.70  
2.60  
TJ = +25°C  
IOUT1 = 100 mA  
IOUT2 = 50 mA  
TJ = +25°C  
TC1302B  
I
OUT1 = IOUT2 = 0 µA  
300  
250  
200  
150  
100  
50  
VOUT1 Active  
VOUT1  
VOUT2 Active  
VOUT2 SHDN  
VOUT2  
0
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0  
Input Voltage (V)  
2.7  
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7  
Input Voltage (V)  
6
FIGURE 2-1:  
Quiescent Current vs. Input  
FIGURE 2-4:  
Output Voltage vs. Input  
Voltage.  
Voltage.  
2.90  
2.85  
2.80  
2.75  
2.70  
2.65  
2.60  
2.55  
2.50  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
VOUT1  
ON  
VOUT2  
OFF  
TJ = +25°C  
IOUT1 = 300 mA  
IOUT2 = 100 mA  
2.7  
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7  
Input Voltage (V)  
6
2.7  
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7  
Input Voltage (V)  
6
FIGURE 2-2:  
SHDN Voltage Threshold  
FIGURE 2-5:  
Output Voltage vs. Input  
vs. Input Voltage.  
Voltage.  
140  
140.0  
TC1302B  
VIN = 4.2V  
OUT1 = IOUT2 = 0 µA  
VOUT1 Active  
VR1 = 2.8V  
R2 = 2.6V  
OUT2 = 100 µA  
130  
120  
110  
100  
90  
VOUT2 Active  
I
V
I
120.0  
100.0  
80.0  
60.0  
40.0  
20.0  
0.0  
TJ = +125°C  
TJ = +25°C  
VOUT2 SHDN  
TJ = - 40°C  
80  
70  
60  
50  
40  
0
50  
100  
150  
200  
250  
300  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
I
OUT1 (mA)  
Junction Temperature (°C)  
FIGURE 2-3:  
Junction Temperature.  
Quiescent Current vs.  
FIGURE 2-6:  
Current (VOUT1).  
Dropout Voltage vs. Output  
© 2005 Microchip Technology Inc.  
DS21333B-page 5  
TC1302A/B  
Note: Unless otherwise indicated, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF, C  
C
= 1 µF (X5R or X7R),  
IN  
R
OUT1  
OUT2  
IN  
OUT1 = OUT2  
C
= 0 pF, SHDN1 = SHDN2 > V , T = +25°C.  
BYPASS  
IH  
A
0.40  
0.30  
0.20  
0.10  
0.00  
-0.10  
140  
VR1 = 2.8V  
VR2 = 2.6V  
IOUT2 = 100 µA  
VOUT2  
IOUT2 = 0.1 mA to 150 mA  
IOUT1 = 0.1 mA to 300 mA  
IOUT1 = 300 mA  
120  
100  
80  
60  
40  
20  
0
VOUT1  
IOUT1 = 100 mA  
IOUT1 = 50 mA  
VR1 = 2.8V  
-0.20  
VR2 = 2.6V  
-0.30  
-0.40  
VIN = 4.2  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Junction Temperature (125°C)  
Junction Temperature (°C)  
FIGURE 2-7:  
Dropout Voltage vs.  
FIGURE 2-10:  
VOUT1 and VOUT2 Load  
Junction Temperature (VOUT1).  
Regulation vs. Junction Temperature.  
180  
0.045  
VIN = 3.8V to 6.0V  
VR1 = 2.8V  
VR2 = 2.6V  
160  
0.040  
0.035  
0.030  
0.025  
0.020  
0.015  
0.010  
0.005  
0.000  
VR1 = 2.8V, IOUT1 = 100 µA  
R2 = 2.6V, IOUT2 = 100 µA  
TJ = +125°C  
TJ = +25°C  
TJ = - 40°C  
V
140  
I
OUT1 = 100 µA  
VOUT2  
120  
100  
80  
60  
40  
20  
0
VOUT1  
0
30  
60  
90  
120  
150  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Junction Temperature (°C)  
IOUT2 (mA)  
FIGURE 2-8:  
Dropout Voltage vs. Output  
FIGURE 2-11:  
VOUT1 and VOUT2 Line  
Current (VOUT2).  
Regulation vs. Junction Temperature.  
180  
2.832  
VIN = 4.2V  
VR1 = 2.8V  
IOUT2 = 150 mA  
160  
2.828  
V
R2 = 2.6V, IOUT2 = 100 µA  
IOUT1 = 300 mA  
140  
VR1 = 2.8V  
R2 = 2.6V  
IOUT1 = 100 µA  
V
IOUT1 = 100 mA  
120  
2.824  
2.820  
2.816  
2.812  
2.808  
100  
80  
IOUT2 = 50 mA  
IOUT2 = 10 mA  
60  
IOUT1 = 100 µA  
40  
20  
0
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Junction Temperature (°C)  
Junction Temperature (°C)  
FIGURE 2-9:  
Dropout Voltage vs.  
FIGURE 2-12:  
VOUT1 vs. Junction  
Junction Temperature (VOUT2).  
Temperature.  
DS21333B-page 6  
© 2005 Microchip Technology Inc.  
TC1302A/B  
Note: Unless otherwise indicated, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF, C  
C
= 1 µF (X5R or X7R),  
IN  
R
OUT1  
OUT2  
IN  
OUT1 = OUT2  
C
= 0 pF, SHDN1 = SHDN2 > V , T = +25°C.  
BYPASS  
IH A  
2.856  
VR1 = 2.8V, IOUT1 = 300 mA  
VR2 = 2.6V, IOUT2 = 100 µA  
2.848  
2.840  
2.832  
2.824  
2.816  
2.808  
VIN = 3.0V  
VIN = 4.2V  
VIN = 6.0V  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Junction Temperature (°C)  
FIGURE 2-13:  
VOUT1 vs. Junction  
FIGURE 2-16:  
Power Supply Rejection  
Temperature.  
Ratio vs. Frequency (without bypass capacitor).  
2.645  
2.640  
2.635  
2.630  
2.625  
2.620  
2.615  
IOUT2 = 100 µA  
IOUT2 = 50 mA  
IOUT2 = 150 mA  
VIN = 4.2V  
R1 = 2.8V, IOUT1 = 100 µA  
VR2 = 2.6V  
V
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Junction Temperature (°C)  
FIGURE 2-14:  
VOUT2 vs. Junction  
FIGURE 2-17:  
Power Supply Rejection  
Temperature.  
Ratio vs. Frequency (with bypass capacitor).  
2.644  
10  
VIN = 3.0V  
VIN = 6.0V  
VR1 = 2.8V, IOUT1 = 100 µA  
VR2 = 2.6V, IOUT2 = 150 mA  
VOUT2  
2.640  
2.636  
2.632  
2.628  
2.624  
VIN = 4.2V  
1
VOUT1  
VIN = 4.2V  
V
R1 = 2.8V  
R2=2.6V  
V
0.1  
I
OUT1 = 150 mA  
IOUT2 100 mA  
BYPASS = 0 nF  
=
C
0.01  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
0.01  
0.1  
1
10  
100  
1000  
Junction Temperature (°C)  
Frequency (KHz)  
FIGURE 2-15:  
VOUT2 vs. Junction  
FIGURE 2-18:  
VOUT1 and VOUT2 Noise vs.  
Temperature.  
Frequency (without bypass capacitor).  
© 2005 Microchip Technology Inc.  
DS21333B-page 7  
TC1302A/B  
Note: Unless otherwise indicated, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF, C  
C
= 1 µF (X5R or X7R),  
IN  
R
OUT1  
OUT2  
IN  
OUT1 = OUT2  
C
= 0 pF, SHDN1 = SHDN2 > V , T = +25°C.  
BYPASS  
IH  
A
10  
1
VOUT1  
VOUT2  
VIN = 4.2V  
0.1  
VR1 = 2.8V  
R2=2.6V  
V
I
OUT1 = 150 mA  
IOUT2 100 mA  
BYPASS = 10 nF  
0.01  
=
C
0.001  
0.01  
0.1  
1
10  
100  
1000  
Frequency (KHz)  
FIGURE 2-19:  
VOUT1 and VOUT2 Noise vs.  
FIGURE 2-22:  
VOUT1 and VOUT2 Power-up  
Frequency (with bypass capacitor).  
from Input Voltage TC1302B.  
FIGURE 2-20:  
VOUT1 and VOUT2 Power-up  
FIGURE 2-23:  
Dynamic Line Response.  
from Shutdown TC1302B.  
FIGURE 2-24:  
VOUT1  
300 mA Dynamic Load Step  
FIGURE 2-21:  
Shutdown Input TC1302A.  
VOUT2 Power-up from  
.
DS21333B-page 8  
© 2005 Microchip Technology Inc.  
TC1302A/B  
Note: Unless otherwise indicated, V = V +1V, I  
= I  
= 100 µA, C = 4.7 µF, C  
C
= 1 µF (X5R or X7R),  
IN  
R
OUT1  
OUT2  
IN  
OUT1 = OUT2  
C
= 0 pF, SHDN1 = SHDN2 > V , T = +25°C.  
BYPASS  
IH A  
FIGURE 2-25:  
VOUT2  
150 mA Dynamic Load Step  
.
© 2005 Microchip Technology Inc.  
DS21333B-page 9  
TC1302A/B  
3.0  
TC1302A PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
Pin No.  
TC1302A PIN FUNCTION TABLE  
Name  
Function  
1
2
3
4
NC  
No connect.  
VOUT1  
GND  
Regulated output voltage #1, capable of 300 mA.  
Circuit ground pin.  
Bypass  
Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce  
output noise and improve PSRR performance.  
5
6
7
8
SHDN2  
VOUT2  
VIN  
Output #2 shutdown control input.  
Regulated output voltage #2, capable of 150 mA.  
Unregulated input voltage pin.  
No connect.  
NC  
3.1  
Regulated Output Voltage #1  
(V  
3.4  
Output Voltage #2 Shutdown  
(SHDN2)  
)
OUT1  
Connect VOUT1 to the positive side of the VOUT1  
capacitor and load. Capable of 300 mA maximum  
output current. VOUT1 output is available when VIN is  
available; there is no pin to turn it OFF. See TC1302B  
if ON/OFF control of VOUT1 is desired.  
ON/OFF control is performed by connecting SHDN2 to  
its proper level. When the input of this pin is connected  
to a voltage less than 15% of VIN, VOUT2 will be OFF. If  
this pin is connected to a voltage that is greater than  
45% of VIN, VOUT2 will be turned ON.  
3.2  
Circuit Ground Pin (GND)  
3.5  
Regulated Output Voltage #2  
(V  
)
OUT2  
Connect GND to the negative side of the input and  
output capacitor. Only the LDO internal circuitry bias  
current flows out of this pin (200 µA maximum).  
Connect VOUT2 to the positive side of the VOUT2  
capacitor and load. This pin is capable of a maximum  
output current of 150 mA. VOUT2 can be turned ON and  
OFF using SHDN2.  
3.3  
Reference Bypass Input  
By connecting an external 10 nF capacitor (typical) to  
the Bypass Input, both outputs (VOUT1 and VOUT2) will  
have less noise and improved Power Supply Ripple  
Rejection (PSRR) performance. The LDO output  
voltage start-up time will increase with the addition of  
an external bypass capacitor. By leaving this pin  
unconnected, the start-up time will be minimized.  
3.6  
Unregulated Input Voltage Pin  
(V )  
IN  
Connect the unregulated input voltage source to VIN. If  
the input voltage source is located more than several  
inches away or is a battery, a typical input capacitance  
of 1 µF to 4.7 µF is recommended.  
DS21333B-page 10  
© 2005 Microchip Technology Inc.  
TC1302A/B  
4.0  
TC1302B PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 4-1.  
TABLE 4-1:  
Pin No.  
TC1302B PIN FUNCTION TABLE  
Name  
Function  
1
2
3
4
NC  
No connect.  
VOUT1  
GND  
Regulated output voltage #1, capable of 300 mA.  
Circuit ground pin.  
Bypass  
Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce  
output noise and improve PSRR performance.  
5
6
7
8
SHDN2  
VOUT2  
VIN  
Output #2 shutdown control input.  
Regulated output voltage #2, capable of 150 mA.  
Unregulated Input voltage pin.  
SHDN1  
Output #1 shutdown control input.  
4.1  
Regulated Output Voltage #1  
(V  
4.5  
Regulated Output Voltage #2  
(V  
)
)
OUT2  
OUT1  
Connect VOUT1 to the positive side of the VOUT1  
capacitor and load. Capable of 300 mA maximum  
output current. For the TC1302B, VOUT1 can be turned  
ON and OFF using the SHDN1 input pin.  
Connect VOUT2 to the positive side of the VOUT2  
capacitor and load. This pin is capable of a maximum  
output current of 150 mA. VOUT2 can be turned ON and  
OFF using SHDN2.  
4.2  
Circuit Ground Pin (GND)  
4.6  
Unregulated Input Voltage Pin  
(V )  
IN  
Connect GND to the negative side of the input and  
output capacitor. Only the LDO internal circuitry bias  
current flows out of this pin (200 µA maximum).  
Connect the unregulated input voltage source to VIN. If  
the input voltage source is located more than several  
inches away, or is a battery, a typical minimum input  
capacitance of 1 µF and 4.7 µF is recommended.  
4.3  
Reference Bypass Input  
By connecting an external 10 nF capacitor (typical) to  
the bypass input, both outputs (VOUT1 and VOUT2) will  
have less noise and improved Power Supply Ripple  
Rejection (PSRR) performance. The LDO output  
voltage startup time will increase with the addition of an  
external bypass capacitor. By leaving this pin  
unconnected, the startup time will be minimized.  
4.7  
Output Voltage #1 Shutdown  
(SHDN1)  
ON/OFF control is performed by connecting SNDN1 to  
its proper level. When this pin is connected to a voltage  
less than 15% of VIN, VOUT1 will be OFF. If this pin is  
connected to a voltage that is greater than 45% of VIN,  
VOUT1 will be turned ON.  
4.4  
Output Voltage #2 Shutdown  
(SHDN2)  
ON/OFF control is performed by connecting SHDN2 to  
its proper level. When this pin is connected to a voltage  
less than 15% of VIN, VOUT2 will be OFF. If this pin is  
connected to a voltage that is greater than 45% of VIN,  
VOUT2 will be turned ON.  
© 2005 Microchip Technology Inc.  
DS21333B-page 11  
TC1302A/B  
5.5  
Output Capacitor  
5.0  
5.1  
DETAILED DESCRIPTION  
A minimum output capacitance of 1 µF for each of the  
TC1302A/B LDO outputs is necessary for stability.  
Ceramic capacitors are recommended because of their  
size, cost and environmental robustness qualities.  
Tantalum or aluminum electrolytic capacitors can be  
used on the LDO outputs as well. The Equivalent  
Series Resistance (ESR) requirements on the  
electrolytic output capacitor’s are between 0 and 2  
ohms. The output capacitor should be located as close  
to the LDO output as is practical. Ceramic materials,  
X7R and X5R, have low temperature coefficients and  
are well within the acceptable ESR range required. A  
typical 1 uF X5R 0805 capacitor has an ESR of 50 milli-  
ohms. Larger LDO output capacitors can be used with  
the TC1302A/B to improve dynamic performance and  
power supply ripple rejection performance. A maximum  
of 10 µF is recommended. Aluminum electrolytic  
capacitors are not recommended for low temperature  
applications of < -25 °C.  
Device Overview  
The TC1302A/B is a combination device consisting of  
one 300 mA LDO regulator with a fixed output voltage  
VOUT1 (1.5V – 3.3V) and one 150 mA LDO regulator  
with a fixed output voltage VOUT2 (1.5V – 3.3V).  
For the TC1302A, the 300 mA output (VOUT1) is always  
present, independent of the level of SHDN2. The  
150 mA output (VOUT2) can be turned ON/OFF by  
controlling the level of SHDN2.  
For the TC1302B, VOUT1 and VOUT2 each have  
independent shutdown input pins (SHDN1 and  
SHDN2) to control their respective outputs.  
5.2  
LDO Output #1  
LDO output #1 is rated for 300 mA of output current.  
The typical dropout voltage for VOUT1 = 104 mV @  
300 mA. A 1 µF (minimum) output capacitor is needed  
for stability and should be located as close to the VOUT1  
pin and ground as possible.  
5.6  
Bypass Input  
The Bypass pin is connected to the internal LDO  
reference. By adding capacitance to this pin, the LDO  
ripple rejection, input voltage transient response and  
output noise performance are all increased. A typical  
bypass capacitor between 470 pF to 10 nF is  
recommended. Larger bypass capacitors can be used,  
but result in a longer time period for the LDO outputs to  
reach their rated output voltage when started from  
SHDN or VIN.  
5.3  
LDO Output #2  
LDO output #2 is rated for 150 mA of output current.  
The typical dropout voltage for VOUT2 = 150 mV. A 1 µF  
(minimum) capacitor is needed for stability and should  
be located as close to the VOUT2 pin and ground as  
possible.  
5.4  
Input Capacitor  
Low input source impedance is necessary for the two  
LDO outputs to operate properly. When operating from  
batteries, or in applications with long lead length  
(> 10 inches) between the input source and the LDO,  
some input capacitance is recommended. A minimum  
of 1.0 µF to 4.7 µF is recommended for most  
applications. When using large capacitors on the LDO  
outputs, larger capacitance is recommended on the  
LDO input. The capacitor should be placed as close to  
the input of the LDO as is practical. Larger input  
capacitors will help reduce the input impedance and  
further reduce any high-frequency noise on the input  
and output of the LDO.  
5.7  
GND  
For the optimal noise and PSRR performance, the  
GND pin of the TC1302A/B should be tied to a quiet  
circuit ground. For applications that have switching or  
noisy inputs, tie the GND pin to the return of the output  
capacitor. Ground planes help lower inductance and  
voltage spikes caused by fast transient load currents  
and are recommended for applications that are  
subjected to fast load transients.  
5.8  
SHDN1/SHDN2 Operation  
The TC1302A SHDN2 pin is used to turn VOUT2 ON  
and OFF. A logic-high level on SHDN2 will enable the  
VOUT2 output, while a logic-low on the SHDN2 pin will  
disable the VOUT2 output. For the TC1302A, VOUT1 is  
not affected by SHDN2 and will be enabled as long as  
the input voltage is present.  
The TC1302B SHDN1 and SHDN2 pins are used to  
turn VOUT1 and VOUT2 ON and OFF. They operate  
independent of each other.  
DS21333B-page 12  
© 2005 Microchip Technology Inc.  
TC1302A/B  
5.9  
TC1302A SHDN2 Timing  
5.11 Device Protection  
VOUT1 will rise independent of the level of SHDN2 for  
the TC1302A. Figure 5-1 is used to define the wake-up  
time from shutdown (tWK) and the settling time (tS). The  
wake-up time is dependant upon the frequency of  
operation. The faster the SHDN pin is pulsed, the  
shorter the wake-up time will be.  
5.11.1 OVERCURRENT LIMIT  
In the event of a faulted output load, the maximum  
current the LDO output will permit to flow is limited  
internally for each of the TC1302A/B outputs. The peak  
current limit for VOUT1 is typically 1.1A, while the peak  
current limit for VOUT2 is typically 0.5A. During short-  
circuit operation, the average current is limited to  
200 mA for VOUT1 and 140 mA for VOUT2  
.
VIN  
5.11.2  
OVERTEMPERATURE  
PROTECTION  
ts  
twk  
If the internal power dissipation within the TC1302A/B  
is excessive due to a faulted load or higher-than-  
specified line voltage, an internal temperature-sensing  
element will prevent the junction temperature from  
exceeding approximately 150°C. If the junction  
temperature does reach 150°C, both outputs will be  
disabled until the junction temperature cools to  
approximately 140°C and the device resumes normal  
operation. If the internal power dissipation continues to  
be excessive, the device will again shut off.  
SHDN2  
VOUT1  
VOUT2  
FIGURE 5-1:  
TC1302A Timing.  
5.10 TC1302B SHDN1/SHDN2 Timing  
For the TC1302B, the SHDN1 input pin is used to  
control VOUT1. The SHDN2 input pin is used to control  
VOUT2, independent of the logic input on SHDN1.  
VIN  
ts  
twk  
SHDN1  
VOUT1  
SHDN2  
VOUT2  
FIGURE 5-2:  
TC1302B Timing.  
© 2005 Microchip Technology Inc.  
DS21333B-page 13  
TC1302A/B  
EQUATION 6-1:  
6.0  
APPLICATION CIRCUITS/  
ISSUES  
PLDO = (VIN(MAX)) VOUT(MIN)) × IOUT(MAX))  
6.1  
Typical Application  
PLDO  
= LDO Pass device internal power  
dissipation  
The TC1302A/B is used for applications that require  
the integration of two LDOs.  
VIN(MAX) = Maximum input voltage  
OUT(MIN)= LDO minimum output voltage  
V
TC1302A  
In addition to the LDO pass element power dissipation,  
there is power dissipation within the TC1302A/B as a  
result of quiescent or ground current. The power  
dissipation, as a result of the ground current, can be  
calculated using the following equation.  
8
7
6
1
2
3
NC  
V
NC  
2.8V @ 300 mA  
BATTERY  
V
IN  
OUT1  
1.8V  
@ 150 mA  
C
C
OUT1  
IN  
V
1 µF  
GND  
OUT2  
1 µF Ceramic  
X5R  
4
5
2.7V  
to  
4.2V  
SHDN2  
Bypass  
C
OUT2  
C
bypass  
1 µF Ceramic  
X5R  
10 nF Ceramic  
EQUATION 6-2:  
ON/OFF Control V  
OUT2  
PI(GND) = VIN(MAX) × IVIN  
ON/OFF Control V  
8
OUT1  
PI(GND) = Total current in ground pin.  
VIN(MAX)= Maximum input voltage.  
TC1302B  
SHDN1  
1
NC  
V
IVIN  
= Current flowing in the VIN pin with  
no output current on either LDO output.  
BATTERY  
2.8V @ 300 mA  
2
3
4
7
6
V
IN  
OUT1  
1.8V  
@ 150 mA  
C
C
OUT1  
IN  
V
1 µF  
GND  
OUT2  
1 µF Ceramic  
X5R  
5
The total power dissipated within the TC1302A/B is the  
sum of the power dissipated in both of the LDOs and  
the P(IGND) term. Because of the CMOS construction,  
the typical IGND for the TC1302A/B is 116 µA.  
Operating at a maximum of 4.2V results in a power  
dissipation of 0.5 milliWatts. For most applications, this  
is small compared to the LDO pass device power dissi-  
pation and can be neglected.  
SHDN2  
2.7V  
to  
4.2V  
Bypass  
C
OUT2  
1 µF Ceramic  
X5R  
ON/OFF Control V  
OUT2  
FIGURE 6-1:  
TC1302A/B.  
Typical Application Circuit  
The maximum continuous operating junction  
temperature specified for the TC1302A/B is +125°C. To  
estimate the internal junction temperature of the  
TC1302A/B, the total internal power dissipation is  
multiplied by the thermal resistance from junction to  
ambient (RθJA) of the device. The thermal resistance  
from junction-to-ambient for the 3x3DFN8 pin package  
is estimated at 41° C/W.  
6.1.1  
APPLICATION INPUT CONDITIONS  
Package Type = 3x3DFN8  
Input Voltage Range = 2.7V to 4.2V  
VIN maximum = 4.2V  
VIN typical = 3.6V  
VOUT1 = 300 mA maximum  
VOUT2 = 150 mA maximum  
EQUATION 6-3:  
6.2  
6.2.1  
Power Calculations  
TJ(MAX) = PTOTAL × RθJA + TAMAX  
POWER DISSIPATION  
TJ(MAX) = Maximum continuous junction  
temperature.  
PTOTAL = Total device power dissipation.  
= Thermal resistance from junction  
to ambient.  
TAMAX = Maximum Ambient Temperature.  
The internal power dissipation within the TC1302A/B is  
a function of input voltage, output voltage, output  
current and quiescent current. The following equation  
can be used to calculate the internal power dissipation  
for each LDO.  
RθJA  
DS21333B-page 14  
© 2005 Microchip Technology Inc.  
TC1302A/B  
The maximum power dissipation capability for a  
package can be calculated given the junction-to-  
ambient thermal resistance and the maximum ambient  
temperature for the application. The following equation  
can be used to determine the package maximum  
internal power dissipation.  
Maximum Ambient Temperature  
TA(MAX) = 50°C  
Internal Power Dissipation  
Internal power dissipation is the sum of the power  
dissipation for each LDO pass device.  
PLDO1(MAX) = (VIN(MAX) - VOUT1(MIN)) x  
IOUT1(MAX)  
EQUATION 6-4:  
(TJ(MAX) TA(MAX)  
)
PLDO1 = (4.2V - (0.975 x 2.8V)) x 300 mA  
---------------------------------------------------  
=
PD(MAX)  
RθJA  
PLDO1 = 441.0 milliWatts  
PD(MAX) = maximum device power dissipation.  
TJ(MAX) = maximum continuous junction  
temperature.  
PLDO2 = (4.2V - (0.975 X 1.8V)) x 150 mA  
PLDO2 = 366.8 milliWatts  
PTOTAL = PLDO1 + PLDO2  
TA(MAX) = maximum ambient temperature.  
PTOTAL= 807.8 milliWatts  
RθJA  
= Thermal resistance from junction to  
ambient.  
Device Junction Temperature Rise  
EQUATION 6-5:  
TJ(RISE) = PD(MAX) × RθJA  
The internal junction temperature rise is a function of  
internal power dissipation and the thermal resistance  
from junction to ambient for the application. The  
thermal resistance from junction to ambient (RθJA) is  
derived from an EIA/JEDEC standard for measuring  
thermal resistance for small surface-mount packages.  
The EIA/JEDEC specification is JESD51-7 “High  
Effective Thermal Conductivity Test Board for Leaded  
Surface Mount Packages”. The standard describes the  
test method and board specifications for measuring the  
thermal resistance from junction to ambient. The actual  
thermal resistance for a particular application can vary  
depending on many factors, such as copper area and  
thickness. Refer to AN792, “A Method to Determine  
How Much Power a SOT23 Can Dissipate in an  
Application”, (DS00792), for more information  
regarding this subject.  
TJ(RISE) = Rise in device junction temperature over  
the ambient temperature.  
PD(MAX) = Maximum device power dissipation.  
RθJA  
= Thermal resistance from junction-to-  
ambient.  
EQUATION 6-6:  
TJ = TJ(RISE) + TA  
= Junction temperature.  
TJ  
TJ(RISE) = Rise in device junction temperature over  
the ambient temperature.  
TA  
= Ambient Temperature.  
TJ(RISE) = PTOTAL x RqJA  
TJRISE = 807.8 milliWatts x 41.0° C/W  
TJRISE = 33.1°C  
6.3  
Typical Application  
Internal power dissipation, junction temperature rise,  
junction temperature and maximum power dissipation  
are calculated in the following example. The power  
dissipation, as a result of ground current, is small  
enough to be neglected.  
Junction Temperature Estimate  
To estimate the internal junction temperature, the  
calculated temperature rise is added to the ambient or  
offset temperature. For this example, the worst-case  
junction temperature is estimated below.  
6.3.1  
POWER DISSIPATION EXAMPLE  
Package  
TJ = TJRISE + TA(MAX)  
TJ = 83.1°C  
Package Type = 3x3DFN8  
Input Voltage  
Maximum Package Power Dissipation at 50°C  
Ambient Temperature  
VIN = 2.7V to 4.2V  
LDO Output Voltages and Currents  
VOUT1 = 2.8V  
3x3DFN8 (41°C/Watt RθJA  
PD(MAX) = (125°C - 50°C)/41° C/W  
D(MAX) = 1.83 Watts  
MSOP8 (208°C/Watt RθJA  
PD(MAX) = (125°C - 50°C)/208° C/W  
D(MAX) = 0.360 Watts  
)
IOUT1 = 300 mA  
P
VOUT2 = 1.8V  
)
IOUT2 = 150 mA  
P
© 2005 Microchip Technology Inc.  
DS21333B-page 15  
TC1302A/B  
7.0  
TYPICAL LAYOUT  
8.0  
8.1  
ADDITIONAL OUTPUT  
VOLTAGES  
Output Voltage Options  
Table 8-1 describes the range of output voltage options  
available for the TC1302A/B. VOUT1 and VOUT2 can be  
factory preset from 1.5V to 3.3V in 100 mV increments.  
TABLE 8-1:  
CUSTOM OUTPUT  
VOLTAGES  
VOUT1  
1.5V to 3.3V  
VOUT2  
1.5V to 3.3V  
For a listing of TC1302A/B standard parts, refer to the  
Product Identification System on page 23.  
FIGURE 7-1:  
MSOP8 Silk-screen Layer.  
When designing the physical layout for the TC1302A/B,  
the highest priority should be placed on positioning the  
input and output capacitors as close to the device pins  
as is practical. Figure 7-1 above represents a typical  
placement of the components when using the SMT0805  
capacitors.  
FIGURE 7-2:  
DFN3x3 Silk-screen  
Example.  
Figure 7-2 above represents a typical placement of the  
components when using the SMT0603 capacitors.  
DS21333B-page 16  
© 2005 Microchip Technology Inc.  
TC1302A/B  
9.0  
9.1  
PACKAGING INFORMATION  
Package Marking Information  
8-Lead MSOP  
Example:  
8-Lead DFN  
Example:  
— 32A = TC1302A  
— F = 2.8V VOUT1  
— H = 2.6V VOUT2  
XXXX  
YYWW  
NNN  
BFH  
0542  
256  
XXXXXX  
YWWNNN  
32AFH  
542256  
X1 represents VOUT1 configuration:  
Code VOUT1 Code VOUT1 Code VOUT1  
X2 represents VOUT2 configuration:  
Code VOUT2 Code VOUT1 Code VOUT2  
A
B
C
D
E
F
G
H
I
3.3V  
3.2V  
3.1V  
3.0V  
2.9V  
2.8V  
2.7V  
2.6V  
2.5V  
J
K
L
2.4V  
2.3V  
2.2V  
2.1V  
2.0V  
1.9V  
1.8V  
1.7V  
1.6V  
S
T
1.5V  
1.65V  
2.85V  
2.65V  
1.85V  
A
B
C
D
E
F
G
H
I
3.3V  
3.2V  
3.1V  
3.0V  
2.9V  
2.8V  
2.7V  
2.6V  
2.5V  
J
K
L
2.4V  
2.3V  
2.2V  
2.1V  
2.0V  
1.9V  
1.8V  
1.7V  
1.6V  
S
T
1.5V  
1.65V  
2.85V  
2.65V  
1.85V  
U
V
W
X
Y
Z
U
V
W
X
Y
Z
M
N
O
P
Q
R
M
N
O
P
Q
R
For a listing of TC1302A/B standard parts, refer to the  
Product Identification System on page 23.  
Legend: XX...X Customer-specific information  
Y
Year code (last digit of calendar year)  
YY  
Year code (last 2 digits of calendar year)  
WW  
NNN  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
e
3
Pb-free JEDEC designator for Matte Tin (Sn)  
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information.  
© 2005 Microchip Technology Inc.  
DS21333B-page 17  
TC1302A/B  
8-Lead Plastic Micro Small Outline Package (UA) (MSOP)  
E
E1  
p
D
2
B
n
1
α
A2  
A
c
φ
A1  
(F)  
L
β
Units  
Dimension Limits  
INCHES  
NOM  
MILLIMETERS*  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.026 BSC  
0.65 BSC  
Overall Height  
A
A2  
A1  
E
-
-
.043  
-
-
0.85  
-
1.10  
Molded Package Thickness  
Standoff  
.030  
.033  
.037  
0.75  
0.95  
0.15  
.000  
-
.006  
0.00  
Overall Width  
.193 TYP.  
4.90 BSC  
Molded Package Width  
Overall Length  
Foot Length  
E1  
D
.118 BSC  
.118 BSC  
3.00 BSC  
3.00 BSC  
L
.016  
.024  
.037 REF  
.031  
0.40  
0.60  
0.95 REF  
0.80  
Footprint (Reference)  
Foot Angle  
F
φ
c
0°  
.003  
.009  
5°  
-
8°  
.009  
.016  
15°  
0°  
0.08  
0.22  
5°  
-
-
-
-
-
8°  
0.23  
0.40  
15°  
Lead Thickness  
Lead Width  
.006  
B
α
β
.012  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
*Controlling Parameter  
Notes:  
-
-
5°  
15°  
5°  
15°  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not  
exceed .010" (0.254mm) per side.  
JEDEC Equivalent: MO-187  
Drawing No. C04-111  
DS21333B-page 18  
© 2005 Microchip Technology Inc.  
TC1302A/B  
8-Lead Plastic Dual Flat No Lead Package (MF) 3x3x0.9 mm Body (DFN)  
E
p
b
n
L
D
D2  
EXPOSED  
METAL  
PAD  
PIN 1  
ID INDEX  
AREA  
2
1
(NOTE 2)  
E2  
TOP VIEW  
BOTTOM VIEW  
A
A1  
A3  
EXPOSED  
TIE BAR  
(NOTE 1)  
Units  
Dimension Limits  
INCHES  
NOM  
MILLIMETERS*  
MIN  
MAX  
MIN  
NOM  
8
0.65 BSC  
MAX  
n
p
Number of Pins  
Pitch  
8
.026 BSC  
.035  
.001  
.008 REF.  
.118 BSC  
Overall Height  
Standoff  
A
A1  
A3  
E
.031  
.000  
.039  
.002  
0.80  
0.00  
0.90  
0.02  
1.00  
0.05  
Lead Thickness  
Overall Length  
Exposed Pad Length  
Overall Width  
Exposed Pad Width  
Lead Width  
0.20 REF.  
3.00 BSC  
(Note 4)  
E2  
D
D2  
b
.055  
.096  
1.39  
2.45  
.118 BSC  
3.00 BSC  
(Note 4)  
.047  
.007  
.012  
.069  
.015  
.022  
1.20  
0.23  
0.30  
1.75  
0.37  
0.55  
.010  
.019  
0.26  
0.48  
Lead Length  
L
*Controlling Parameter  
Notes:  
1. Package may have one or more exposed tie bars at ends.  
2. Pin 1 visual index feature may vary, but must be located within the hatched area.  
3. Dimensions D and E do not include mold flash or protrusions. Mold flash or protrusions shall not  
exceed .010" (0.254mm) per side.  
4. Exposed pad dimensions vary with paddle size.  
5. JEDEC equivalent: Pending  
Drawing No. C04-062  
© 2005 Microchip Technology Inc.  
DS21333B-page 19  
TC1302A/B  
NOTES:  
DS21333B-page 20  
© 2005 Microchip Technology Inc.  
TC1302A/B  
APPENDIX A: REVISION HISTORY  
Revision B (January 2005)  
The following is the list of modifications:  
1. Correct the incorrect part number options shown  
on the Product Identification System page and  
change the “standard” output voltage and reset  
voltage combinations.  
2. Added Appendix A: Revision History.  
Revision A (September 2003)  
Original data sheet release.  
© 2005 Microchip Technology Inc.  
DS21333B-page 21  
TC1302A/B  
NOTES:  
DS21333B-page 22  
© 2005 Microchip Technology Inc.  
TC1302A/B  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO. X-  
X
X
X
XX  
XX  
a)  
TC1302ADTVMF:  
3.0, 1.65,  
8LD DFN pkg.  
TC1302  
Type  
A/B  
V
V
Temp Package Tube  
OUT1  
OUT2  
or  
Range  
a)  
b)  
TC1302BDTVMF:  
3.0, 1.65,  
8LD DFN pkg.  
2.6, 1.8,  
8LD DFN pkg,  
Tape and Reel.  
2.5, 1.8,  
Tape &  
Reel  
Standard  
Configurations  
TC1302BHPVMFTR:  
c)  
TC1302BIPVUA:  
Device:  
TC1302A: Dual Output LDO with Single Shutdown input.  
TC1302B: Dual Output LDO with Dual Shutdown Inputs.  
8LD MSOP pkg.  
Standard  
Configurations: *  
VOUT1/VOUT2  
3.0/1.65  
Configuration  
Code  
TC1302A  
DT  
TC1302B  
3.0/1.65  
2.6/1.8  
2.5/1.8  
DT  
HP  
IP  
* Contact Factory for Alternate Output Voltage  
Configurations.  
Temperature Range:  
Package:  
V
= -40°C to +125°C  
MF  
UA  
=
Dual Flat, No Lead (3x3 mm body), 8-lead  
Plastic Micro Small Outline (MSOP), 8-lead  
=
Tube or  
Tape and Reel:  
Blank  
TR  
=
=
Tube  
Tape and Reel  
© 2005 Microchip Technology Inc.  
DS21333B-page 23  
TC1302A/B  
NOTES:  
DS21333B-page 24  
© 2005 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-  
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,  
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,  
RELATED TO THE INFORMATION, INCLUDING BUT NOT  
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,  
MERCHANTABILITY OR FITNESS FOR PURPOSE.  
Microchip disclaims all liability arising from this information and  
its use. Use of Microchip’s products as critical components in  
life support systems is not authorized except with express  
written approval by Microchip. No licenses are conveyed,  
implicitly or otherwise, under any Microchip intellectual property  
rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,  
PRO MATE, PowerSmart, rfPIC, and SmartShunt are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A. and other countries.  
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,  
PICMASTER, SEEVAL, SmartSensor and The Embedded  
Control Solutions Company are registered trademarks of  
Microchip Technology Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,  
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,  
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial  
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,  
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,  
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,  
rfPICDEM, Select Mode, Smart Serial, SmartTel and Total  
Endurance are trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2005, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 quality system certification for  
its worldwide headquarters, design and wafer fabrication facilities in  
Chandler and Tempe, Arizona and Mountain View, California in  
October 2003. The Company’s quality system processes and  
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
© 2005 Microchip Technology Inc.  
DS21333B-page 25  
WORLDWIDE SALES AND SERVICE  
AMERICAS  
ASIA/PACIFIC  
ASIA/PACIFIC  
EUROPE  
Corporate Office  
Australia - Sydney  
Tel: 61-2-9868-6733  
Fax: 61-2-9868-6755  
India - Bangalore  
Tel: 91-80-2229-0061  
Fax: 91-80-2229-0062  
Austria - Weis  
Tel: 43-7242-2244-399  
Fax: 43-7242-2244-393  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support:  
http://support.microchip.com  
Web Address:  
www.microchip.com  
China - Beijing  
Tel: 86-10-8528-2100  
Fax: 86-10-8528-2104  
Denmark - Ballerup  
Tel: 45-4450-2828  
Fax: 45-4485-2829  
India - New Delhi  
Tel: 91-11-5160-8631  
Fax: 91-11-5160-8632  
China - Chengdu  
Tel: 86-28-8676-6200  
Fax: 86-28-8676-6599  
France - Massy  
Tel: 33-1-69-53-63-20  
Fax: 33-1-69-30-90-79  
Japan - Kanagawa  
Tel: 81-45-471- 6166  
Fax: 81-45-471-6122  
Atlanta  
China - Fuzhou  
Tel: 86-591-8750-3506  
Fax: 86-591-8750-3521  
Germany - Ismaning  
Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
Korea - Seoul  
Alpharetta, GA  
Tel: 770-640-0034  
Fax: 770-640-0307  
Tel: 82-2-554-7200  
Fax: 82-2-558-5932 or  
82-2-558-5934  
Italy - Milan  
Tel: 39-0331-742611  
Fax: 39-0331-466781  
China - Hong Kong SAR  
Tel: 852-2401-1200  
Fax: 852-2401-3431  
Boston  
Singapore  
Tel: 65-6334-8870  
Fax: 65-6334-8850  
Westford, MA  
Tel: 978-692-3848  
Fax: 978-692-3821  
Netherlands - Drunen  
Tel: 31-416-690399  
Fax: 31-416-690340  
China - Shanghai  
Tel: 86-21-5407-5533  
Fax: 86-21-5407-5066  
China - Shenyang  
Tel: 86-24-2334-2829  
Fax: 86-24-2334-2393  
Taiwan - Kaohsiung  
Tel: 886-7-536-4818  
Fax: 886-7-536-4803  
Chicago  
Itasca, IL  
Tel: 630-285-0071  
Fax: 630-285-0075  
England - Berkshire  
Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
Taiwan - Taipei  
Tel: 886-2-2500-6610  
Fax: 886-2-2508-0102  
Dallas  
Addison, TX  
China - Shenzhen  
Tel: 86-755-8203-2660  
Fax: 86-755-8203-1760  
Tel: 972-818-7423  
Fax: 972-818-2924  
Taiwan - Hsinchu  
Tel: 886-3-572-9526  
Fax: 886-3-572-6459  
China - Shunde  
Detroit  
Tel: 86-757-2839-5507  
Fax: 86-757-2839-5571  
Farmington Hills, MI  
Tel: 248-538-2250  
Fax: 248-538-2260  
China - Qingdao  
Tel: 86-532-502-7355  
Fax: 86-532-502-7205  
Kokomo  
Kokomo, IN  
Tel: 765-864-8360  
Fax: 765-864-8387  
Los Angeles  
Mission Viejo, CA  
Tel: 949-462-9523  
Fax: 949-462-9608  
San Jose  
Mountain View, CA  
Tel: 650-215-1444  
Fax: 650-961-0286  
Toronto  
Mississauga, Ontario,  
Canada  
Tel: 905-673-0699  
Fax: 905-673-6509  
10/20/04  
DS21333B-page 26  
© 2005 Microchip Technology Inc.  
配单直通车
TC1302B-USVUA产品参数
型号:TC1302B-USVUA
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:MICROCHIP TECHNOLOGY INC
Reach Compliance Code:compliant
Factory Lead Time:13 weeks
风险等级:5.36
可调性:FIXED
标称回动电压 1:0.104 V
最大绝对输入电压:6.5 V
JESD-30 代码:R-PDSO-G8
最大电网调整率:0.0123%
最大负载调整率:0.0285%
输出次数:2
端子数量:8
工作温度TJ-Max:125 °C
工作温度TJ-Min:-40 °C
最大输出电流 1:0.15 A
标称输出电压 1:2.85 V
标称输出电压 2:1.5 V
封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP
封装等效代码:TSSOP8,.19
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态:Not Qualified
子类别:Other Regulators
表面贴装:YES
技术:CMOS
端子形式:GULL WING
端子节距:0.635 mm
端子位置:DUAL
最大电压容差:2.5%
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