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产品型号TDA16846-2P的概述

芯片TDA16846-2P的概述 TDA16846-2P是由意法半导体(STMicroelectronics)推出的一款高性能集成电路,广泛应用于电源管理与控制领域。这款芯片通常被用于变换器和高效率开关电源(SMPS),其主要目的是在高负载和快速动态条件下提升电源的稳定性与效率。TDA16846-2P融合了多种功能模块,包括电压监控、故障保护与电流限流等,以确保电源在不同工作条件下均能安全、可靠地运行。 芯片TDA16846-2P的详细参数 TDA16846-2P的技术参数包括: - 工作电压范围:通常在9V至18V之间,适应多种工业应用。 - 引导电流:支持50mA的较大引导电流,能够满足较高的启动电流需求。 - 功耗特点:待机功耗低于500μA,有助于提高能效,特别在待机模式下表现优越。 - 工作温度范围:-40°C至+125°C,适合于各种恶劣环境条件下的应用。 - 输出频率:可...

产品型号TDA168462HKLA1的Datasheet PDF文件预览

Datasheet, V2.0, 31 July 2003  
PWM-QR IC  
TDA 16846/16846-2  
TDA 16847/16847-2  
Controller for Switch Mode Power  
Supplies Supporting Low Power  
Standby and Power Factor  
Power Management & Supply  
N e v e r s t o p t h i n k i n g .  
TDA 16846/TDA 16846-2/TDA 16847/TDA 16847  
Revision History:  
Current Version: 2003-07-31  
Previous Version Data Sheet TDA 16846: 2000-01-14  
Previous Version Data Sheet TDA 16846-2: 2002-07-30  
Page  
Page  
Subjects (major changes since last revision)  
(in previous (in current The data sheets for TDA 16846 and TDA 16846-2 have been  
Version)  
20  
Version)  
20  
combined in this version. Some measuring values are updated:  
Pin 1 basic value 1 V1B1 and V1B2 slightly changed.  
Pin 2 discharge current I2DC min changed from 0.5 mA to 0.6 mA.  
Pin 14 overvoltage V14OVmax threshold changed from 17.0 V to 17.1 V.  
Pin 3 delay to switch on t3d slightly decreased.  
21  
21  
Pin 4 charge current I4ch and discharge current I4DCH added.  
Pull high resistor R1min changed from 18kOhm to 15 kOhm according  
to the data sheet for TDA 16846.  
22  
23  
22  
23  
Pin 7 charge current I7 min and upper threshold V7Hmin small changed.  
Pin 13 rise and fall time adapted according to C13= 1nF (prev. 10 nF).  
V13aclow slightly decreased (only TDA 16846-2, TDA 16847-2).  
TDA 16846-2/TDA 16847-2:  
Improvements of TDA 16846-2/TDA16847-2 compared with TDA 16846/TDA16847  
Pin 5  
OCI  
Expanded input voltage range down to zero, series resistor between  
pin 5 and ground is no longer necessary.  
Pin 7  
SYN  
Improved startup to prevent the transformer from saturation also in  
fixed frequency and synchronized mode.  
Pin 11  
Pin 13  
PVC  
OUT  
VCC  
Noise-immunity improved by spike blanking.  
Reduced output voltage level for off state.  
Noise-immunity improved by spike blanking.  
Pin 14  
Edition 07.03  
Published by Infineon Technologies AG  
St.-Martin-Strasse 53  
D-81541 München  
© Infineon Technologies AG 2003  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as warranted characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and  
charts stated herein.  
Infineon Technologiesis an approved CECC manufacturer.  
Information  
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office  
in Germany or our Infineon Technologies Representatives worldwide.  
Warnings  
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact  
your nearest Infineon Technologies Office.  
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Tech-  
nologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to  
support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other  
persons may be endangered.  
Controller for Switch Mode Power Supplies  
Supporting Low Power Standby and Power  
Factor Correction  
TDA 16846/16846-2  
TDA 16847/16847-2  
Bipolar IC  
1
Overview  
1.1  
Features  
• Line Current Consumption with PFC  
• Low Power Consumption  
P-DIP-14-3  
• Stable and Adjustable Standby Frequency  
• Very Low Start-up Current  
• Soft-Start for Quiet Start-up  
• Free usable Fault Comparators  
• Synchronization and Fixed Frequency Circuits  
• Over- and Undervoltage Lockout  
P-DSO-14-3  
• Switch Off at Mains Undervoltage  
• Temporary High Power Circuit (only TDA 16847-2)  
• Mains Voltage Dependent Fold Back Point Correction  
• Continuous Frequency Reduction with Decreasing Load  
• Adjustable and Voltage Dependent Ringing Suppression Time  
Type  
Ordering Code  
Q67000-A9377  
Q67000-A9378  
Q67006-A9430  
Q67006-A9412  
Q67040-S4494  
Q67040-S4496  
Q67040-S4495  
Q67040-S4497  
Package  
TDA 16846  
TDA 16847  
TDA 16846G  
TDA 16847G  
TDA 16846-2  
TDA 16847-2  
TDA 16846-2G  
TDA 16847-2G  
P-DIP-14-3  
P-DIP-14-3  
P-DSO-14-3  
P-DSO-14-3  
P-DIP-14-3  
P-DIP-14-3  
P-DSO-14-3  
P-DSO-14-3  
1.2  
Description  
The TDA 16846-2 (this name is used in the description for all types) is optimized to  
control free running or fixed frequency flyback converters with or without Power Factor  
Correction (Current Pump). To provide low power consumption at light loads, this device  
reduces the switching frequency in small steps with load, towards an adjustable  
minimum (e. g. 20 kHz in standby mode). Additionally, the startup current is very low. To  
avoid switching stress on the power devices, the power transistor is always switched on  
at minimum voltage. A special circuit is implemented to avoid jitter. The device has  
Version 2.0  
3
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
several protection functions: VCC over- and undervoltage, mains undervoltage, current  
limiting and 2 free usable fault comparators. Regulation can be done by using the  
internal error amplifier or an opto coupler feedback (additional input). The output driver  
is ideally suited for driving a power MOSFET. Fixed frequency and synchronized  
operation are also possible.  
The TDA 16846-2 is suited for TV-, VCR- sets, SAT receivers and other sets for  
consumer electronics. It also can be used in PC monitors.  
The TDA 16847-2 is identical with TDA 16846-2 but has an additional power  
measurement output (pin 8) which can be used as a Temporary High Power Circuit.  
Figure 1  
1.3  
Pin Configuration (top view)  
Pin Definitions and Functions  
Symbol Function  
Pin  
1
OTC  
Off Time Circuit  
2
PCS  
RZI  
Primary Current Simulation  
Regulation and Zero Crossing Input  
Soft-Start and Regulation Capacitor  
Opto Coupler Input  
3
4
SRC  
OCI  
5
6
FC2  
Fault Comparator 2  
7
SYN  
N.C./PMO  
REF  
FC1  
Synchronization Input  
Not Connected (TDA 16846-2) / PMO (TDA 16847-2)  
Reference Voltage and Current  
Fault Comparator 1  
8
9
10  
11  
12  
13  
14  
PVC  
GND  
OUT  
VCC  
Primary Voltage Check  
Ground  
Output  
Supply Voltage  
Version 2.0  
4
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
1.4  
Pin  
1
Short Description of the Pin Functions  
Function  
A parallel RC-circuit between this pin and ground determines the ringing  
suppression time and the standby-frequency.  
2
3
A capacitor between this pin and ground and a resistor between this pin and  
the positive terminal of the primary electrolytic capacitor quantifies the max.  
possible output power of the SMPS.  
This is the input of the error amplifier and the zero crossing input. The output  
of a voltage divider between the control winding and ground is connected to  
this input. If the pulses at pin 3 exceed a 5 V threshold, the control voltage at  
pin 4 is lowered.  
4
5
This is the pin for the control voltage. A capacitor has to be connected  
between this pin and ground. The value of this capacitor determines the  
duration of the softstart and the speed of the control (primary regulation).  
If an opto coupler for the control is used, its output has to be connected  
between this pin and ground. The voltage divider at pin 3 has then to be  
changed, so that the pulses at pin 3 are below 5 V.  
6
7
Fault comparator 2: A voltage > 1.2 V at this pin stops the SMPS (v.also pin 9).  
If fixed frequency mode is wanted, a parallel RC circuit has to be connected  
between this pin and ground. The RC-value determines the frequency. If  
synchronized mode is wanted, sync pulses have to be fed into this pin.  
8
9
TDA 16846-2: Not connected. TDA 16847-2: This is the power measurement  
output of the Temporary High Power Circuit. A capacitor and a RC-circuit has  
to be connected between this pin and ground.  
Output for the reference voltage (5 V). With a resistor between this pin and  
ground the fault comparator 2 (pin 6) is enabled.  
10  
11  
Fault comparator 1: If a voltage > 1 V is applied to this pin, the SMPS stops.  
This is the input of the primary voltage check. The voltage at the anode of the  
primary electrolytic capacitor has to be fed to this pin via a voltage divider. If  
the voltage of this pin falls below 1 V, the SMPS is switched off. A second  
function of this pin is the primary voltage dependent fold back point correction  
(only active in free running mode).  
12  
13  
Common ground.  
Output signal. This pin has to be connected via a series resistor to the gate of  
the power transistor.  
14  
Connection for supply voltage and startup capacitor. After startup, the supply  
voltage is produced by the control winding of the transformer and rectified by  
an external diode.  
Version 2.0  
5
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
1.5  
Block Diagrams  
Figure 2  
TDA 16846-2  
Version 2.0  
6
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 3  
TDA 16847-2  
Version 2.0  
7
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
2
Functional Description  
Start Up Behaviour (Pin 14)  
When power is applied to the chip and the voltage V14 at Pin 14 (VCC) is less than the  
upper threshold (VON) of the Supply Voltage Comparator (SVC), then the input current  
I14 will be less than 100 µA. The chip is not active (off state) and driver output (Pin 13)  
and control output (Pin 4) will be actively held low. When V14 exceeds the upper SVC  
threshold (VON) the chip starts working and I14 increases. When V14 falls below the lower  
SVC threshold (VOFF) the chip starts again from its initial condition. Figure 4 shows the  
start-up circuit and Figure 5 shows the voltage V14 during start up. Charging of C14 is  
done by resistor R2 of the “Primary Current Simulation” (see later) and the internal diode  
D1, so no additional start up resistor is needed. The capacitor C14 delivers the supply  
current until the auxiliary winding of the transformer supplies the chip with current  
through the external diode D14.  
It is recommended to apply a small RF snubber capacitor of e.g. 100 nF parallel to the  
electrolytic capacitor at pin 14 as shown in the application circuits in Figures 15, 16 , and  
17.  
To avoid multiple pulses during start up in fixed frequency mode (danger of transformer  
saturation), the IC works in freerunning mode until the pulses at pin 3 (RZI) exceed the  
2.5 V threshold (only TDA 16846-2, TDA 16847-2).  
Figure 4  
Startup Circuit  
Version 2.0  
8
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 5  
Startup Voltage Diagram  
Primary Current Simulation PCS (Pin 2) / Current Limiting  
A voltage proportional to the current of the power transistor is generated at Pin 2 by the  
RC-combination R2, C2 (Figure 4). The voltage at Pin 2 is forced to 1.5 V when the  
power transistor is switched off and during its switch on time C2 is charged by R2 from  
the rectified mains. The equation of V2 and the current in the power transistor (Iprimary) is  
:
L
primary × Iprimary  
V2 = 1,5 V+ -------------------------------  
R2 × C2  
L
primary: Primary inductance of the transformer  
The voltage V2 is applied to one input of the On Time Comparator ONTC (see Figure 2).  
The other input is the control voltage. If V2 exceeds the control voltage, the driver  
switches off (current limiting). The maximum value of the control voltage is the internal  
reference voltage 5 V, so the maximum current in the power transistor (IMprimary) is  
:
3,5 V × R2 × C2  
IMprimary = --------------------------------------  
Lprimary  
The control voltage can be reduced by either the Error Amplifier EA (current mode  
regulation), or by an opto coupler at Pin 5 (regulation with opto coupler isolation) or by  
the voltage V11 at Pin 11 (Fold Back Point Correction).  
Version 2.0  
9
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Fold Back Point Correction PVC (Pin 11)  
V11 is derived from a voltage divider connected to the rectified mains and reduces the  
limit of the possible current maximum in the power transistor if the mains voltage  
increases. I.e. this limit is independent of the mains (only active in free running mode).  
The maximum current (IMprimary) depending on the voltage V11 at Pin 11 is  
:
(4 V V11 3) × R2 × C2  
IMprimary = ------------------------------------------------------------  
Lprimary  
Off-Time Circuit OTC (Pin 1)  
Figure 6 shows the Off-Time Circuit which determines the load dependent frequency  
curve. When the driver switches off (Figure 7) the capacitor C1 is charged first by current  
I1L (approx. 0.5 mA, for extended ringing suppression time). As soon as the voltage at  
pin 3 reaches the level V3L (2.5 V), the charging current is switched to the higher value  
I1H (approx. 1 mA, for normal ringing suppression time). This current flows until the  
capacitor’s voltage reaches 3.5 V. The charge time TC1 is  
:
C1 × 1,5 V  
-------------------------  
TC1 ≈  
1mA  
For proper operation of the special internal anti- jitter circuit, TC1 (rising time for I1H only)  
should have the same value as the resonance time “tR” of the power circuit (Figure 7).  
After charging C1 up to 3.5 V the current source is disconnected and C1 is discharged by  
resistor R1. The voltage V1 at Pin 1 is applied to the Off-Time Comparator (OFTC). The  
other input of OFTC is the control voltage. The value of the control voltage at the input  
of OFTC is limited to a minimum of 2 V (for stable frequency at very light load). The On-  
Time Flip Flop (ONTF) is set, if the output of OFTC is high 1) and the voltage V3 at Pin 3  
falls below 25 mV (zero crossing signal is high). This ensures switching on of the power  
transistor at minimum voltage. If no zero crossing signal is coming into pin 3, the power  
transistor is switched on after an additional delay until V1 falls below 1.5 V (see Figure 6,  
OFTCD). As long as V1 is higher than the limited control voltage, ONTF is disabled to  
suppress wrong zero crossings of V3, due to parasitic oscillations from the transformer  
after switch-off. The discharge time of C1 is a function of the control voltage.  
1)  
i.e. V1 is less than the limited control voltage.  
.
Control Voltage Output Power Off-time TD1  
1.5 - 2 V  
2 - 3.5 V  
3.5 - 5 V  
Low  
Constant (TD1MAX.), const. frequency stand by  
Decreasing  
Medium  
High  
Free running, switch-on at first minimum  
Version 2.0  
10  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
If the control voltage is below 2 V (at low output power) the “off-time” is maximum and  
constant  
TD1max 0, 56 × R1 × C1  
During the discharge time tD1, V1 must not fall below the limit V1L, otherwise the function  
is not guaranteed.  
Figure 6  
Off-Time-Circuit  
Version 2.0  
11  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/162847-2  
Figure 7  
Pulse Diagram of Off-Time-Circuit  
Figure 8 shows the converters switching frequency as a function of the output power.  
Figure 8  
Load Dependent Frequency Curve  
Version 2.0  
12  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Error Amplifier EA / Soft-Start (Pin 3, Pin 4)  
Figure 9 shows the simplified Error Amplifier circuit. The positive input of the Error  
Amplifier (EA) is the reference voltage 5 V. The negative input is the pulsed output  
voltage from the auxiliary winding, divided by R31 and R32. The capacitor C3 is  
dimensioned only for delaying zero crossings and smoothing the first spike after switch-  
off. Smoothing of the regulation voltage is done with the soft start capacitor C4 at Pin 4.  
During start up C4 is charged with a current of approx. 2 µA (Soft Start). For primary  
regulation C4 is charged and discharged with pulsed currents. Figure 10 shows the  
voltage diagrams of the Error Amplifier circuit.  
Figure 9  
Error Amplifier  
Figure 10  
Regulation Pulse Diagram  
Version 2.0  
13  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Fixed Frequency and Synchronization Circuit SYN (Pin 7)  
Figure 11 shows the Fixed Frequency and Synchronization Circuit. The circuit is  
disabled when Pin 7 is not connected or connected to pin 9 (Vref, to avoid noise  
sensitivity). With R7 and C7 at Pin 7 the circuit is working. C7 is charged fast with approx.  
1 mA and discharged slowly by R7 (Figure 11). The power transistor is switched on at  
beginning of the charge phase. The switching frequency is (charge time ignored)  
:
0, 8  
f --------------  
R7 × C7  
When the oscillator circuit is working the Fold Back Point Correction is disabled (not  
necessary in fixed frequency mode). “Switch on” is only possible when a “zero crossing”  
has occurred at Pin 3, otherwise “switch-on” will be delayed (Figure 12).  
Figure 11  
Synchronization and Fixed Frequency Circuit  
Version 2.0  
14  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 12  
Pulse Diagram for Fixed Frequency Circuit  
Synchronization mode is also possible. The synchronization frequency must be higher  
than the oscillator frequency.  
Figure 13  
Ext. Synchronization Circuit  
Version 2.0  
15  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
3
Protection Functions  
The chip has several protection functions:  
Current Limiting  
See “Primary Current Simulation PCS (Pin 2) / Current Limiting” and “Fold Back Point  
Correction PVC (Pin 11)”.  
Over- and Undervoltage Lockout OV/SVC (Pin 14)  
When V14 at Pin 14 exceeds 16.5 V, e. g. due to a fault in the regulation circuit, the Error  
Flip Flop ERR is set and the output driver is shut-down. When V14 goes below the lower  
SVC threshold, ERR is reset and the driver output (Pin 13) and the soft-start (Pin 4) are  
shut down and actively held low.  
Primary Voltage Check PVC (Pin 11)  
When the voltage V11 at Pin 11 goes below 1 V the Error Flip Flop (ERR) is set. E.g. a  
voltage divider from the rectified mains at Pin 11 prevents high input currents at a too low  
input voltage.  
Free Usable Fault Comparator FC1 (Pin 10)  
When the voltage at Pin 10 exceeds 1 V, the Error Flip Flop (ERR) is set. This can be  
used e. g. for mains overvoltage shutdown.  
Free Usable Fault Comparator FC2 (Pin 6)  
When the voltage at Pin 6 exceeds 1.2 V, the Error Flip Flop (ERR) is set. A resistor  
between Pin 9 (REF) and ground is necessary to enable this fault comparator.  
Voltage dependent Ringing Suppression Time  
During start-up and short-circuit operation, the output voltage of the converter is low and  
parasitic zero crossings are applied for a longer time at Pin 3. Therefore the Ringing  
Suppression Time TC1 (see “Off-Time Circuit OTC (Pin 1)”) is extended with a factor of  
2.2 at a low output voltage. The voltage at pin 1 must not fall below the limit V1L.  
Version 2.0  
16  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
4
Temporary High Power Circuit FC2, PMO, REF  
(Pin 6, 8, 9, TDA 16847-2)  
Figure 14 shows the Temporary High Power Circuit:  
Figure 14  
The Temporary High Power Circuit (THPC) consists of two parts:  
Firstly, a power measurement circuit is implemented: The capacitor C8 at Pin 8 is  
charged with a constant current I8 during the discharge time of the flyback transformer  
and grounded the other time. Thus the average of the sawtooth voltage V8 at Pin 8 is  
proportional to the converter´s output power (at constant output voltages). The charge  
current I8 for C8 is set by the resistor R9 at Pin 9:  
I8 = 5 V/R9  
Version 2.0  
17  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Secondly, a High Power Shutdown Comparator (FC2) is implemented: When the voltage  
V6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the  
power measurement circuit (Pin 8) is smoothed by R8/C6 and applied to the “high power  
shutdown” input at Pin 6. The relation between this voltage V6 and the output power of  
the converter P is approximately:  
V6 (P × LSecondary × 5 V)/(VOUT2 × C8 × R9)  
L
Secondary: The transformers secondary inductance  
OUT: The converters output voltage  
V
So the time constant of R9/C8 for a certain high power shutdown level PSD is:  
2
R9 × C8 (PSD × LSecondary × 4.2)/VOUT  
The converters high power shutdown level can be adjusted lower (by R9, C8) than the  
current limit level (see “current limiting”). Thus because of the delay R8/C6, the converter  
can deliver maximum output power (current limit level) for a certain time (e. g. for power  
pulses like motor start current) and a power below the high power shutdown level for an  
unlimited time. This is of advantage because the thermal dimensioning of the power  
devices needs to be done for the lower power level only. Once the voltage V6 exceeds  
1.2 V no more charging or discharging happens at Pin 8. The voltage V6 remains high  
due to the bias current out of FC2 and the converter remains switched-off. Reset can be  
done either by plugging-off the supply from the mains or by a high value resistor R6  
(Figure 14). R6 causes a reset every few seconds. When Pin 9 is not connected or gets  
too little current (I9 < I9FC2), the temporary high power circuit is disabled.  
Version 2.0  
18  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
5
Electrical Characteristics  
5.1  
Absolute Maximum Ratings  
All voltages listed are referenced to ground (0 V, VSS) except where noted.  
Parameter  
Symbol Limit Values Unit Remarks  
min.  
– 0.3  
– 0.3  
– 0.3  
max.  
17  
6
Supply Voltage at Pin 14  
VCC  
V
Voltage at Pin 1, 4, 5, 6, 7, 9, 10 –  
V
Voltage at Pin 2, 8, 11  
17  
1
V
Startup current into Pin 2  
I2  
mA  
V
Voltage at Pin 3  
RZI  
6
Current into Pin 3  
– 10  
– 1  
mA V3 < – 0.3 V  
Current into Pin 9  
Current into Pin 13  
IREF  
IOUT  
mA –  
100  
mA V13 > VCC  
mA V13 < 0 V  
– 100  
ESD Protection  
2
kV MIL STD 883C  
method 3015.6,  
100 pF, 1500 Ω  
Storage Temperature  
Tstg  
– 65  
– 25  
125  
125  
110  
°C  
°C  
Operating Junction Temperature TJ  
Thermal Resistance  
Junction-Ambient  
RthJA  
K/W P-DIP-14-3  
Soldering Temperature  
Soldering Time  
260  
10  
°C  
s
Note: Stress beyond the above listed values may cause permanent damage to the  
device. Exposure to absolute maximum rated conditions for extended periods may  
affect device reliability.  
Version 2.0  
19  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
5.2  
Characteristics  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Supply Voltage and Startup Circuit VCC (Pin 14)  
Overvoltage threshold  
Turn-ON threshold  
Turn-OFF threshold  
Delta-OV-V14 ON  
V14  
V14  
V14  
15.7 16.5 17.1 V  
14.5 15 15.5 V  
OV  
ON  
7.5  
0.5  
8
8.5  
V
V
OFF  
Supply current, OFF  
I14OFF  
40  
100 µA VCC = V14  
-100  
ON  
mV  
Supply current, ON  
I14ON  
5
8
mA Output low  
Primary Current Simulation PCS (Pin 2) / Current Limiting  
Basic value  
V2  
V2  
I2DC  
1.45 1.5  
1.55 V  
5.15 V  
I2 = 100 µA  
V11 = 1.2 V  
Peak value  
4.85  
0.6  
5
Discharge current  
Bias current Pin 2  
1.0  
2.5  
mA V2 = 3 V  
µA V2 = 2 V  
– 1.0 – 0.3 –  
Fold Back Point Correction PVC (Pin 11)  
Peak value  
V5  
3.8  
4.1  
4.3  
V
V11 = 4.5 V  
Bias current Pin 11  
– 1.0 – 0.3 –  
µA V11 = 1.5 V  
Off-Time Circuit OTC (Pin 1)  
Charge current  
Charge current  
Peak value  
I1H  
0.9  
1.1  
1.4  
mA V3 > V3L  
I1L  
0.35 0.5  
3.38 3.5  
0.65 mA V3 < V3L  
V1P  
V1B1  
V1B2  
V1L  
3.62 V  
2.1 V  
Basic value 1  
Basic value 2  
V1 Lower limit  
Bias current Pin 1  
1.9  
2
1.44 1.5  
80  
1.58 V  
140 mV  
– 1.1 – 0.4 –  
µA V1 = 2.2 V  
Version 2.0  
20  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Zero Crossing Input RZI (Pin 3)  
Zero crossing threshold  
(Pin 3)  
15  
25  
35  
mV –  
Delay to switch-on  
Bias current Pin 3  
t3d  
250  
–2  
350  
460 ns  
– 1.2 –  
µA V3 = 0 V  
Error Amplifier Input RZI (Pin 3)  
Input threshold (Pin 3)  
VEATH  
4.85  
2.4  
5
5.15 V  
2.6 V  
Low voltage threshold (Pin 3) V3L  
2.5  
Bias current Pin 3  
– 0.9 –  
µA V3 = 3 V  
Softstart and Regulation Voltage SRC (Pin 4)  
Soft-start charge current  
(Pin 4)  
I4CHS  
– 2.5 – 1.8 – 1.2 µA V4 = 2 V  
Charge current Pin 4  
I4CH  
-0.9 -0.7 -0.5 mA  
Discharge current Pin 4  
I4DCH  
0.9  
1.4  
1.9  
mA  
Opto Coupler Input OCI (Pin 5)  
Input voltage range (TDA  
16846, TDA 16847)  
V5  
V5  
R1  
0.3  
0
6
V
Input voltage range (TDA  
16846-2, TDA 16847-2)  
6
V
Pull high resistor to VREF  
15  
20  
28  
kΩ  
Version 2.0  
21  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Fixed Frequency and Synchronization Circuit SYN (Pin 7)  
Charge current  
I7  
-0.9 -1.3 -1.6 mA –  
Upper threshold  
Lower threshold  
Input voltage range  
Bias current Pin 7  
V7H  
V7L1  
V7L2  
3.4  
3.6  
3.7  
V
1.53 1.6  
0.4  
1.67 V  
6
V
– 2.4 – 1.8 – 1.1 µA V7 = 4 V  
Primary Voltage Check PVC (Pin 11)  
Threshold  
V11  
0.95  
1
1.06 V  
Reference Voltage REF (Pin 9)  
Voltage at Pin 9  
V9  
4.8  
5
5.15 V  
I9 = – 100 µA  
Current to enable FC2  
I9FC2  
– 18 – 7  
µA  
Version 2.0  
22  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
5.2  
Characteristics (cont’d)  
Unless otherwise stated, – 25 °C < Tj < 125 °C, VCC = 12 V  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ. max.  
Fault Comparator FC2 (Pin 6)  
HPC Threshold  
V6  
1.12 1.2  
1.28 V  
Bias Current Pin 6  
– 1.0 – 0.3 0.1  
µA V6 = 0.8 V  
Fault Comparator FC1 (Pin 10)  
Threshold  
V10  
0.95  
1
1.06 V  
Bias current Pin 10  
0.35 0.65 0.95 µA V10 = 0.8 V  
Power Measurement Output PMO (Pin 8, only TDA 16847, TDA 16847-2)  
Charge current Pin 8  
I8  
– 110 – 100 – 90 µA I9 = – 100 µA  
Output Driver OUT (Pin 13)  
Output voltage low state  
Output voltage high state  
V13  
V13  
V13  
1.1  
9.2  
0.8  
1.8  
10  
2.4  
11  
V
V
V
I13 = 100 mA  
low  
I13 = – 100 mA  
high  
aclow  
Output voltage during low  
V14 (TDA 16846, TDA 16847)  
1.8  
2.5  
I13 = 10 mA,  
V14 = 7 V  
Output voltage during low  
V14 (TDA 16846-2, TDA  
16847-2)  
V13  
0.5  
1
1.5  
V
I13 = 10 mA,  
V14 = 7 V  
aclow  
Rise time  
30  
10  
50  
20  
100 ns  
50 ns  
C13 = 1 nF,  
V13 = 2 … 8 V  
Fall time  
C13 = 1 nF,  
V13 = 2 … 8 V  
Note: The listed characteristics are ensured over the operating range of the integrated  
circuit. Typical characteristics specify mean values expected over the production  
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and  
the given supply voltage.  
Version 2.0  
23  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 15  
Circuit Diagram for Application with PFC  
Version 2.0  
24  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 16  
Circuit Diagram for Standard Application  
Version 2.0  
25  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Figure 17  
Circuit Diagram for Application with Temporary High Power Circuit  
Version 2.0  
26  
31 Jul 2003  
TDA 16846/16846-2  
TDA 16847/16847-2  
Package Outlines  
P-DIP-14-3  
(Plastic Dual In-line Package)  
Sorts of Packing  
Package outlines for tubes, trays etc. are contained in our  
Data Book "Package Information".  
Dimensions in mm  
31 Jul 2003  
Version 2.0  
27  
TDA 16846/16846-2  
TDA 16847/16847-2  
P-DSO-14-3  
(Plastic Dual In-line Package)  
Sorts of Packing  
Package outlines for tubes, trays etc. are contained in our  
Data Book "Package Information".  
Dimensions in mm  
31 Jul 2003  
Version 2.0  
28  
Total Quality Management  
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gleichermaßen der Lieferqualität und  
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For us it means living up to each and  
every one of your demands in the best  
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concerned with product quality. We  
direct our efforts equally at quality of  
supply and logistics, service and  
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Part of this is the very special attitude of  
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deed, towards co-workers, suppliers  
and you, our customer. Our guideline is  
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Total Quality im Denken und Handeln  
gegenüber Kollegen, Lieferanten und  
Ihnen, unserem Kunden. Unsere  
Leitlinie ist jede Aufgabe mit „Null  
Fehlern“ zu lösen – in offener  
Sichtweise auch über den eigenen  
Arbeitsplatz hinaus – und uns ständig  
zu verbessern.  
Throughout the corporation we also  
think in terms of Time Optimized  
Processes (top), greater speed on our  
part to give you that decisive  
competitive edge.  
Unternehmensweit orientieren wir uns  
dabei auch an „top“ (Time Optimized  
Processes), um Ihnen durch größere  
Schnelligkeit den entscheidenden  
Wettbewerbsvorsprung zu verschaffen.  
Give us the chance to prove the best of  
performance through the best of quality  
– you will be convinced.  
Geben Sie uns die Chance, hohe  
Leistung durch umfassende Qualität zu  
beweisen.  
Wir werden Sie überzeugen.  
h t t p : / / w w w . i n f i n e o n . c o m  
Published by Infineon Technologies AG  
配单直通车
TDA168462HKLA1产品参数
型号:TDA168462HKLA1
生命周期:Obsolete
IHS 制造商:INFINEON TECHNOLOGIES AG
包装说明:DIP,
Reach Compliance Code:compliant
Factory Lead Time:1 week
风险等级:5.83
模拟集成电路 - 其他类型:POWER FACTOR CONTROLLER
控制技术:PULSE WIDTH MODULATION
最小输入电压:8.5 V
标称输入电压:12 V
JESD-30 代码:R-PDIP-T14
长度:19.05 mm
功能数量:1
端子数量:14
最大输出电流:0.1 A
封装主体材料:PLASTIC/EPOXY
封装代码:DIP
封装形状:RECTANGULAR
封装形式:IN-LINE
座面最大高度:4.37 mm
表面贴装:NO
切换器配置:SINGLE
最大切换频率:98 kHz
技术:BIPOLAR
端子形式:THROUGH-HOLE
端子节距:2.54 mm
端子位置:DUAL
宽度:7.62 mm
Base Number Matches:1
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