TDA7293现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号TDA7293的概述

TDA7293芯片概述 TDA7293是一款高功率音频放大器，广泛应用于汽车音响、高保真音响系统以及家庭影院等领域。由意法半导体（STMicroelectronics）设计和制造，TDA7293以其优良的音质和高效率受到了专业音频工程师的认可。其内部集成了多个保护功能，确保了在不良工作条件下的安全性和可靠性。TDA7293的设计目标是能够驱动低阻抗的扬声器，同时保证出色的音频性能。 TDA7293的详细参数 TDA7293的主要参数如下： 1. 电源电压范围：15V至35V，适用于多种电源配置。 2. 输出功率：在4Ω负载条件下，最大输出功率可达100W；在8Ω负载下，输出功率可达70W。 3. 总谐波失真 (THD)：小于0.1%，确保了音质的清晰度。 4. 信噪比 (SNR)：大于90dB，提供广泛的动态范围。 5. 频率响应：20Hz至20kHz，覆盖了大多数音频信号频率。 6....

产品型号TDA7293的Datasheet PDF文件预览

TDA7293

120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY

VERY HIGH OPERATING VOLTAGE RANGE

(±50V)

MULTIPOWER BCD TECHNOLOGY

DMOS POWER STAGE

HIGH OUTPUT POWER (100W @ THD =

10%, R^L= 8 , VS = 40V)

Ω

MUTING/STAND-BY FUNCTIONS

NO SWITCH ON/OFF NOISE

VERYLOW DISTORTION

VERYLOW NOISE

SHORT CIRCUIT PROTECTION

THERMAL SHUTDOWN

Multiwatt15

ORDERING NUMBER: TDA7293V

CLIP DETECTOR

class TV). Thanks to the wide voltage range and

to the high out current capability it is able to sup-

ply the highest power into both 4Ω and 8Ω loads.

The built in muting function with turn on delay

simplifies the remote operation avoiding switching

on-off noises.

Parallel mode is made possible by connecting

more device through of pin11. High output power

can be delivered to very low impedance loads, so

optimizing the thermal dissipation of the system.

MODULARITY (MORE DEVICES CAN BE

EASILY CONNECTED IN PARALLEL TO

DRIVE VERY LOW IMPEDANCES)

DESCRIPTION

The TDA7293 is a monolithic integrated circuit in

Multiwatt15 package, intended for use as audio

class AB amplifier in Hi-Fi field applications

(Home Stereo, self powered loudspeakers, Top-

Figure 1: Typical Application and Test Circuit

+Vs

C7 100nF

C6 1000µF

R3 22K

BUFFER DRIVER

+Vs

+PWVs

22µF

680Ω

IN-

OUT

C1 470nF

IN+

BOOT

LOADER

R1 22K

SGND

(**)

22µF

(*)

BOOTSTRAP

CLIP DET

VMUTE

VSTBY

R5 10K

MUTE

STBY

VCLIP

THERMAL

SHUTDOWN

S/C

PROTECTION

MUTE

STBY

R4 22K

-Vs

-PWVs

STBY-GND

C3 10µF

C4 10µF

C9 100nF

C8 1000µF

D97AU805A

-Vs

(*) see Application note

(**) for SLAVE function

1/13

December1999

TDA7293

PIN CONNECTION (Topview)

-V_S(POWER)

OUT

+V_S(POWER)

BOOTSTRAP LOADER

BUFFER DRIVER

MUTE

STAND-BY

-V_S(SIGNAL)

+V_S(SIGNAL)

BOOTSTRAP

CLIP AND SHORT CIRCUIT DETECTOR

SIGNAL GROUND

NON INVERTING INPUT

INVERTING INPUT

STAND-BY GND

TAB CONNECTED TO PIN 8

D97AU806

QUICK REFERENCE DATA

Symbol

V_S

Parameter

Test Conditions

Min.

±12

Typ.

Max.

æ 50

Unit

Supply Voltage Operating

Closed Loop Gain

Output Power

G_LOOP

V = 45V; R_L= 8 ; THD = 10%

140

110

Ω

P_tot

V_S= ±30V; RL = 4Ω; THD = 10%

SVR

Supply Voltage Rejection

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Supply Voltage (No Signal)

Value

Unit

V_S

V₁

V_STAND-BYGND Voltage Referred to -V_S(pin 8)

Input Voltage (inverting) Referred to -V_S

Maximum Differential Inputs

V₂

±30

V²- V3

V₃

Input Voltage (non inverting) Referred to -V_S

Signal GND Voltage Referred to -V_S

Clip Detector Voltage Referred to -VS

Bootstrap Voltage Referred to -V_S

Stand-by Voltage Referred to -V_S

Mute Voltage Referred to -V_S

V₄

V⁵

120

100

V₆

V₉

V₁₀

V¹¹

V₁₂

I_O

Buffer Voltage Referred to -VS

Bootstrap Loader Voltage Referred to -V_S

Output Peak Current

P_tot

T_op

T_stg, T_j

Power Dissipation T_case= 70°C

Operating Ambient Temperature Range

Storage and Junction Temperature

0 to 70

150

THERMAL DATA

Symbol

Description

Thermal Resistance Junction-case

Typ

Max

Unit

C/W

R_{th j-case}

1.5

2/13

TDA7293

ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit V_S= ±40V, R_L= 8Ω, R_g= 50 Ω;

_amb= 25°C, f = 1 kHz; unless otherwise specified).

Symbol

V_S

Parameter

Supply Range

Test Condition

Min.

Typ.

Max.

Unit

I_q

Quiescent Current

I_b

Input Bias Current

0.3

V_OS

I_OS

Input Offset Voltage

Input Offset Current

RMS Continuous Output Power

-10

0.2

P_O

d = 1%:

R_L= 4Ω; VS = ± 29V,

d = 10%

100

R = 4 ; V = 29V

Ω

Total Harmonic Distortion (**)

P_O= 5W; f = 1kHz

_O= 0.1to 50W; f = 20Hz to 15kHz

0.005

0.1

I_SC

G_V

e_N

Current Limiter Threshold

Slew Rate

6.5

V/ s

Open Loop Voltage Gain

Closed Loop Voltage Gain (1)

Total Input Noise

A = curve

f = 20Hz to 20kHz

R_i

SVR

T_S

Input Resistance

100

kΩ

Supply Voltage Rejection

Thermal Protection

f = 100Hz; V_ripple= 0.5Vrms

DEVICE MUTED

150

160

DEVICE SHUT DOWN

°C

STAND-BY FUNCTION (Ref: to pin 1)

V_{ST on}

V_{ST off}

Stand-by on Threshold

Stand-by off Threshold

1.5

3.5

ATT_st-byStand-by Attenuation

I_{q st-by}

Quiescent Current @ Stand-by

0.5

MUTE FUNCTION (Ref: to pin 1)

V_Mon

V_Moff

Mute on Threshold

Mute off Threshold

3.5

ATT_muteMute AttenuatIon

CLIP DETECTOR

Duty

Duty Cycle ( pin 5)

THD = 1% ; RL = 10K

Ω

to 5V

THD = 10% ;

RL = 10K to 5V

Ω

I_CLEAK

PO = 50W

µA

SLAVE FUNCTION pin 4 (Ref: to pin 8 -V_S)

V_Slave

SlaveThreshold

V_Master

Master Threshold

Note (1): GVmin ≥ 26dB

Note: Pin 11 only for modular connection. Max external load 1MΩ/10 pF, only for test purpose

Note (**): Tested with optimized Application Board (see fig. 2)

3/13

TDA7293

Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)

4/13

TDA7293

APPLICATION SUGGESTIONS (seeTest and Application Circuits of the Fig. 1)

The recommended values of the external components are those shown on the application circuit of Fig-

ure 1. Different values can be used; the following table can help the designer.

LARGER THAN

SUGGESTED

SMALLER THAN

SUGGESTED

COMPONENTS

SUGGESTED VALUE

PURPOSE

R1 (*)

22k

INPUT RESISTANCE

INCREASE INPUT

IMPEDANCE

DECREASE INPUT

IMPEDANCE

R3 (*)

680

CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN

SET TO 30dB (**)

Ω

22k

INCREASE OF GAIN DECREASE OF GAIN

ST-BY TIME

CONSTANT

LARGER ST-BY

ON/OFF TIME

SMALLER ST-BY

ON/OFF TIME;

POP NOISE

10k

MUTE TIME

CONSTANT

LARGER MUTE

ON/OFF TIME

SMALLER MUTE

ON/OFF TIME

0.47 F

INPUT DC

DECOUPLING

HIGHER LOW

FREQUENCY

CUTOFF

22µF

FEEDBACK DC

DECOUPLING

HIGHER LOW

FREQUENCY

CUTOFF

10 F

MUTE TIME

CONSTANT

LARGER MUTE

ON/OFF TIME

SMALLER MUTE

ON/OFF TIME

10µF

ST-BY TIME

CONSTANT

LARGER ST-BY

ON/OFF TIME

SMALLER ST-BY

ON/OFF TIME;

POP NOISE

22 FXN (***)

BOOTSTRAPPING

SIGNAL

DEGRADATION AT

LOW FREQUENCY

C6, C8

C7, C9

1000 F

SUPPLY VOLTAGE

BYPASS

0.1 F

SUPPLY VOLTAGE

BYPASS

DANGER OF

OSCILLATION

(*) R1 = R3 for pop optimization

(**) Closed Loop Gain has to be 26dB

≥

(***) Multiplay this value for the number of modular part connected

Slave function: pin 4 (Ref to pin 8 -VS)

Note:

If in the application, the speakers are connected

via long wires, it is a good rule to add between

the output and GND, a BoucherotCell, in order to

avoid dangerous spurious oscillations when the

speakers terminal are shorted.

MASTER

-V_S+3V

UNDEFINED

-V_S+1V

The suggested Boucherot Resistor is 3.9Ω/2W

and the capacitor is 1µF.

SLAVE

-V_S

D98AU821

5/13

TDA7293

frequency response; moreover, an accurate con-

trol of quiescentcurrent is required.

A local linearizing feedback, provided by differen-

tial amplifier A, is used to fullfil the above require-

ments, allowing a simple and effective quiescent

current setting.

INTRODUCTION

In consumer electronics, an increasing demand

has arisen for very high power monolithic audio

amplifiers able to match, with a low cost, the per-

formance obtained from the best discrete de-

signs.

Proper biasing of the power output transistors

alone is however not enough to guarantee the ab-

sence of crossover distortion.

While a linearization of the DC transfer charac-

teristic of the stage is obtained, the dynamic be-

haviour of the system must be taken into account.

The task of realizing this linear integrated circuit

in conventional bipolar technology is made ex-

tremely difficult by the occurence of 2nd break-

down phoenomenon. It limits the safe operating

area (SOA) of the power devices, and, as a con-

sequence, the maximum attainable output power,

especially in presence of highly reactive loads.

A significant aid in keeping the distortion contrib-

uted by the final stage as low as possible is pro-

vided by the compensation scheme, which ex-

ploits the direct connection of the Miller capacitor

at the amplifier’s output to introduce a local AC

feedback path enclosing the output stage itself.

Moreover, full exploitation of the SOA translates

into a substantial increase in circuit and layout

complexity due to the need of sophisticated pro-

tection circuits.

To overcome these substantial drawbacks, the

use of power MOS devices, which are immune

from secondarybreakdown is highly desirable.

2) Protections

The device described has therefore been devel-

oped in a mixed bipolar-MOS high voltage tech-

nology called BCDII 100/120.

In designing a power IC, particular attention must

be reserved to the circuits devoted to protection

of the device from short circuit or overload condi-

tions.

1) Output Stage

Due to the absence of the 2nd breakdown phe-

nomenon, the SOA of the power DMOS transis-

tors is delimited only by a maximum dissipation

curve dependent on the duration of the applied

stimulus.

The main design task in developping a power op-

erational amplifier, independently of the technol-

ogy used, is that of realization of the output stage.

The solution shown as a principle shematic by

Fig3 represents the DMOS unity - gain output

buffer of the TDA7293.

This large-signal, high-power buffer must be ca-

pable of handling extremely high current and volt-

age levels while maintaining acceptably low har-

monic distortion and good behaviour over

In order to fully exploit the capabilities of the

power transistors, the protection scheme imple-

mented in this device combines a conventional

SOA protection circuit with a novel local tempera-

ture sensing technique which ” dynamically” con-

trols the maximumdissipation.

Figure 3: Principle Schematic of a DMOS unity-gain buffer.

6/13

TDA7293

Figure 4: Turn ON/OFF SuggestedSequence

+Vs

(V)

+40

-40

-Vs

(mV)

ST-BY

PIN #9

(V)

MUTE

PIN #10

(V)

(mA)

OUT

(V)

OFF

ST-BY

PLAY

ST-BY

OFF

MUTE

D98AU817

mute functions, independently driven by two

CMOS logic compatible input pins.

In addition to the overload protection described

above, the device features a thermal shutdown

circuit which initially puts the device into a muting

state (@ Tj = 150 ^oC) and then into stand-by (@

Tj = 160 ^oC).

Full protection against electrostatic discharges on

every pin is included.

The circuits dedicated to the switching on and off

of the amplifier have been carefully optimized to

avoid any kind of uncontrolledaudible transient at

the output.

The sequence that we recommend during the

ON/OFF transients is shown by Figure 4.

Figure 5:

Single Signal ST-BY/MUTE Control

Circuit

The application of figure 5 shows the possibility of

using only one command for both st-by and mute

functions. On both the pins, the maximum appli-

cable range corresponds to the operating supply

voltage.

MUTE

STBY

20K

30K

MUTE/

ST-BY

APPLICATION INFORMATION

HIGH-EFFICIENCY

10K

Constraints of implementing high power solutions

are the power dissipation and the size of the

power supply. These are both due to the low effi-

ciency of conventional AB class amplifier ap-

proaches.

10µF

1N4148

D93AU014

Here below (figure 6) is described a circuit pro-

posal for a high efficiency amplifier which can be

adopted for both HI-FI and CAR-RADIO applica-

tions.

3) OtherFeatures

The device is provided with both stand-by and

7/13

TDA7293

The TDA7293 is a monolithic MOS power ampli-

fier which can be operated at 100V supply voltage

(120V with no signal applied) while delivering out-

put currentsup to ±6.5 A.

The main advantagesoffered by this solution are:

- High power performanceswith limited supply

voltage level.

- Considerablyhigh output power even with high

load values (i.e. 16 Ohm).

With Rl= 8 Ohm, Vs = ±25V the maximum output

power obtainable is 150 W, while with Rl=16

Ohm, Vs = ±40V the maximum Pout is 200 W.

This allows the use of this device as a very high

power amplifier (up to 180W as peak power with

T.H.D.=10 % and Rl = 4 Ohm); the only drawback

is the power dissipation, hardly manageable in

the above power range.

The typical junction-to-case thermal resistance of

the TDA7293 is 1 C/W (max= 1.5 C/W). To

avoid that, in worst case conditions, the chip tem-

perature exceedes 150 ^oC, the thermal resistance

of the heatsink must be 0.038 ^oC/W (@ max am-

bient temperatureof 50 ^oC).

APPLICATION NOTE: (ref. fig. 7)

Modular Application (more Devices in Parallel)

The use of the modular application lets very high

power be delivered to very low impedance loads.

The modular application implies one device to act

as a master and the others as slaves.

As the above value is pratically unreachable; a

high efficiency system is needed in those cases

where the continuousRMS output power is higher

than 50-60 W.

The TDA7293 was designed to work also in

higher efficiency way.

For this reason there are four power supply pins:

two intended for the signal part and two for the

power part.

T1 and T2 are two power transistors that only

operate when the output power reaches a certain

threshold (e.g. 20 W). If the output power in-

creases, these transistors are switched on during

the portion of the signal where more output volt-

age swing is needed, thus ”bootstrapping” the

power supply pins (#13 and #15).

The current generators formed by T4, T7, zener

diodes Z1, Z2 and resistors R7,R8 define the

minimum drop across the power MOS transistors

of the TDA7293. L1, L2, L3 and the snubbers C9,

R1 and C10, R2 stabilize the loops formed by the

”bootstrap” circuits and the output stage of the

TDA7293.

By considering again a maximum average

output power (music signal) of 20W, in case

of the high efficiency application, the thermal

resistance value needed from the heatsink is

2.2^oC/W (Vs =±50 V and Rl= 8 Ohm).

All components (TDA7293 and power transis-

tors T1 and T2) can be placed on a 1.5^oC/W

heatsink, with the power darlingtons electrically

insulated from the heatsink.

Since the total power dissipation is less than that

of a usual class AB amplifier, additional cost sav-

ings can be obtained while optimizing the power

supply, even with a high heatsink .

The slave power stages are driven by the master

device and work in parallel all together, while the

input and the gain stages of the slave device are

disabled, the figure below shows the connections

required to configure two devices to work to-

gether.

The master chip connections are the same as

the normal single ones.

The outputs can be connected together with-

out the need of any ballast resistance.

The slave SGND pin must be tied to the nega-

tive supply.

The slave ST-BY pin must be connected to

ST-BY pin.

The bootstrap lines must be connected to-

gether and the bootstrap capacitor must be in-

creased: for N devices the boostrap capacitor

must be 22µF times N.

The slave Mute and IN-pins must be grounded.

THE BOOTSTRAP CAPACITOR

For compatibility purpose with the previous de-

vices of the family, the boostrap capacitor can be

connected both between the bootstrappin (6) and

the output pin (14) or between the boostrap pin

(6) and the bootstraploader pin (12).

When the bootcap is connected between pin 6

and 14, the maximum supply voltage in presence

of output signal is limited to 100V, due the boot-

strap capacitor overvoltage.

When the bootcap is connected between pins 6

and 12 the maximum supply voltage extend to the

full voltage that the technologycan stand: 120V.

This is accomplished by the clamp introduced at

the bootstrap loader pin (12): this pin follows the

output voltage up to 100V and remains clamped

at 100V for higher output voltages. This feature

lets the output voltage swing up to a gate-source

voltage from the positive supply (V^S-3 to 6V)

BRIDGE APPLICATION

Another application suggestion is the BRIDGE

configuration,where two TDA7293 are used.

In this application, the value of the load must not

be lower than 8 Ohm for dissipation and current

capability reasons.

A suitable field of application includes HI-FI/TV

subwoofersrealizations.

8/13

TDA7293

Figure 6: High Efficiency Application Circuit

+50V

BC394

270

1N4001

BDX53A

D1 BYW98100

C12 330nF

BC393

+25V

R17 270

L1 1µH

D3 1N4148

20K

Z1 3.9V

C11 22µF

R20

20K

1000µF

63V

100nF

1000µF

35V

100nF

330nF

R3 680

R12

13K

3.3K

C16

1.8nF

R22

10K

R16

13K

L3 5µH

TDA7293

OUT

PLAY

C13 10µF

GND

R18 270

C15

22µF

P_ot

R13 20K

R14 30K

R15 10K

ST-BY

3.3K

C17

1.8nF

R23

10K

1N4148

R21

20K

1000µF

63V

100nF

1000µF

35V

100nF

C10

330nF

Z2 3.9V

C14

10µF

L2 1µH

D4 1N4148

BC394

D2 BYW98100

R19 270

-25V

270

R10

270

R11

20K

BDX54A

1N4001

BC393

-50V

D97AU807C

Figure 6a: PCBand ComponentLayout of the fig. 6

9/13

TDA7293

Figure 6b:

PCB - SolderSide of the fig. 6.

Figure 7: Modular ApplicationCircuit

+Vs

C7 100nF

C6 1000µF

R3 22K

MASTER

BUFFER

DRIVER

+Vs

+PWVs

22µF

680Ω

IN-

OUT

C1 470nF

IN+

C10

100nF

BOOT

LOADER

R1 22K

2Ω

SGND

MUTE

STBY

47µF

VMUTE

VSTBY

R5 10K

R4 22K

BOOTSTRAP

CLIP DET

MUTE

THERMAL

SHUTDOWN

S/C

PROTECTION

STBY

-Vs

STBY-GND

-PWVs

C4 10µF

C9 100nF

C8 1000µF

C3 10µF

-Vs

+Vs

C7 100nF

C6 1000µF

BUFFER

DRIVER

+Vs

+PWVs

IN-

OUT

IN+

BOOT

LOADER

SLAVE

SGND

MUTE

STBY

BOOTSTRAP

THERMAL

SHUTDOWN

S/C

PROTECTION

STBY

-Vs

-PWVs

STBY-GND

C9 100nF

C8 1000µF

D97AU808C

-Vs

10/13

TDA7293

Figure 8a: ModularApplication P.C. Board and Component Layout (scale 1:1) (Component SIDE)

Figure 8b: Modular Application P.C. Board and ComponentLayout (scale 1:1) (Solder SIDE)

11/13

TDA7293

inch

DIM.

OUTLINE AND

MIN. TYP. MAX. MIN. TYP. MAX.

MECHANICAL DATA

0.197

0.104

0.063

2.65

1.6

0.039

0.49

0.66

1.02

0.55 0.019

0.75 0.026

0.022

0.030

1.27

1.52 0.040 0.050 0.060

17.53 17.78 18.03 0.690 0.700 0.710

19.6

0.772

20.2

0.795

21.9

21.7

22.2

22.1

22.5 0.862 0.874 0.886

22.5 0.854 0.870 0.886

17.65

18.1 0.695

0.713

17.25 17.5 17.75 0.679 0.689 0.699

10.3

2.65

4.25

4.63

1.9

10.7

10.9 0.406 0.421 0.429

2.9 0.104 0.114

4.55

5.08

4.85 0.167 0.179 0.191

5.53 0.182 0.200 0.218

2.6

0.075

0.102

0.152

Dia1

1.9

Multiwatt15 V

3.65

3.85 0.144

12/13

TDA7293

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is

granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are

subject to change withoutnotice. This publicationsupersedes and replaces all informationpreviously supplied. STMicroelectronics products

are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics.

The ST logois a registered trademark of STMicroelectronics

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -

Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

http://www.st.com

13/13

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TDA7293HS产品参数

型号:	TDA7293HS
Brand Name：	STMicroelectronics
是否Rohs认证：	符合
生命周期：	Not Recommended
IHS 制造商：	STMICROELECTRONICS
零件包装代码：	ZFM
包装说明：	MULTIWATT-15
针数：	15
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
HTS代码：	8542.33.00.01
Factory Lead Time：	12 weeks
风险等级：	2.23
Samacsys Confidence：	4
Samacsys Status：	Released
Samacsys PartID：	222585
Samacsys Pin Count：	15
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	Other
Samacsys Footprint Name：	Multiwatt15H
Samacsys Released Date：	2019-04-11 14:58:24
Is Samacsys：	N
标称带宽：	20 kHz
商用集成电路类型：	AUDIO AMPLIFIER
增益：	30 dB
谐波失真：	10%
JESD-30 代码：	R-PZFM-T15
JESD-609代码：	e3
信道数量：	1
功能数量：	1
端子数量：	15
最高工作温度：	70 °C
最低工作温度：
标称输出功率：	100 W
封装主体材料：	PLASTIC/EPOXY
封装代码：	ZIP
封装等效代码：	ZIP15H,.1,.8TB
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	+-40 V
认证状态：	Not Qualified
子类别：	Audio/Video Amplifiers
最大压摆率：	100 mA
最大供电电压 (Vsup)：	50 V
最小供电电压 (Vsup)：	12 V
表面贴装：	NO
技术：	BCDMOS
温度等级：	COMMERCIAL
端子面层：	Tin (Sn)
端子形式：	THROUGH-HOLE
端子节距：	1.27 mm
端子位置：	ZIG-ZAG
处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

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