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TDA7400

ADVANCED CAR SIGNAL PROCESSOR

FULLY INTEGRATED SIGNAL PROCESSOR

OPTIMIZED FOR CAR RADIO APPLICA-

TIONS

FULLY PROGRAMMABLE BY I²C BUS

INCLUDES AUDIOPROCESSOR, STEREO -

DECODER WITH NOISE BLANKER AND

MULTIPATH DETECTOR

PROGRAMMABLE ROLL-OFF COMPENSA-

TION

TQFP44

NO EXTERNAL COMPONENTS

ORDERING NUMBER: TDA7400

DESCRIPTION

The TDA7400D is the newcomer of the CSP fam-

ily introduced by TDA7460/61. It uses the same

innovative concepts and design technologies al-

lowing fully software programmability through I²C

bus and overall cost optimisation for the system

designer.

phisticated stereoblend and noise cancellation

circuitry.

Strength points of the CSP approach are flexibility

and overall cost/room saving in the application,

combined with high performances.

The device includes an audioprocessor with con-

figurable inputs and absence of external compo-

nents for filter settings, a last generation

stereodecoder with multipath detector and a so-

AUDIO PROCESSOR PART

BLOCK DIAGRAM

SMUTE

22

CDL CDGND CDR

5

3

1

34

35

39

38

40

37

30

32

29

31

OUT LR

OUT LF

OUT RR

OUT RF

OUT LR

OUT LF

OUT RR

OUT RF

2

CDROUT

CDLOUT

AM

SOFT

MUTE

VOLUME

TREBLE

BASS

4

10

INPUT

MULTIPLEXER

23

24

19

18

+

44

43

SCL

TAPE R

TAPE L

AUTO ZERO

DIGITAL CONTROL

I²C BUS

SDA

MUXR

MUXL

MUX R

MUX L

8

7

PH+

PH-

FM_R

FM_L

DEMODULATOR

+ STEREO ADJUST

+ STEREO BLEND

12

HIGH

CUT

CONTROL

PILOT

CANCELLATION

MPX

80KHz

LP

25KHz

LP

S & H

21

QUAL.

QUAL

27

41

V_S

D

PIL

DET

SUPPLY

PLL

MULTIPATH-

DETECTOR

NOISE

BLANKER

V_REF

PULSE

FORMER

A

26

42

15

16

MPOUT

14

D98AU852B

GND CREF

MPIN

LEVEL

July 1999

1/28

TDA7400

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

10.5

Unit

V

V_S

T^amb

T^stg

Operating Supply Voltage

Operating Ambient Temperature Range

Operating Storage Temperature Range

-40 to 85

-55 to 150

°C

SUPPLY

Symbol

V^S

Parameter

Supply Voltage

Test Condition

Min.

7.5

25

Typ.

9

Max.

10

Unit

V

I^S

Supply Current

V_S= 9V

30

60

55

35

mA

dB

SVRR

Ripple Rejection @ 1KHz

Audioprocessor (all filters flat)

Stereodecoder + Audioprocessor

50

45

ESD

All pins are protected against ESD according to the MIL883 standard.

PIN CONNECTION

44 43 42 41 40 39 38 37 36 35 34

1

2

3

4

5

6

7

8

9

CDR

CDROUT

CDG

33

32

31

30

29

28

27

26

25

24

23

N.C.

OUT LF

OUT RF

OUT LR

OUT RR

N.C.

CDLOUT

CDL

N.C.

PHONE-

PHONE+

N.C.

V

S

GND

N.C.

SDA

SCL

AM

10

11

N.C.

12 13 14 15 16 17 18 19 20 21 22

D98AU853

THERMAL DATA

Symbol

Parameter

Value

Unit

R^th-jpins

Thermal Resistance Junction-pins

Max

65

°C/W

2/28

TDA7400

PIN DESCRIPTION

N.

1

Name

VREF

CREF

TAPEL

TAPER

CDR

Function

Type

Reference Voltage Output

Reference Capacitor Pin

Tape Input Left

I

S

I

2

3

4

Tape Input Right

I

5

CD Right Channel Input

CD Input Common Ground

CD Input Left Channel

Differential Phone Input -

Differential Phone Input +

AM Input

I

6

CDGND

CDL

I

7

I

8

PH -

I

9

PH +

I

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

AM

I

MPX

FM Stereodecoder Input

Level Input Stereodecoder

Multipath Input

I

LEVEL

MPIN

I

MPOUT

MUXL

MUXR

QUAL

SMUTE

SCL

Multipath Output

O

I

Multiplexer Output Left Channel

Multiplexer Output Right Channel

Stereodecoder Quality Output

Soft Mute Drive

I²C Clock Line

I²C Data Line

I

SDA

I/O

S

O

GND

Supply Ground

VS

Supply Voltage

OUTRR

OUTLR

OUTRF

OUTLF

ACOUTR

ACOUTL

Right Rear Speaker Output

Left Rear Speaker Output

Right Front Spaeaker Output

Left Front Speaker Output

Pre-speaker AC Output Right Channel

Pre-speaker AC Output Left Channel

Pin type legenda: I = Input O = OutputI/O = Input/Output S = Supply nc = not connected

3/28

TDA7400

Input Multiplexer

Quasi-differentialCD and cassette stereo input

AM mono input

Treble Control

Phone differential input

Multiplexer signal after In-Gain available at

separate pins

2nd order frequencyresponse

Center frequencyprogrammable in 4 steps

±15 x 1dB steps

Volume control

Speaker Control

1dB attenuator

4 independentspeaker controls in 1dB steps

Max. gain 15dB

Max. attenuation79dB

max gain 15dB

max. attenuation79dB

Bass Control

Mute Functions

2nd order frequencyresponse

Direct mute

Center frequencyprogrammablein 4(5) steps

DC gain programmable

±15 x 1dB steps

Digitally controlled softmute with 4 programmable

mute time

DESCRIPTION OF THE AUDIOPROCESSOR

PART

ELECTRICAL CHARACTERISTICS (V^S= 9V; Tamb = 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz;

unless otherwise specified).

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

INPUT SELECTOR

R_in

Input Resistance

all inputs except Phone

70

2.2

80

-1

100

2.6

100

0

130

K

Ω

V_CL

Clipping Level

V_RMS

dB

S_IN

Input Separation

Min. Input Gain

Max. Input Gain

Step Resolution

DC Steps

G^{IN MIN}

G^{IN MAX}

G_STEP

V_DC

1

17

1.5

5

dB

13

0.5

-5

15

1

dB

Adjacent Gain Step

G_MINto G_MAX

0.5

5

mV

-10

10

DIFFERENTIAL CD STEREO INPUT

Rin

CMRR

e_N

Input Resistance

Differential

70

45

100

70

130

KΩ

Common Mode

K

Ω

Common Mode Rejection Ratio V_CM= 1_VRMS@ 1KHz

V_CM= 1_VRMS@ 10KHz

dB

60

Output Noise @ Speaker

Outputs

20Hz to 20KHz flat; all stages

0dB

6

15

V

µ

DIFFERENTIAL PHONE INPUT

R_in

Input Resistance

Differential

40

56

70

60

K

Ω

CMRR

Common Mode Rejection Ratio V_CM= 1_VRMS@ 1KHz

V_CM= 1_VRMS@ 10KHz

dB

4/28

TDA7400

ELECTRICAL CHARACTERISTICS

(continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

VOLUME CONTROL

GMAX

A^MAX

A_STEP

E_A

Max Gain

13

70

15

79

1

17

dB

mV

Max Attenuation

Step Resolution

0.5

-1.25

-4

1.5

1.25

3

Attenuation Set Error

G = -20 to 20dB

0

G = -60 to 20dB

0

E_T

Tracking Error

DC Steps

2

V_DC

Adjacent Attenuation Steps

From 0dB to G_MIN

0.1

0.5

3

5

SOFT MUTE

AMUTE

Mute Attenuation

80

100

0.48

0.96

40.4

324

dB

ms

V

T^D

Delay Time

T1

T2

T3

T4

1

2

20

60

600

1

200

V_THlow

V_THhigh

R_PD

Low Threshold for SM Pin¹

High Threshold for SM Pin

Internal Pull-up Resistor

2.5

70

V

100

130

K

Ω

BASS CONTROL

CRANGE

A_STEP

f_C

Control Range

±13

0.5

54

±15

1

±17

1.5

66

dB

Hz

Step Resolution

Center Frequency

f_C1

f_C2

f_C3

f_C4

60

70

80

63

77

72

88

90

100

110

(150)⁽²⁾

Q^BASS

Quality Factor

Bass-Dc-Gain

Q1

0.9

1.1

1.3

1.8

-1

1

1.25

1.5

2

1.1

1.4

1.7

2.2

1

Q²

Q³

Q⁴

DC^GAIN

DC = off

DC = on

0

dB

3.5

4.4

5.5

TREBLE CONTROL

C_RANGE

A_STEP

f^C

Control Range

13

15

1

17

±

dB

±

Step Resolution

0.5

8

1.5

12

15

18

21

dB

Center Frequency

fC1

f^C2

f^C3

f^C4

10

12.5

15

KHz

10

12

14

17.5

1) The SM pin is active low (Mute = 0)

2) See Note in ProgrammingPart

5/28

TDA7400

ELECTRICAL CHARACTERISTICS

(continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

SPEAKER ATTENUATORS

RIN

G^MAX

A_MAX

A_STEP

A_MUTE

E_E

Input Impedance

35

13

50

15

-79

1

65

17

KΩ

dB

mV

Max Gain

Max Attenuation

Step Resolution

Output Mute Attenuation

Attenuation Set Error

DC Steps

-70

0.5

80

1.5

90

2

±

V^DC

Adjacent Attenuation Steps

d = 0.3%

0.1

2.6

5

AUDIO OUTPUTS

V_CLIP

Clipping Level

2.2

2

V_RMS

KΩ

nF

Ω

RL

Output Load Resistance

Output Load Capacitance

Output Impedance

C^L

10

120

4.7

R_OUT

V_DC

30

DC Voltage Level

4.3

4.5

V

GENERAL

e_NO

Output Noise

BW = 20 Hz to 20 KHz

output muted

3

15

µV

BW = 20 Hz to 20 KHz

all gain = 0dB

6.5

S/N

d

Signal to Noise Ratio

Distortion

all gain = 0dB flat; V^O= 2VRMS

102

96

110

100

dB

bass treble at 12dB;

a-weighted; V_O= 2.6V_RMS

V^IN= 1VRMS; all stages 0dB

0.002

0.05

100

0

0.1

%

V^IN= 1VRMS; Bass& Treble= 12dB

S_C

E_T

Channel separation Left/Right

Total Tracking Error

80

-1

-2

dB

A_V= 0 to -20dB

1

2

A_V= -20 to -60dB

0

BUS INPUTS

V_IL

V_IH

I_IN

Input Low Voltage

d = 0.3%

0.8

V

Input High Voltage

Input Current

2.5

-5

V_IN= 0.4V

IO = 1.6mA

5

A

µ

V^O

Output Voltage SDA

Acknowledge

0.4

V

6/28

TDA7400

Stereodecoder Part

ELECTRICAL CHARACTERISTICS (VS = 9V; deemphasistime constant = 50µs,

MPX

amb

V

= 500mV(75KHzdeviation), fm= 1KHz, Gv = 6dB, T

= 27°C; unless otherwise specified).

Symbol

Parameter

MPX Input Level

Test Condition

Gv = 3.5dB

Min.

Typ.

0.5

100

3.5

11

Max.

1.25

130

Unit

V_in

R_in

V_RMS

Input Resistance

Min. Input Gain

Max. Input Gain

Step Resolution

70

1.5

8.5

1.75

35

K

Ω

G_MIN

G_MAX

G_STEP

SVRR

4.5

dB

12.5

3.25

2.5

60

Supply Voltage Ripple

Rejection

V^ripple= 100mV; f = 1KHz

Max. channel Separation

Total Harmonic Distortion

30

50

dB

%

α

THD

0.02

0.3

S N

+

Signal plus Noise to Noise

Ratio

A-weighted, S = 2V^rms

80

91

dB

N

MONO/STEREO-SWITCH

VPTHST1

V^PTHST0

V^PTHMO1

V_PTHMO0

Pilot Threshold Voltage

for Stereo, PTH = 1

for Stereo, PTH = 0

for Mono, PTH = 1

10

15

7

15

25

12

19

25

35

17

25

mV

Pilot Threshold Voltage

10

PLL

∆f/f

Capture Range

0.5

%

DEEMPHASIS and HIGHCUT

Deemphasis Time Constant

Bit 7, Subadr, 10 = 0,

V^LEVEL>> VHCH

25

50

75

s

τHC50

τ^HC75

τ^HC50

τ^HC75

µ

Deemphasis Time Constant

Highcut Time Constant

Bit 7, Subadr, 10 = 1,

100

200

300

V

_LEVEL>> V_HCH

Bit 7, Subadr, 10 = 0,

_LEVEL>> V_HCL

Bit 7, Subadr, 10 = 1,

_LEVEL>> V_HCL

100

150

225

V

µs

V

STEREOBLEND-andHIGHCUT-CONTROL

REF5V

TC^REF5V

L_Gmin

Internal Reference Voltage

Temperature Coefficient

Min. LEVEL Gain

4.7

5

3300

0

5.3

V

ppm

-1

8

1

dB

L_Gmax

Max. LEVEL Gain

10

12

1

dB

L_Gstep

LEVEL Gain Step Resolution

Min. Voltage for Mono

Step Resolution

0.3

25

54

2.2

38

62

5

0.67

29

dB

VSBL_min

VSBL_max

VSBL_step

VHCH^min

VHCH^max

VHCH^step

VHCL_min

VHCL_max

VHCL_step

33

62

6.2

46

70

12

22

38

6.2

%REF5V

%VHCH

58

4.2

42

Min. Voltage for NO Highcut

Step Resolution

66

8.4

17

Min. Voltage for FULL Highcut

Max. Voltage for FULL Highcut

Step Resolution

12

28

2.2

33

4.2

7/28

TDA7400

ELECTRICAL CHARACTERISTICS

(continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

Carrier and harmonicsuppression at the output

α19

Pilot Signal f = 19KHz

Subcarrier f = 38KHz

Subcarrier f = 57KHz

Subcarrier f = 76KHz

40

50

dB

α38

75

62

90

57

α

α76

Intermodulation(Note 1)

2

f

_mod= 10KHz, f_spur= 1KHz

65

75

dB

α

3

f

_mod= 13KHz, f_spur= 1KHz

α

Traffic Ratio (Note 2)

57

Signal f = 57KHz

70

75

dB

α

SCA - SubsidiaryCommunicationsAuthoorization (Note 3)

α67

Signal f = 67KHz

ACI - Adjacent Channel Interference (Note 4)

114

Signal f = 114KHz

95

84

dB

α

α190

Signal f = 190KHz

Notes to the characteristics:

V_{O signal}

at1KHz

)(

(

)

1. Intermodulation Suppression:

α2 =

α3 =

; f_s= (2 x 10KHz) − 19KHz

; f_s= (3 x 13KHz) − 38KHz

V_{O(spurious)(at}1KHz)

V_{O(signal)(at1KHz)}

V_{O(spurious)(at}1KHz)

measured with: 91% pilot signal; fm = 10kHz or 13kHz.

2. TrafficRadio (V.F.) Suppression: measured with: 91% stereo signal; 9% pilot signal; fm=1kHz; 5% subcarrier (f = 57kHz,

fm = 23Hz AM, m = 60%)

V_{O(signal)(at1KHz)}

57 V.W F.

) =

α

(

>

+⁄

23KHz)

−

V_O

_at1KHz

(spurious)(

3. SCA ( Subsidiary Communications Authorization ) measured with: 81% mono signal; 9% pilot signal; fm = 1kHz; 10%SCA - subcarrier

( fs = 67kHz, unmodulated ).

V_{O(signa)(lat1KHz)}

67

; F

_S= (

2 x 38KHz 67KHz

) −

α

=

V_O

_at9KHz)

(spurious)(

V_{O signal}

at1KHz

)(

(

)

4. ACI ( Adjacent Channel Interference ):

α114 =

α190 =

; F_S= 110KHz − (3 x 38KHz)

; F_S= 186KHz − (5 x 38KHz)

V_{O(spurious)(at}4KHz)

V_{O(signal)(at1KHz)}

V_{O(spurious)(at}4KHz)

measured with: 90% mono signal; 9% pilot signal; fm =1kHz; 1% spurious signal ( fs = 110kHz or 186kHz, unmodulated).

8/28

TDA7400

NOISE BLANKER PART

very low offset current during hold time due to

opamps wMOS inputs

four selectable pulse suppressiontimes

programmable noise rectifier charge/discharge

current

internal 2nd order 140kHz high pass filter

programmable trigger threshold

trigger threshold dependent on high frequency

noise with programmable gain

additional circuits for deviation and field-

strength dependenttrigger adjustment

ELECTRICAL CHARACTERISTICS (continued)

Symbol

V_TR

Parameter

Test Condition

meas. with V_PEAK= 0.9V NBT = 111

NBT = 110

Min.

(c)

Typ.

30

Max.

(c)

Unit

mV_OP

mVOP

mV_OP

mVOP

mV_OP

V

Trigger Threshold ^{0) 1)}

(c)

35

(c)

NBT = 101

(c)

40

(c)

NBT = 100

(c)

45

(c)

NBT = 011

(c)

50

(c)

NBT = 010

(c)

55

(c)

NBT = 001

(c)

60

(c)

NBT = 000

(c)

65

(c)

VTRNOISE

Noise Controlled Trigger meas. with VPEAK = 1.5V NCT = 00

(c)

260

220

180

140

0.9

1.7

2.5

0.9(off)

1.2

2.0

2.8

0.9(off)

1.4

1.9

2.4

38

(c)

Threshold ²⁾

NCT = 01

(c)

NCT = 10

NCT = 11

(c)

V_RECT

Rectifier Voltage

V_MPX= 0mV

NRD ⁶⁾= 00

0.5

1.5

2.2

0.5

0.9

1.7

2.5

0.5

0.9

1.7

2.1

TBD

(c)

1.3

2.1

2.9

1.3

1.5

2.3

3.1

1.3

1.5

2.3

3.1

TBD

(c)

V^MPX= 50mV; f = 150KHz

V^MPX= 200mV; f = 150KHz

V

V_{RECT DEV}

deviation dependent

rectifier Voltage ³⁾

means. with

V^MPX= 800mV

(75KHz dev.)

OVD = 11

OVD = 10

OVD = 01

OVD = 00

FSC = 11

FSC = 10

FSC = 01

FSC = 00

BLT = 00

V_OP

V

VRECT FS

Fieldstrength Controlled

Rectifier Voltage ⁴⁾

means. with

V

_MPX= 0mV

_LEVEL<< V_SBL

V

(fully mono)

V

T_S

Suppression Pulse

Signal HOLDN

in Testmode

s

µ

5)

Duration

BLT = 10

32

BLT = 01

25.5

22

µs

BLT = 00

µs

V_RECTADJ

Noise Rectifier

Signal PEAK in

Testmode

NRD = 00 ⁶⁾

NRD = 01 ⁶⁾

NRD = 10 ⁶⁾

NRD = 11 ⁶⁾

PCH = 0 ⁷⁾

PCH = 1 ⁷⁾

0.3

0.8

1.3

2.0

10

V/ms

mV/µs

discharge adjustment ⁶⁾

(c)

SR^PEAK

Noise Rectifier Charge

Signal PEAK in

Testmode

(c)

20

(c)

(c) = by design/characterization functionally guaranteed through dedicated test mode structure

9/28

TDA7400

ELECTRICAL CHARACTERISTICS

(continued)

Symbol

Parameter

Test Condition

Min.

(c)

Typ.

0.3

Max.

(c)

Unit

V/ms

V_ADJMP

Noise Rectifier adjustment

through Multipath⁸⁾

Signal PEAK in

Testmode

MPNB = 00 ⁸⁾

MPNB = 01 ⁸⁾

MPNB = 10 ⁸⁾

MPNB = 11 ⁸⁾

(c)

0.5

(c)

0.7

(c)

0.9

(c)

0) All Thresholds are measured using a pulse withTR =2µs, THIGH = 2µs and TF = 10µs. The repetitionrate must not increase the PEAKvoltage.

1) NBT represents the Noiseblanker Byte bits D₂, D₀for the noise blanker trigger threshold

2) NAT represents the Noiseblanker Byte bit pair D₄, D₃for the noise controlled triggeradjustment

3) OVD represents the Noiseblanker Byte bit pair D₇, D₆for the over deviation detector

4) FSC represents the Fieldstrength Byte bit pair D₁, D₀for the fieldstrengthcontrol

5) BLT represents the Speaker RR Byte bit pair D₇, D6 for the blanktime adjustment

6) NRD represents the Configuration-Byte bit pair D¹, D0 for the noise rectifier discharge-adjustment

7) PCH represents the Stereodecoder-Byte bit D⁵for the noise rectifier charge-current adjustment

8) MPNB represents the HighCut-Byte bit D⁷and the Fieldstrength-Byte D7 for the noise rectifier multipath adjustment

V

IN

V

OP

DC

Time

D97AU636

T

F

R

HIGH

Figure 1. Trigger Threshold vs.VPEAK

Figure 2. Deviation Controlled Trigger Adjust-

ment

VTH

V

PEAK

(V

)

OP

00

01

260mV(00)

220mV(01)

180mV(10)

140mV(11)

2.8

2.0

10

MIN. TRIG. THRESHOLD

NOISE CONTROLLED

TRIG. THRESHOLD

1.2

0.9

DETECTOR OFF (11)

65mV

30mV

8 STEPS

DEVIATION(KHz)

D97AU649

20

32.5

45

75

V

PEAK(V)

0.9V

D97AU648

1.5V

10/28

TDA7400

Figure 3. Fieldstrength Controlled Trigger Adjustment

V

PEAK

MONO

STEREO

»3V

2.4V(00)

1.9V(01)

1.4V(10)

0.9V

E’

NOISE

ATC_SB OFF (11)

noisy signal

good signal

D97AU650

two pin solution fully independent usable for

external programming

Multipath Detector

selectable internalinfluence on Stereoblend

Internal 19kHz band pass filter

Programmable band pass and rectifier gain

ELECTRICAL CHARACTERISTICS (continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

f^CMP

Center Frequency of Multipath-

Bandpass

stereodecoder locked on Pilottono

19

KHz

G_BPMP

Bandpass Gain

Rectifier Gain

bits D₂, D₁configuration byte = 00

bits D₂, D₁configuration byte = 10

bits D₂, D₁configuration byte = 01

bits D₂, D₁configuration byte = 11

bits D₇, D₆configuration byte = 00

bits D₇, D₆configuration byte = 01

bits D₇, D₆configuration byte = 10

bits D₇, D₆configuration byte = 11

bit D₅configuration byte = 0

6

dB

12

16

18

7.6

4.6

0

G_RECTMP

off

0.5

1.0

1

I_CHMP

I_DISMP

Rectifier Charge Current

A

µ

bit D₅configuration byte = 1

Rectifier Discharge Current

0.5

1.5

mA

Quality Detector

Symbol

Parameter

Multipath Influence Factor

Test Condition

Min.

Typ.

Max.

Unit

A

bit D₇High-Cut byte +

bit D₇Fieldstrength byte +

00

01

10

11

0.7

0.85

1.00

1.15

11/28

TDA7400

erated through the leakage current of the cou-

pling capacitors, are not cancelled).

Input Multiplexer

The auto-zeroing is started every time the DATA-

BYTE 0 is selected and takes a time of max.

0.3ms. To avoid audible clicks the audioproces-

sor is muted before the volume stage during this

time.

CD quasi differential

Cassette stereo

Phone differential

AM mono

Stereodecoderinput.

AutoZero Remain

In some cases, for example if the µP is executing

a refresh cycle of the I²C bus programming, it is

not useful to start a new AutoZero action because

no new source is selected and an undesired mute

would appear at the outputs. For such applica-

tions the TDA7400D could be switched in the

”Auto Zero Remain mode” (Bit 6 of the subad-

dress byte). If this bit is set to high, the DAT-

ABYTE 0 could be loaded without invoking the

AutoZeroand the old adjustmentvalue remains.

Input stages

Most of the input stages have remained the same

as in preceeding ST audioprocessors with excep-

tion of the CD inputs (see figure 4).

In the meantime there are some CD players in

the market having a significant high source im-

pedance which affects strongly the common-

mode rejection of the normal differential input

stage. The additional buffer of the CD input

avoids this drawback and offers the full common-

mode rejection even with those CD players.

Multiplexer Output

The output of the Cd stage is permanently avail-

able of the Cd out-pins

The output signal of the Input Multiplexer is avail-

able at separate pins (please see the Blockdia-

gram). This signal represents the input signal am-

plifier by the In Gain stage and is also going into

the Mixer stage.

AutoZero

In order to reduce the number of pins there is no

AC coupling between the In-Gain and the follow-

ing stage, so that any offset generated by or be-

fore the In-Gain stage would be transferred or

even amplifiedto the output.

To avoid that effect a special offset cancellation

stage called AutoZero is implemented.

This stage is located before the volume-block to

eliminate all offsets generated by the Stereode-

coder, the Input Stage and the In-Gain (Please

notice that externally generated offsets, e.g. gen-

Softmute

The digitally controlled softmute stage allows

muting/demuting the signal with a I²C bus pro-

grammable slope. The mute process can either

be activated by the softmute pin or by the I²C

bus. The slope is realized in a special S shaped

curve to mute slow in the critical regions (see fig-

ure 5).

For timing purposes the Bit 3 of the I²C bus out-

put register is set to 1 from the start of muting un-

Figure 4. Input stages

15K

CD+

CD-

1

100K

+

-

CD OUT

15K

PHONE+

+

-

15K

IN GAIN

PHONE-

CASSETTE

100K

AM

STEREODECODER

MPX

D98AU854A

12/28

TDA7400

Quality Factors

Figure 5. Softmute Timing

Figure 8 shows the four possible quality factors 1,

1.25, 1.5 and 2.

1

DC Mode

EXT.

MUTE

In this mode the DC gain is increased by 5.1dB.

In addition the programmed center frequency and

quality factor is decreased by 25% which can be

used to reach alternative center frequencies or

quality factors.

+SIGNAL

REF

-SIGNAL

TREBLE

1

I²C BUS

OUT

There are two parameters programmable in the

treble stage (see figs 10, 11):

D97AU634

Time

Attenuation

Figure 10 shows the attenuation as a function of

frequency at a center frequencyof 17.5KHz.

Note: Please notice that a started Mute action is always terminated

and could not be interrupted by a change of the mute signal.

til the end of demuting.

Center Frequency

Figure 11 shows the four possible Center Fre-

quency (10, 12.5, 15 and 17.5kHz).

Bass

There are four parameters programmable in the

bass stage: (see figs 6, 7, 8, 9):

Speaker Attenuator

The speaker attenuators have exactely the same

structure and range like the Volume stage.

FUNCTIONAL DESCRIPTION OF STEREODE-

CODER

Attenuation

Figure 6 shows the attenuation as a function of

frequency at a center frequency at a center fre-

quency of 80Hz.

The stereodecoder part of the TDA7400D (see

Fig. 12) contains all functions necessary to de-

modulate the MPX signal like pilot tone depend-

ent MONO/STEREO switching as well as

”stereoblend”and ”highcut” functions.

Central Frequency

Figure 7 shows the four possible center frequen-

cies 60,70,80and 100Hz.

Figure 7. Bass Center @ Gain = 14dB, Q = 1

Figure 6. Bass Control @ fc = 80Hz, Q = 1

15.0

12.5

10.0

7.5

10.0

5.0

0.0

5.0

-5.0

-10.0

-15.0

2.5

0.0

10.0

100.0

1.0K

10.0K

10.0

100.0

1.0K

10.0K

13/28

TDA7400

Figure 8. Bass Quality factors @ Gain = 14dB,

Figure 9. Bass normal and DC Mode @ Gain =

fc = 80Hz

14dB, fc = 80Hz

15.0

12.5

10.0

7.5

12.5

10.0

7.5

5.0

2.5

0.0

10.0

100.0

1.0K

10.0K

10.0

100.0

1.0K

10.0K

Note: In general the center frequency, Q and DC-mode can be set

independently. The exceptionfromthis ruleisthe mode(5/xx1111xx)

where the center frequency is set to 150Hz instead of 100Hz.

Figure 10. Treble Control @ fc = 17.5KHz

Figure 11. Treble Center Frequencies

15.0

@ Gain = 14dB

15.0

10.0

5.0

12.5

10.0

7.5

0.0

-5.0

5.0

2.5

-10.0

-15.0

0.0

10.0

100.0

1.0K

10.0K

10.0

100.0

1.0K

10.0K

audioprocessor’s softmute and the high-ohmic

mute of the stereodecoder. If the stereodecoder

is selected and a softmute command is sent (or

activated through the SM pin) the stereodecoder

Stereodecoder Mute

The TDA7400D has a fast and easy to control

RDS mute function which is a combination of the

14/28

TDA7400

will be set automatically to the high-ohmic mute

condition after the audio signal has been soft-

muted.

attenuate spikes and nose and acts as an anti al-

lasing filter for the following switch capacitor fil-

ters.

Hence a checking of alternate frequencies could

be performed. To release the system from the

mute condition simply the unmute command must

be sent: the stereodecoder is unmuted immedi-

ately and the audioprocessor is softly unmuted.

Fig. 13 shows the output signal V_Oas well as the

internal stereodecoder mute signal. This influ-

ence of Softmute on the stereodecoder mute can

be switched off by setting bit 3 of the Softmute

byte to ”0”. A stereodecoder mute command (bit

0, stereodecoder byte set to ”1”) will set the

stereodecoder in any case independently to the

high-ohmic mute state.

Demodulator

In the demodulator block the left and the right

channel are separated from the MPX signal. In

this stage also the 19 kHz pilot tone is cancelled.

For reaching a high channel separation the

TDA7400D offers an I2C bus programmable roll-

off adjustment which is able to compensate the

lowpass behaviour of the tuner section. If the

tuner attenuation at 38kHz is in a range from

13.8% to 24.6% the TDA7400D needs no exter-

nal network in front of the MPX pin. Within this

range an adjustment to obtain at least 40dB

channel separation is possible.

The bits for this adjustment are located together

with the fieldstrength adjustment in one byte. This

gives the possibility to perform an optimization

step during the production of the carradio where

the channel separation and the fieldstrength con-

trol are trimmed.

If any other source than the stereodecoder is se-

lected the decoder remains muted and the MPX

pin is connectedto Vref to avoid any discharge of

the coupling capacitor through leakage currents.

Ingain + Infilter

The Ingain stage allows to adjust the MPX signal

to a magnitude of about 1Vrms internally which is

the recommended value. The 4th order input filter

has a corner frequency of 80KHz and is used to

The setup of the Stereoblend characteristics

which is programmable in a wide range is de-

scribed in 2.8.

Figure 12. Block Diagram of the Stereodecoder

DEMODULATOR

DEEMPHASIS

+ HIGHCUT

INGAIN

INFILTER

LP 80KHz

FM_L

FM_R

- PLOT CANC

- ROLL-OFF COMP.

- LP 25KHz

MPX

3.5 ... 11dB

STEP 2.5dB

t=50 or 75µs

4.th ORDER

100K

HC

CONTROL

PLL +

PILOT-DET.

REF 5V

SB CONTROL

D

VHCCH

VSBL

F19

A

VHCCL

F38

STEREO

MPINFL

LEVEL INPUT

LEVEL INTERN

LP 2.2KHZ

1.th ORDER

LEVEL

NOISE BLANKER

-

GAIN 0..10dB

HOLDN

NOISE

MULTIPATH

DETECTOR

MP_OUT

MP_IN

QUALITY DETECTOR

+

MPLEVELOUT

QUAL

D98AU855

15/28

TDA7400

Figure 13. Signals During Stereodecoder’s

Softmute

Figure 14. Internal Stereoblend Characteristics

SOFTMUTE

COMMAND

t

STD MUTE

t

V_O

D97AU638

t

LEVEL Input and Gain

Deemphasis and Highcut.

To suppress undesired high frequency modula-

tion on the highcut and stereoblend function the

LEVEL signal is lowpass filtered firstly.

The lowpass filter for the deemphasis allows to

choose between a time constant of 50µs and

7

75µs (bit D , Stereodecoderbyte).

The filter is a combination of a 1st order RC low-

pass at 53kHz (working as anti-aliasing filter) and

a 1st-orderswitched capacitor lowpass at 2.2kHz.

The second stage is a programmable gain stage

to adapt the LEVEL signal internally to different IF

device (see Testmode section 5 LEVELINTERN).

The gain is widely programmable in 16 steps

from 0dB to 10dB (step = 0.67dB). These 4 bits

are located together with the Roll-Off bits in the

”Stereodecoder Adjustment” byte to simplify a

possible adaptation during the production of the

carradio.

The highcut control range will be in both cases

τ_HC= 2 τ_Deemp. Inside the highcut control range

(between VHCH and VHCL) the LEVEL signal

is converted into a 5 bit word which controls the

lowpass time constant between τ_Deemp...3

τ_Deemp. There by the resolution will remain always

5 bits independently of the absolute voltage

range between the VHCH and VHCL values.

The highcut function can be switched off by I²C

7

bus (bit D , Fieldstrengthbyte set to ”0”).

The setup of the highcut characteristics is de-

scribed in 2.9.

Stereoblend Control

PLL and Pilot Tone Detector

The stereoblend control block converts the inter-

nal LEVEL voltage (LEVEL INTERN) into an de-

modulatorcompatible analog signal which is used

to control the channel separation between 0dB

and the maximum separation. Internally this con-

trol range has a fixed upper limit which is the in-

ternal reference voltage REF5V. The lower limit

can be programmed between 29.2% and 58%, of

REF5V in 4.167% steps (see figs. 11, 12).

The PLL has the task to lock on the 19kHz pilo-

tone during a stereo transmission to allow a cor-

rect demodulation. The included detector enables

the demodulation if the pilot tone reaches the se-

lected pilot tone threshold V^PTHST. Two different

thresholdsare available. The detectoroutput (sig-

nal STEREO, see block diagram) can be checked

by reading the status byte of the TDA7400D via

I²C bus.

To adjust the external LEVEL voltage to the inter-

nal range two values must be defined: the LEVEL

gain L_Gand VSBL (see fig. 12). To adjust the

voltage where the full channel separation is

reached (VST) the LEVEL gain L_Ghas to be de-

fined. The following equation can be used to esti-

mate the gain:

Fieldstrength Control

The fieldstrength input is used to control the high

cut and the stereoblend function. In addition the

signal can be also used to control the noise-

blanker thresholds and as input for the multipath

detector. These additional functions are de-

scribed in sections 3.3 and 4.

16/28

TDA7400

Figure 15. Relation Between Internal and External LEVELVoltage and Setup of Stereoblend

INTERNAL

VOLTAGES

INTERNAL

VOLTAGES

SETUP OF VST

SETUP OF VMO

LEVEL INTERN

REF 5V

LEVEL

58%

50%

VSBL 42%

33%

VSBL

t

FIELDSTRENGHT VOLTAGE

VMO

VST

FIELDSTRENGHT VOLTAGE

D97AU639

VMO

stereoblend control setup : the starting point

VHCH can be set with 2 bits to be 42, 50, 58 or

66% of REF5V whereas the range can be set to

be 17, 22, 28 or 33% of VHCH (see fig. 21).

Figure 16. Highcut Characteristics

LOWPASS

TIME CONSTANT

FUNCTIONAL DESCRIPTION OF THE NOISE-

BLANKER

3•τ

Deemp

In the automotive environment the MPX signal is

disturbed by spikes produced by the ignition and

for example the wiper motor. The aim of the

noiseblanker part is to cancel the audible influ-

ence of the spikes.

τ

Deemp

Therefore the output of the stereodecoderis held

at the actual voltage for a time between 22 and

38µs (programmable).

VHCL

VHCH FIELDSTRENGHT

D97AU640

The block diagram of the noiseblanker is given in

fig.17.

In a first stage the spikes must be detectedbut to

avoid a wrong triggering on high frequency

(white) noise a complex trigger control is imple-

mented. Behind the triggerstage a pulse former

generates the ”blanking” pulse. To avoid any

crosstalk to the signalpath the noiseblanker is

supplied by his own biasing circuit.

REF5V

Fieldstrengthvoltage[STEREO]

=

L_G

The gain can be programmed through 4 bits in

the ”Stereodecoder-Adjustment”byte.

The MONO voltage VMO (0dB channel separa-

tion) can be choosenselecting VSBL

All necessary internal reference voltages like

REF5V are derived from a bandgap circuit.

Therefore they have a temperature coefficient

near zero. This is useful if the fieldstrength signal

is also temperature compensated.

Trigger Path

The incoming MPX signal is highpass filtered,

amplified and rectified. This second order high-

pass-filter has a cornerfrequency of 140kHz.

The rectified signal, RECT, is lowpass filtered to

generate a signal called PEAK. Also noise with a

frequency 140kHz increases the PEAK voltage.

The resulting voltage can be adjusted by use of

the noise rectifier discharge current.

But most IF devices apply a LEVELvoltage with a

TC of 3300ppm. The TDA7400D offers this TC

for the reference voltages, too. The TC is select-

7

able with bit D of the ”stereodecoderadjustment”

byte.

The PEAK voltage is fed to a threshold generator,

which adds to the PEAK voltage a DC depend-

ent threshold VTH. Both signals, RECT and

Highcut Control

The highcut control setup is similar to the

17/28

TDA7400

PEAK+VTH are fed to a comparator which trig-

gers a re-triggerable monoflop. The monoflop’s

output activates the sample-and-hold circuits in

the signalpath for selected duration.

noisy is fixed by the RF part. Therefore also the

starting point of the normal noise-controlled trig-

ger adjustment is fixed (fig. 11). In some cases

the behaviour of the noiseblanker can be im-

proved by increasing the threshold even in a re-

gion of higher fieldstrength. Sometimes a wrong

triggering occures for the MPX signal often shows

distortion in this range which can be avoided

even if using a low threshold.

Because of the overlap of this range and the

range of the stereo/mono transition it can be con-

trolled by stereoblend. This threshold increase is

programmable in 3 steps or switched off with bits

D⁰and D1 of the fieldstrength control byte.

Automatic Noise Controlled Threshold Adjust-

ment (ATC)

There are mainly two independentpossibilities for

programming the trigger threshold:

a the low thresholdin 8 steps (bits D⁰to D2 of

the noiseblankerbyte)

b the noise adjusted threshold in 4 steps

3

4

(bits D and D of the noiseblanker byte,

see fig. 14).

Over Deviation Detector

The low threshold is active in combination with a

good MPX signal without any noise; the PEAK

voltage is less than 1V. The sensitivity in this op-

eration is high.

If the MPX signal is noisy the PEAK voltage in-

creases due to the higher noise, which is also

rectified. With increasing of the PEAK voltage the

trigger threshold increases, too. This particular

gain is programmablein 4 steps (see fig. ...).

If the system is tuned to stations with a high de-

viation the noiseblanker can trigger on the higher

frequencies of the modulation. To avoid this

wrong behaviour, which causes noise in the out-

put signal, the noiseblanker offers a deviation de-

pendent threshold adjustment.

By rectifying the MPX signal a further signal rep-

resenting the actual deviation is obtained. It is

used to increase the PEAK voltage. Offset and

gain of this circuit are programmable in 3 steps

6

7

with the bits D and D of the stereodecoder byte

AUTOMATIC THRESHOLD CONTROL MECHA-

NISM

(the first step turns off the detector,see fig. 15).

FUNCTIONAL DESCRIPTION OF THE MULTI-

PATH DETECTOR

Using the internal multipath detector the audible

effects of a multipath condition can be minimized.

A multipath condition is detected by rectifying the

19kHz spectrumin the fieldstrengthsignal.

Automatic Threshold Control

Stereoblend Voltage

by the

Besides the noise controlled threshold adjust-

ment there is an additional possibility for influenc-

ing the trigger threshold. It is depending on the

stereoblendcontrol.

An external capacitor is used to define the attack

and decay times (see block diagram fig. 23). the

The point where the MPX signal starts to become

Figure 17. Block Diagram of the Noiseblanker

RECTIFIER

RECT

MPX

+

MONOFLOP

HOLDN

-

VTH

+

THRESHOLD

GENERATOR

PEAK

LOWPASS

CONTROL

ADDITIONAL

THRESHOLD

CONTROL

MPX

D98AU856

18/28

TDA7400

Figure 18. Block Diagram of the Multipath Detector

to SB

LEVEL

-

VDD

int. INFLUENCE

CHARGE

1 bit

RECTIFIER

BANDPASS

19KHz

MP_IN

MPOUT

47nF

GAIN

D98AU857

2 BITS

MPOUT pin is used as detector output connected

to a capacitor of about 47nF and additionally the

MPIN pin is selected to be the fieldstrength input.

Using the configuration an external adaptation to

the user’s requiremet is given in fig.25.

tional influences. The factor ”a” can be pro-

grammed from 0.7 to 1.15. the output is a low im-

pedance output able to drive external circuitry as

well as simply fed to an A/D converter for RDS

applications.

Selecting the ”internal influence” in the configura-

tion byte, the channel separation is automatically

reduced during a multipath condition according to

the voltage appearing at the MP_OUT pin.

possible applicationis shown in fig. 26.

TEST MODE

During the test mode which can be activated by

setting bit D⁰of the testing byte and bit D5 of the

subaddress byte to ”1” several internal signals

are available at the CASSR pin.

A

Programming

During this mode the input resistor of 100kOhm is

disconnected from the pin. The internal signals

available are shown in the software specification.

To obtain a good multipath performance an adap-

tation is necessary. Therefore tha gain of the

19kHz bandpass is programmable in four steps

as well as the rectifier gain. The attack and decay

times can be set by the external capacitorvalue.

I²C BUS INTERFACE DESCRIPTION

Interface Protocol

The interface protocol comprises:

-a start condition(S)

QUALITY DETECTOR

-a chip address byte (the LSB bit determines read

/ write transmission)

The TDA7400D offers a quality detector output

which gives a voltage representing the FM recep-

tion conditions. To calculate this voltage the MPX

noise and the multipath detector output are

summed according to the following formula:

-a subaddressbyte

-a sequence of data (N-bytes + acknowledge)

-a stop condition (P)

Quality = 1.6 (V_noise-0.8V)+a (REF5V- V_MPOUT

)

The noise signal is the PEAK signal without addi-

19/28

TDA7400

CHIP ADDRESS

SUBADDRESS

DATA 1 to DATA n

DATA

MSB

1

LSB

MSB

X

LSB

A3 A2 A1 A0 ACK

MSB

LSB

S

0

1

0

R/W ACK

AZ

T

I

ACK

P

D97AU627

S = Start

ACK = Acknowledge

AZ = AutoZero-Remain

T = Testing

Auto increment

If bit I in the subaddress byte is set to ”1”, the

autoincrementof the subaddress is enabled.

TRANSMITTED DATA

(send mode)

I = Autoincrement

P = Stop

MSB

LSB

MAX CLOCK SPEED 500kbits/s

X

ST

SM

X

SM = 1 Soft mute activated

ST = 1 Stereo mode

X = Not Used

The transmitted data is automatically updated af-

ter each ACK. Transmission can be repeated

without new chip address.

SUBADDRESS

MSB

(receive mode)

LSB

A0

FUNCTION

I3

I2

I1

I0

A3

A2

A1

AntiRadiation Filter

0

1

off

on

AutoZero Remain

0

1

off

on

Testmode

off

on

0

1

Auto Increment Mode

0

1

off

on

Databyte Addressing

Input Selector

Volume

Treble

Bass

Speaker attenuator LF

Speaker attenuator RF

Speaker attenuator LR

Speaker attenuator RR

SoftMute / Bass Prog.

Stereodecoder

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Noiseblanker

High Cut Control

Fieldstrength & Quality

Configuration

Stereodecoder Adjustment

Testing

20/28

TDA7400

DATA BYTE SPECIFICATION

Input Selector (subaddress0H)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Source Selector

CD

Cassette

Phone

AM

Stereo Decoder

AC Inputs Front

Mute

0

1

0

1

0

1

0

1

0

1

0

1

0

1

AC inputs Rear

In-Gain

15dB

14dB

:

0

:

0

:

0

:

0

1

:

1

0

1

1 dB

0 dB

Coupl. Front Speaker

external

internal

0

1

Volume and Speaker Attenuation (subaddress1H, 4H, 5H, 6H, 7H)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

1

:

0

:

0

:

1

:

1

:

1

:

1

:

1

:

not used configurations

1

0

1

0

1

0

:

0

:

1

:

1

:

1

:

1

:

+15dB

:

1

:

0

:

1

0

1

:

+1dB

0dB

-1dB

:

1

0

:

0

:

0

:

0

:

0

:

0

:

0

:

1

0

:

0

1

-15dB

-16dB

:

-78dB

-79dB

0

:

0

:

1

0

:

0

1

:

0

1

0

:

1

0

:

1

0

:

1

X

1

X

Mute

21/28

TDA7400

Treble Filter (subaddress 2H)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Treble Steps

-15dB

-14dB

:

0

:

0

:

0

:

0

1

:

0

1

:

1

:

1

:

0

1

0

:

-1dB

0dB

+1dB

:

1

0

1

0

+14dB

+15dB

Treble Center Frequency

10.0KHz

12.5KHz

15.0KHz

17.5KHz

0

1

0

1

0

1

Coupl. Rear Speaker

external (AC)

internal

0

1

Bass Filter (subaddress3H)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Bass Steps

-15dB

-14dB

:

0

:

0

:

0

:

0

1

:

0

1

:

1

:

1

:

0

1

0

:

-1dB

0dB

+1dB

:

1

0

1

0

+14dB

+15dB

Bass Q-Factor

0

1

0

1

0

1

1.0

1.25

1.50

2.0

Bass DC Mode

off

on

0

1

22/28

TDA7400

Soft Mute and Bass Programming (subaddress8H)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Mute

0

1

Enable Soft Mute

Disable Soft Mute

Mutetime = 0.48ms

Mutetime = 0.96ms

Mutetime = 40.4ms

Mutetime = 324ms

0

1

0

1

0

1

0

1

Stereodecoder Soft Mute Influence = on

Stereodecoder Soft Mute Influence = off

Bass Center Frequency

Center Frequency = 60 Hz

Center Frequency = 70 Hz

Center Frequency = 80 Hz

Center Frequency = 100Hz

Center Frequency = 150Hz (1)

0

1

0

1

0

1

Noise Blanker Time

0

1

0

1

0

1

Center Frequency = 38 s

Center Frequency = 25.5µs

µ

Center Frequency = 32 s

µ

Center Frequency = 22 s

µ

(1) Only for Bass Q-Factor = 2.0

Stereodecoder

MSB

(subaddress 9H)

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

1

STD Unmuted

STD Muted

0

1

0

In Gain 8.5dB

In Gain 6dB

others combinations not used

1

must be ”1”

0

1

Forced Mono

Mono/Stereo switch automatically

0

1

Noiseblanker PEAK charge current low

Noiseblanker PEAK charge current high

0

1

Pilot Threshold HIGH

Pilot Threshold LOW

0

1

Deemphasis 50 s

µ

Deemphasis 75 s

µ

23/28

TDA7400

Noiseblanker (subaddressAH)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Low Threshold 65mV

Low Threshold 60mV

Low Threshold 55mV

Low Threshold 50mV

Low Threshold 45mV

Low Threshold 40mV

Low Threshold 35mV

Low Threshold 30mV

0

1

0

1

0

1

Noise Controlled Threshold 320mV

Noise Controlled Threshold 260mV

Noise Controlled Threshold 200mV

Noise Controlled Threshold 140mV

0

1

Noise blanker OFF

Noise blanker ON

0

1

0

1

0

1

Over deviation Adjust 2.8V

Over deviation Adjust 2.0V

Over deviation Adjust 1.2V

Over deviation Detector OFF

High Cut (subaddress BH)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

1

High Cut OFF

High Cut ON

0

1

0

1

0

1

Max. High Cut 2dB

Max. High Cut 5dB

Max. High Cut 7dB

Max. High Cut 10dB

0

1

0

1

0

1

VHCH at 42% REF 5V

VHCH at 50% REF 5V

VHCH at 58% REF 5V

VHCH at 66% REF 5V

0

1

0

1

0

1

VHCL at 16.7% VHCH

VHCL at 22.2% VHCH

VHCL at 27.8% VHCH

VHCL at 33.3% VHCH

Strong Multipath influence on PEAK 18K

OFF

ON (18K Discharge if V_MPOUT<2.5V)

0

1

24/28

TDA7400

Fieldstrength Control (subaddress CH)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

VSBL at 29% REF 5V

VSBL at 33% REF 5V

VSBL at 38% REF 5V

VSBL at 42% REF 5V

VSBL at 46% REF 5V

VSBL at 50% REF 5V

VSBL at 54% REF 5V

VSBL at 58% REF 5V

0

1

0

1

0

1

Noiseblanker Field strength Adj 2.3V

Noiseblanker Field strength Adj 1.8V

Noiseblanker Field strength Adj 1.3V

Noiseblanker Field strength Adj OFF

0

1

0

1

0

1

Quality Detector Coefficient a = 0.7

Quality Detector Coefficient a = 0.85

Quality Detector Coefficient a = 1.0

Quality Detector Coefficient a = 1.15

0

1

Multipath off influence on PEAK discharge

-1V/ms (at MPout = 2.5V

Configuration

MSB

(subaddressDH)

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Noise Rectifier Discharge Resistor

R = infinite

0

1

0

1

0

1

R = 56k

Ω

R = 33kΩ

R =18kΩ

Multipath Detector Bandpass Gain

0

1

0

1

0

1

6dB

12dB

16dB

18dB

Multipath Detector internal influence

ON

OFF

0

1

0

1

Multipath Detector Charge Current 0.5 A

µ

Multipath Detector Charge Current 1 A

µ

Multipath Detector Reflection Gain

Gain = 7.6dB

Gain = 4.6dB

Gain = 0dB

disabled

0

1

0

1

0

1

25/28

TDA7400

Stereodecoder Adjustment (subaddress EH)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Roll Off Compensation

0

:

0

1

:

0

1

0

:

not allowed

19.6%

21.5%

:

1

:

0

:

0

:

25.3%

:

1

31.0%

Level Gain

0dB

0.66dB

1.33dB

:

0

:

0

:

0

1

:

0

1

0

:

1

10dB

1

must be ”1”

Testing (subaddressFH)

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

Stereodecoder test signals

OFF

Test signals enabled if bit D5 of the subaddress

(test mode bit) is set to ”1”, too

0

1

0

1

External Clock

Internal Clock

Testsignals at CASS_R

VHCCH

Level intern

Pilot magnitude

VCOCON; VCO Control Voltage

Pilot threshold

HOLDN

NB threshold

F228

VHCCL

VSBL

not used

PEAK

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

not used

REF5V

not used

VCO

OFF

ON

0

1

Audioprocessor test mode

enabled if bit D5 of the subaddress

(test mode bit) is set to ”1”

OFF

0

1

Note : This byteis used fortesting or evaluationpurposes only andmust not beset to othervalues than thedefault ”11111110”in theapplication!

26/28

TDA7400

mm

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

A

A1

A2

B

1.60

0.063

0.006

0.05

1.35

0.30

0.09

0.15 0.002

1.40

0.37

1.45 0.053 0.055 0.057

0.45 0.012 0.014 0.018

C

0.20 0.004

0.008

D

12.00

10.00

8.00

0.472

0.394

0.315

0.031

0.472

0.394

0.315

D1

D3

e

0.80

E

12.00

10.00

8.00

E1

E3

L

0.45

0.60

0.75 0.018 0.024 0.030

0.039

L1

K

1.00

TQFP44 (10 x 10)

0°(min.), 3.5°(typ.), 7°(max.)

D

D1

A

A2

A1

33

23

34

22

0.10mm

.004

Seating Plane

12

44

11

1

C

e

K

TQFP4410

27/28

TDA7400

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is

granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are

subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products

are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - China- Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -

Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

http://www.st.com

28/28

型号:	TDA7400D
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	STMICROELECTRONICS
零件包装代码：	SOIC
包装说明：	SOP-28
针数：	28
Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01
风险等级：	5.81
Is Samacsys：	N
商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e4
长度：	17.9 mm
功能数量：	1
端子数量：	28
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP28,.4
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	9 V
认证状态：	Not Qualified
座面最大高度：	2.65 mm
子类别：	Other Consumer ICs
最大供电电压 (Vsup)：	10 V
最小供电电压 (Vsup)：	7.5 V
表面贴装：	YES
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.5 mm
Base Number Matches：	1

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