XilinxVirtex-5ML550网络接口方案

XILINX公司的 VIRTEX-5 FPGA系列采用第二代ASMBL™架构，是功能最为强大的FPGA器件，包括LX, LXT, SXT和 FXT四个平台，主要用于通信和数据通信，存储设备以及服务器，工业设备。本文介绍了Virtex-5 四种平台的主要性能以及ML550 网络接口开发板的主要性能。

The Virtex™-5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL™ (ADVANCED SILICON MODULAR Block) column-based architecture, the Virtex-5 family contains four distinct platforms (sub-families), the most choice offered by any FPGA family. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. This overview contains detailed information about the LX, LXT, and SXT platforms. In addition to the most advanced, high-performance logic fabric, Virtex-5 FPGAs contain many hard-IP SYSTEM level blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25 x 18 DSP slices, SelectIO™ TECHNOLOGY with built-in digitally-controlled impedance, ChipSync™ source-synchronous INTERFACE blocks, system MONITOR functionality, enhanced clock management tiles with INTEGRATED DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. The LXT and SXT DEVICES also contain power-optimized high-speed serial transceiver blocks for enhanced serial connectivity, a PCI Express™ compliant integrated Endpoint block, and tri-mode Ethernet MACs (Media Access Controllers). These features allow advanced logic designers to build the highest levels of performance and functionality into their FPGA-based systems. Built on a 65-nm state-of-the-art copper PROCESS technology, Virtex-5 FPGAs are a programmable alternative to CUSTOM ASIC technology. Most advanced system designs require the programmable strength of FPGAs. Virtex-5 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, hard/soft microprocessor, and connectivity capabilities. The Virtex-5 LXT, SXT, and FXT platforms include advanced high-speed serial connectivity and link/transaction layer capability.

Virtex-5 主要特性：

Four platforms LX, LXT, SXT, and FXT

Virtex-5 LX: High-performance GENERAL logic applications

Virtex-5 LXT: High-performance logic with advanced serial connectivity

Virtex-5 SXT: High-performance signal processing applications

Virtex-5 FXT: High-performance embedded systems

Cross-platform compatibility

LXT, SXT, and FXT devices are footprint compatible in the same PACKAGE using adjustable VOLTAGE regulators

Most advanced, high-performance, optimal-utilization, FPGA fabric - Real 6-input look-up table (LUT) technology

Dual 5-LUT option

Improved reduced-hop routing

64-bit distributed RAM option

SRL32/Dual SRL16 option

Powerful clock management tile (CMT) clocking

Digital Clock Manager (DCM) blocks for zero delay buffering, frequency synthesis, and clock phase shifting

PLL blocks for input jitter filtering, zero delay buffering, frequency synthesis, and phase-matched clock division

36-Kbit block RAM/FIFOs

True dual-port RAM blocks

Enhanced optional programmable FIFO logic

Programmable • True dual-port widths up to x36 • Simple dual-port widths up to x72

Built-in optional error-correction circuitry

Optionally program each block as two independent 18-Kbit blocks

65-nm copper CMOS process technology

1.0V core voltage

High signal-integrity FLIP-CHIP packaging available in STANDARD or PB-FREE package options

High-performance parallel SelectIO technology

1.2 to 3.3V I/O Operation

Source-synchronous interfacing using ChipSync technology

Digitally-controlled impedance (DCI) ACTIVE termination

Flexible fine-grained I/O banking

High-speed MEMORY interface SUPPORT

Advanced DSP48E slices

25 x 18, two’s complement, multiplication

Optional adder, subtracter, and accumulator

Optional pipelining

Optional bitwise logical functionality

Dedicated cascade connections

Flexible configuration options

SPI and Parallel FLASH interface

Multi-bitstream support with dedicated fallback reconfiguration logic

Auto bus width detection capability

Integrated Endpoint blocks for PCI Express (LXT/SXT)

Compliant with the PCI Express Base Specification 1.1

x1, x2, x4, or x8 lane support per block

Works in conjunction with RocketIO™ transceivers

Tri-mode 10/100/1000 Mb/s Ethernet MACs (LXT/SXT)

RocketIO transceivers can be used as PHY or connect to external PHY using many soft MII (Media Independent Interface) options

RocketIO GTP transceivers 100 Mb/s to 3.75 Gb/s (LXT/SXT)

System Monitoring capability on all devices

On-chip/Off-chip thermal monitoring

On-chip/Off-chip power supply monitoring

JTAG access to all monitored quantities

Virtex-5 ML550 网络接口开发板

Virtex-5 ML550 Networking Interfaces Development Board

The Xilinx ML550 platform is ideal for development and EVALUATION of networking and source synchronous interfaces using Virtex™-5 LXT FPGA family. It is also the preferred platform for analyzing and demonstrating the power consumption characteristics of Virtex-5 devices.

开发板包括：

XC5VLX50T-FFG1136 FPGA

64M x 8 DDR SDRAM memory

Eight clock sources:

200 MHz, 250 MHz, 133 MHz, and 33 MHz on-board oscillators

Two ICS8442 clock SYNTHESIZER devices

Two sets of SMA differential clock input connectors

One USB “B” port

One 64 x 128 pixel LCD – Optional

A System ACE CompactFlash (CF) Configuration Controller that allows storing

and downloading of up to eight FPGA configuration image files

Six SAMTEC LVDS connectors (a total of 53 differential input and 53 differential OUTPUT

channels)

Onboard power regulators with ±5% output margin test capabilities, in 2.5% increments

开发板主要性能：

Xilinx Device: XC5VLX50T-FFG1136 FPGA

64M x 8 DDR SDRAM memory

Eight clock sources:

200 MHz, 250 MHz, 133 MHz, and 33 MHz on-board oscillators

Two ICS8442 clock synthesizer devices

One USB “B” port

One 64 x 128 pixel LCD

A System ACE™ CompactFlash (CF) Configuration Controller that allows storing

Six Samtec LVDS connectors (a total of 53 differential input and 53 differential output

Onboard power regulators with ±5% output margin test capabilities, in 2.5%

Power monitor connector for detailed current measurements on Vccint, Vccaux, and Vcco supplies

目标应用：

Telecom / Datacom

Storage

Servers

Industrial