TLC27L2IDR原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

D, JG, OR P PACKAGE

(TOP VIEW)

D

Trimmed Offset Voltage:

TLC27L7 . . . 500 µV Max at 25°C,

= 5 V

V

DD

1OUT

1IN−

1IN+

GND

V

DD

1

2

3

4

8

7

6

5

D

Input Offset Voltage Drift . . . Typically

0.1 µV/Month, Including the First 30 Days

Wide Range of Supply Voltages Over

Specified Temperature Range:

0°C to 70°C . . . 3 V to 16 V

2OUT

2IN−

2IN+

FK PACKAGE

(TOP VIEW)

−40°C to 85°C . . . 4 V to 16 V

−55°C to 125°C . . . 4 V to 16 V

D

Single-Supply Operation

Common-Mode Input Voltage Range

Extends Below the Negative Rail (C-Suffix,

I-Suffix Types)

3

2

1

20 19

18

NC

4

5

6

7

8

2OUT

NC

1IN−

NC

17

16

15

14

D

Ultra-Low Power . . . Typically 95 µW

at 25°C, V

= 5 V

DD

2IN−

NC

1IN+

NC

Output Voltage Range Includes Negative

Rail

9 10 11 12 13

12

D

High Input Impedance . . . 10 Ω Typ

ESD-Protection Circuitry

Small-Outline Package Option Also

Available in Tape and Reel

NC − No internal connection

D

Designed-In Latch-Up immunity

DISTRIBUTION OF TLC27L7

INPUT OFFSET VOLTAGE

description

30

25

20

15

10

5

335 Units Tested From 2 Wafer Lots

The TLC27L2 and TLC27L7 dual operational

V

T

A

= 5 V

DD

= 25°C

P Package

amplifiers combine a wide range of input offset

voltage grades with low offset voltage drift, high

input impedance, extremely low power, and high

gain.

AVAILABLE OPTIONS

PACKAGE

V

max

SMALL

OUTLINE

(D)

CHIP

CARRIER

(FK)

CERAMIC

DIP

(JG)

PLASTIC

DIP

IO

T

A

AT 25°C

(P)

500 µV TLC27L7CD

2 mV TLC27L2BCD

5 mV TLC27L2ACD

10 mV TLC27L2CD

TLC27L7CP

0°C

to

70°C

TLC27L2BCP

TLC27L2ACP

TLC27L2CP

—

0

−800

−400

0

400

800

V

IO

− Input Offset Voltage − µV

500 µV TLC27L7ID

2 mV TLC27L2BID

5 mV TLC27L2AID

10 mV TLC27L2ID

TLC27L7IP

TLC27L2BIP

TLC27L2AIP

TLC27L2IP

−40°C

to

85°C

−55°C

to

125°C

TLC27L7MD

500 µV

TLC27L7MFK TLC27L7MJG TLC27L7MP

TLC27L2MFK TLC27L2MJG TLC27L2MP

TLC27L2MD

10 mV

TLC27L2MDRG4

The D package is available taped and reeled. Add R suffix to the device type

(e.g., TLC27L7CDR).

LinCMOS is a trademark of Texas Instruments.

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Copyright  2005, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢍꢎ ꢏꢂꢐ ꢌ ꢐ ꢋꢑ ꢒꢓ ꢆꢁ ꢋ ꢍꢏ ꢎꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍꢁ ꢐꢔ ꢐꢏ ꢎꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

description (continued)

These devices use Texas Instruments silicon-gate LinCMOS technology, which provides offset voltage

stability far exceeding the stability available with conventional metal-gate processes.

The extremely high input impedance, low bias currents, and low power consumption make these cost-effective

devices ideal for high gain, low frequency, low power applications. Four offset voltage grades are available

(C-suffix and I-suffix types), ranging from the low-cost TLC27L2 (10 mV) to the high-precision TLC27L7

(500 µV). These advantages, in combination with good common-mode rejection and supply voltage rejection,

make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs.

In general, many features associated with bipolar technology are available in LinCMOS operational amplifiers,

without the power penalties of bipolar technology. General applications such as transducer interfacing, analog

calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC27L2 and

TLC27L7. The devices also exhibit low voltage single-supply operation and ultra-low power consumption,

making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input

voltage range includes the negative rail.

A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density

system applications.

The device inputs and outputs are designed to withstand −100-mA surge currents without sustaining latch-up.

The TLC27L2 and TLC27L7 incorporate internal ESD-protection circuits that prevent functional failures at

voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in

handling these devices as exposure to ESD may result in the degradation of the device parametric performance.

The C-Suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized

for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military

temperature range of −55°C to 125°C.

equivalent schematic (each amplifier)

V

DD

P3

P4

R6

N5

C1

R1

R2

IN−

IN+

P5

P6

P1

P2

R5

OUT

N3

D2

N1

R3

N6

R7

N7

N2

D1

N4

R4

GND

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V

DD

Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V

V

DD

I

Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA

I

Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA

O

Total current into V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA

DD

Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA

Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited

Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

A

I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C

M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.

2. Differential voltages are at IN+ with respect to IN−.

3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded (see application section).

DISSIPATION RATING TABLE

T

≤ 25°C

DERATING FACTOR

T

= 70°C

T

= 85°C

T = 125°C

A

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING POWER RATING POWER RATING

A

D

FK

JG

P

725 mW

5.8 mW/°C

11 mW/°C

8.4 mW/°C

8 mW/°C

464 mW

880 mW

672 mW

640 mW

377 mW

715 mW

546 mW

520 mW

—

1375 mW

275 mW

210 mW

—

1050 mW

1000 mW

recommended operating conditions

C SUFFIX

I SUFFIX

M SUFFIX

UNIT

MIN

3

MAX

16

MIN

4

MAX

16

MIN

4

MAX

Supply voltage, V

DD

16

3.5

8.5

125

V

= 5 V

−0.2

0

3.5

8.5

70

−0.2

−40

3.5

8.5

85

0

DD

Common-mode input voltage, V

IC

V

= 10 V

0

DD

Operating free-air temperature, T

−55

°C

A

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

DD

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

12

mV

0.9

204

170

5

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

6.5

S

L

V

IO

Input offset voltage

2000

3000

500

1500

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

S

L

µV

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of input

offset voltage

25°C to

70°C

α

1.1

µV/°C

pA

VIO

25°C

70°C

25°C

70°C

0.1

7

60

300

60

I

IO

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 2.5 V,

V

= 2.5 V

O

IC

0.6

50

I

IB

pA

IC

600

−0.2

to

−0.3

to

4.2

25°C

V

4

Common-mode input voltage range

(see Note 5)

V

ICR

−0.2

to

Full range

3.5

25°C

0°C

3.2

3

4.1

4.2

0

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

70°C

25°C

0°C

3

50

0

= −100 mV,

= 0.25 V to 2 V,

I

OL

70°C

25°C

0°C

0

50

65

60

70

60

700

380

94

95

97

98

20

24

16

Large-signal differential voltage

amplification

A

VD

R

= 1 MΩ

L

70°C

25°C

0°C

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

70°C

25°C

0°C

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

70°C

25°C

0°C

34

42

28

= 2.5 V,

O

IC

I

Supply current (two amplifiers)

µA

DD

No load

70°C

†

Full range is 0°C to 70°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢆ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢇ ꢅ ꢀꢁ ꢂꢃ ꢄꢁ ꢄ

ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 10 V (unless otherwise noted)

DD

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

12

mV

0.9

235

190

5

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

6.5

S

L

V

IO

Input offset voltage

2000

3000

800

1900

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

µV

S

L

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of input

offset voltage

25°C to

70°C

α

1

µV/°C

pA

VIO

25°C

70°C

25°C

70°C

0.1

8

60

300

60

I

IO

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 5 V,

V

= 5 V

O

IC

0.7

50

I

IB

pA

IC

600

−0.2

to

−0.3

to

9.2

25°C

V

9

Common-mode input voltage range

(see Note 5)

V

ICR

−0.2

to

Full range

8.5

25°C

0°C

8

7.8

8.9

0

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

= −100 mV,

= 1 V to 6 V,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

70°C

25°C

0°C

50

0

I

OL

70°C

25°C

0°C

0

50

65

60

70

60

860

1025

660

97

Large-signal differential voltage

amplification

A

VD

R

= 1 MΩ

L

70°C

25°C

0°C

97

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

70°C

25°C

0°C

97

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

70°C

25°C

0°C

98

29

46

66

40

= 5 V,

O

IC

I

Supply current (two amplifiers)

36

µA

DD

No load

70°C

22

†

Full range is 0°C to 70°C.

NOTES:

4

The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5

This range also applies to each input individually.

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

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ꢋ

ꢍꢏ

ꢎ

ꢆꢀ

ꢐ

ꢑ

ꢆ

ꢁ

ꢆ

ꢊ

ꢍ

ꢁ

ꢐ

ꢔ

ꢐ

ꢏ

ꢎ

ꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

DD

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

13

mV

0.9

240

170

5

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

7

S

L

V

IO

Input offset voltage

2000

3500

500

2000

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

S

L

µV

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of

input offset voltage

25°C to

85°C

α

1.1

µV/°C

pA

VIO

25°C

85°C

25°C

85°C

0.1

24

60

1000

60

I

IO

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 2.5 V,

V

= 2.5 V

O

IC

0.6

200

I

IB

pA

IC

2000

−0.2

to

−0.3

to

4.2

25°C

V

4

Common-mode input voltage range

(see Note 5)

V

ICR

−0.2

to

Full range

3.5

25°C

−40°C

85°C

3.2

3

4.1

4.2

0

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

3

25°C

50

−40°C

85°C

0

= −100 mV,

= 0.25 V to 2 V,

I

OL

0

25°C

50

65

60

70

60

480

900

330

94

95

97

98

20

31

15

Large-signal differential

voltage amplification

−40°C

85°C

A

VD

R

= 1 MΩ

L

25°C

−40°C

85°C

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

25°C

−40°C

85°C

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

25°C

34

54

26

= 2.5 V,

O

IC

I

Supply current (two amplifiers)

−40°C

85°C

µA

DD

No load

†

Full range is −40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢆ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢇ ꢅ ꢀꢁ ꢂꢃ ꢄꢁ ꢄ

ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

ꢁꢈ

ꢉ

ꢂ

ꢊ

ꢋ

ꢌ 

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 10 V (unless otherwise noted)

DD

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

13

mV

0.9

235

190

5

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

7

S

L

V

IO

Input offset voltage

2000

3500

800

2900

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

25°C

S

L

µV

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of input

offset voltage

25°C to

85°C

α

1

µV/°C

pA

VIO

25°C

85°C

25°C

85°C

0.1

26

60

1000

60

I

IO

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 5 V,

V

= 5 V

O

IC

0.7

220

I

IB

pA

IC

2000

−0.2

to

−0.3

to

9.2

25°C

V

9

Common-mode input voltage range

(see Note 5)

V

ICR

−0.2

to

Full range

8.5

25°C

−40°C

85°C

8

7.8

8.9

0

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

= −100 mV,

= 1 V to 6 V,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

25°C

50

−40°C

85°C

0

I

OL

0

25°C

50

65

60

70

60

860

1550

585

97

Large-signal differential voltage

amplification

−40°C

85°C

A

VD

R

= 1 MΩ

L

25°C

−40°C

85°C

97

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

98

25°C

97

−40°C

85°C

97

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

98

25°C

29

46

86

36

= 5 V,

O

IC

I

Supply current (two amplifiers)

−40°C

85°C

49

µA

DD

No load

20

†

Full range is −40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

ꢋ

ꢁ

ꢈ

ꢉ

ꢂ

ꢊꢋ

ꢌ 

ꢍ

ꢎ

ꢏ

ꢂ

ꢐ

ꢌ

ꢐ

ꢋꢑ

ꢒ

ꢓ

ꢆ

ꢁ

ꢋ

ꢍ

ꢏ

ꢎ

ꢆꢀ

ꢐ

ꢑ

ꢆ

ꢁ

ꢆ

ꢊ

ꢍ

ꢁ

ꢐ

ꢔ

ꢐ

ꢏ

ꢎ

ꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 5 V (unless otherwise noted)

DD

TLC27L2M

TLC27L7M

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2M

TLC27L7M

mV

µV

12

V

IO

Input offset voltage

170

500

3750

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of

input offset voltage

25°C to

125°C

α

VIO

1.4

µV/°C

25°C

125°C

25°C

0.1

1.4

0.6

9

60

15

60

35

pA

nA

pA

nA

I

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 2.5 V,

V

= 2.5 V

IO

O

IC

I

IB

O

IC

125°C

0

to

4

−0.3

to

4.2

25°C

V

Common-mode input voltage range

(see Note 5)

V

ICR

0

to

Full range

3.5

25°C

−55°C

125°C

25°C

3.2

3

4.1

4.2

0

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

3

50

−55°C

125°C

25°C

0

= −100 mV,

= 0.25 V to 2 V,

I

OL

0

50

25

65

60

70

60

500

1000

200

94

Large-signal differential voltage

amplification

−55°C

125°C

25°C

A

VD

R

= 1 MΩ

L

−55°C

125°C

25°C

95

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

85

97

−55°C

125°C

25°C

97

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

98

20

34

60

24

= 2.5 V,

O

IC

I

Supply current (two amplifiers)

−55°C

125°C

35

µA

DD

No load

14

†

Full range is −55°C to 125°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢆ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢇ ꢅ ꢀꢁ ꢂꢃ ꢄꢁ ꢄ

ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

ꢁꢈ

ꢉ

ꢂ

ꢊ

ꢋ

ꢌ 

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

electrical characteristics at specified free-air temperature, V

= 10 V (unless otherwise noted)

DD

TLC27L2M

TLC27L7M

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX

10

25°C

Full range

25°C

1.1

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

S

IC

L

TLC27L2M

TLC27L7M

mV

µV

12

V

IO

Input offset voltage

190

800

4300

V

R

= 1.4 V,

= 50 Ω,

V

R

= 0,

= 1 MΩ

O

IC

Full range

S

L

Average temperature coefficient of

input offset voltage

25°C to

125°C

α

VIO

1.4

µV/°C

25°C

125°C

25°C

0.1

1.8

0.7

10

60

15

60

35

pA

nA

pA

nA

I

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 5 V,

V

= 5 V

IO

O

IC

I

IB

O

IC

125°C

0

to

9

−0.3

to

9.2

25°C

V

Common-mode input voltage range

(see Note 5)

V

ICR

0

to

Full range

8.5

25°C

−55°C

125°C

25°C

8

7.8

8.9

8.8

9

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

= −100 mV,

= 1 V to 6 V,

R

= 1 MΩ

= 0

V

mV

V/mV

dB

OH

ID

O

L

0

50

−55°C

125°C

25°C

0

I

OL

0

50

25

65

60

70

60

860

1750

380

97

91

97

98

29

56

18

Large-signal differential voltage

amplification

−55°C

125°C

25°C

A

R

= 1 MΩ

VD

L

−55°C

125°C

25°C

CMRR

Common-mode rejection ratio

Supply-voltage rejection ratio

= V min

ICR

IC

−55°C

125°C

25°C

k

V

= 5 V to 10 V,

V

= 1.4 V

dB

SVR

DD

O

(∆V

DD

/∆V )

IO

46

96

30

= 5 V,

O

IC

I

Supply current (two amplifiers)

−55°C

125°C

µA

DD

No load

†

Full range is −55 °C to 125°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.

5. This range also applies to each input individually.

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

ꢋ

ꢁ

ꢈ

ꢉ

ꢂ

ꢊꢋ

ꢌ 

ꢍ

ꢎ

ꢏ

ꢂ

ꢐ

ꢌ

ꢐ

ꢋ

ꢑ

ꢒ

ꢓ

ꢆ

ꢁ

ꢋ

ꢍꢏ

ꢎ

ꢆꢀ

ꢐ

ꢑ

ꢆ

ꢁ

ꢆ

ꢊ

ꢍ

ꢁ

ꢐ

ꢔ

ꢐ

ꢏ

ꢎ

ꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

operating characteristics, V

= 5 V

DD

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.03

0.04

0.03

0.02

MAX

25°C

0°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

L

70°C

25°C

0°C

= 20 pF,

SR

Slew rate at unity gain

V/µs

See Figure 1

= 2.5 V

I(PP)

70°C

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

L

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

0°C

5

6

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

70°C

25°C

0°C

4.5

85

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

100

65

B

kHz

1

70°C

25°C

0°C

34°

36°

30°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

C

= 20 pF,

70°C

operating characteristics, V

= 10 V

DD

TLC27L2C

TLC27L2AC

TLC27L2BC

TLC27L7C

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.05

0.04

0.05

0.04

MAX

25°C

0°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

= 20 pF,

L

70°C

25°C

0°C

SR

Slew rate at unity gain

V/µs

See Figure 1

= 5.5 V

I(PP)

70°C

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

L

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

0°C

1

1.3

0.9

110

125

90

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

70°C

25°C

0°C

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

B

1

kHz

70°C

25°C

0°C

38°

40°

34°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

C

= 20 pF,

70°C

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢆ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢇ ꢅ ꢀꢁ ꢂꢃ ꢄꢁ ꢄ

ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

ꢁꢈ

ꢉ

ꢂ

ꢊ

ꢋ

ꢌ



SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

operating characteristics, V

= 5 V

DD

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.03

0.04

0.03

0.04

0.02

MAX

25°C

−40°C

85°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

L

= 20 pF,

SR

Slew rate at unity gain

V/µs

25°C

See Figure 1

−40°C

85°C

= 2.5 V

I(PP)

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

L

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

−40°C

85°C

5

7

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

4

25°C

85

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

−40°C

85°C

130

55

B

kHz

1

25°C

34°

38°

29°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

−40°C

85°C

C

= 20 pF,

operating characteristics, V

= 10 V

DD

TLC27L2I

TLC27L2AI

TLC27L2BI

TLC27L7I

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.05

0.06

0.03

0.04

0.05

0.03

MAX

25°C

−40°C

85°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

= 20 pF,

L

SR

Slew rate at unity gain

V/µs

25°C

See Figure 1

−40°C

85°C

= 5.5 V

I(PP)

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

L

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

−40°C

85°C

1

1.4

0.8

110

155

80

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

25°C

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

−40°C

85°C

B

1

kHz

25°C

38°

42°

32°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

−40°C

85°C

C

= 20 pF,

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

ꢋ

ꢁ

ꢈ

ꢉ

ꢂ

ꢊꢋ

ꢌ 

ꢍ

ꢎ

ꢏ

ꢂ

ꢐ

ꢌ

ꢐ

ꢋ

ꢑ

ꢒ

ꢓ

ꢆ

ꢁ

ꢋ

ꢍꢏ

ꢎ

ꢆꢀ

ꢐ

ꢑ

ꢆ

ꢁ

ꢆ

ꢊ

ꢍ

ꢁ

ꢐ

ꢔ

ꢐ

ꢏ

ꢎ

ꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

operating characteristics, V

= 5 V

DD

TLC27L2M

TLC27L7M

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.03

0.04

0.02

0.03

0.04

0.02

MAX

25°C

−55°C

125°C

25°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

= 20 pF,

L

SR

Slew rate at unity gain

V/µs

See Figure 1

−55°C

125°C

V

= 2.5 V

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

−55°C

125°C

25°C

5

8

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

3

85

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

−55°C

125°C

25°C

140

45

B

1

kHz

34°

39°

25°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

−55°C

125°C

C

= 20 pF,

operating characteristics, V

= 10 V

DD

TLC27L2M

TLC27L7M

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

0.05

0.06

0.03

0.04

0.06

0.03

MAX

25°C

−55°C

125°C

25°C

V

= 1 V

I(PP)

R

C

= 1 MΩ,

= 20 pF,

L

SR

Slew rate at unity gain

V/µs

See Figure 1

−55°C

125°C

V

= 5.5 V

f = 1 kHz,

See Figure 2

R

= 20 Ω,

S

V

B

Equivalent input noise voltage

25°C

68

nV/√Hz

n

25°C

−55°C

125°C

25°C

1

1.5

0.7

110

165

70

V

R

= V

OH

= 1 MΩ,

,

C

= 20 pF,

O

L

Maximum output-swing bandwidth

Unity-gain bandwidth

Phase margin

kHz

OM

See Figure 1

V = 10 mV,

I

See Figure 3

C = 20 pF,

L

−55°C

125°C

25°C

B

1

kHz

38°

43°

29°

V = 10 mV,

f = B ,

1

See Figure 3

I

L

φ

m

−55°C

125°C

C

= 20 pF,

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

PARAMETER MEASUREMENT INFORMATION

single-supply versus split-supply test circuits

Because the TLC27L2 and TLC27L7 are optimized for single-supply operation, circuit configurations used for

the various tests often present some inconvenience since the input signal, in many cases, must be offset from

ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to

the negative rail. A comparison of single-supply versus split-supply test circuits is shown in Figure 1. The use

of either circuit gives the same result.

V

DD+

V

DD

−

+

−

+

V

O

V

O

V

I

V

I

C

R

C

R

L

V

DD−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 1. Unity-Gain Amplifier

2 kΩ

V

DD+

V

DD

20 Ω

−

+

−

+

V

O

1/2 V

DD

V

O

20 Ω

V

DD−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 2. Noise-Test Circuit

10 kΩ

V

DD+

V

DD

100 Ω

−

+

−

+

V

I

V

I

V

O

V

O

1/2 V

DD

C

L

C

L

V

DD−

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 3. Gain-of-100 Inverting Amplifier

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

PARAMETER MEASUREMENT INFORMATION

input bias current

Because of the high input impedance of the TLC27L2 and TLC27L7 operational amplifiers, attempts to measure

the input bias current can result in erroneous readings. The bias current at normal room ambient temperature

is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are

offered to avoid erroneous measurements:

1. Isolate the device from other potential leakage sources.Use a grounded shield around and between the

device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.

2. Compensate for the leakage of the test socket by actually performing an input bias current test (using

a picoammeter) with no device in the test socket. The actual input bias current can then be calculated

by subtracting the open-socket leakage readings from the readings obtained with a device in the test

socket.

One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the

servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage

drop across the series resistor is measured and the bias current is calculated). This method requires that a

device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not

feasible using this method.

8

5

V = V

IC

1

4

Figure 4. Isolation Metal Around Device Inputs

(JG and P packages)

low-level output voltage

To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise

results in the device low-level output being dependent on both the common-mode input voltage level as well

as the differential input voltage level. When attempting to correlate low-level output readings with those quoted

in the electrical specifications, these two conditions should be observed. If conditions other than these are to

be used, please refer to Figure 14 through Figure 19 in the Typical Characteristics of this data sheet.

input offset voltage temperature coefficient

Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This

parameter is actually a calculation using input offset voltage measurements obtained at two different

temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device

and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input

offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the

moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these

measurements be performed at temperatures above freezing to minimize error.

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

PARAMETER MEASUREMENT INFORMATION

full-power response

Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage

swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is

generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal

input signal until the maximum frequency is found above which the output contains significant distortion. The

full-peak response is defined as the maximum output frequency, without regard to distortion, above which full

peak-to-peak output swing cannot be maintained.

Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified

in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal

input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is

increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same

amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained

(see Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum

peak-to-peak output is reached.

(a) f = 100 kHz

(b) B

OM

> f > 100 kHz

(c) f = B

OM

(d) f > B

OM

Figure 5. Full-Power-Response Output Signal

test time

Inadequate test time is a frequent problem, especially when testing CMOS high-volume, short-test-time

environment. Internal capacitances are inherently higher in CMOS devices and require longer test times than

their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and

lower temperatures.

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

6, 7

V

IO

Input offset voltage

Distribution

α

VIO

Temperature coefficient of input offset voltage

Distribution

8, 9

vs High-level output current

vs Supply voltage

vs Free-air temperature

10, 11

12

13

V

High-level output voltage

OH

OL

vs Differential input voltage

vs Free-air temperature

vs Low-level output current

14,16

15,17

18, 19

V

Low-level output voltage

vs Supply voltage

vs Free-air temperature

vs Frequency

20

21

32, 33

A

VD

Large-signal differential voltage amplification

I

Input bias current

vs Free-air temperature

vs Supply voltage

22

23

IB

Input offset current

IO

V

Common-mode input voltage

IC

vs Supply voltage

vs Free-air temperature

24

25

I

Supply current

Slew rate

DD

vs Supply voltage

vs Free-air temperature

26

27

SR

Normalized slew rate

vs Free-air temperature

vs Frequency

28

29

V

B

Maximum peak-to-peak output voltage

O(PP)

vs Free-air temperature

vs Supply voltage

30

31

Unity-gain bandwidth

Phase margin

1

vs Supply voltage

vs Free-air temperature

vs Capacitive Load

34

35

36

φ

m

V

n

Equivalent input noise voltage

Phase shift

vs Frequency

37

32, 33

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLC27L2

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC27L2

INPUT OFFSET VOLTAGE

70

60

50

40

30

20

10

0

70

60

50

40

30

20

10

0

905 Amplifiers Tested From 6 Wafer Lots

V

= 10 V

V

= 5 V

DD

T = 25°C

A

DD

= 25°C

T

A

P Package

−5 −4 −3 −2 −1

0

1

2

3

4

5

−5 −4 −3 −2 −1

0

1

2

3

4

5

V

IO

− Input Offset Voltage − mV

V

IO

− Input Offset Voltage − mV

Figure 6

Figure 7

DISTRIBUTION OF TLC27LC AND TLC27L7

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC27LC AND TLC27L7

INPUT OFFSET VOLTAGE

TEMPERATURE COEFFICIENT

70

60

50

40

30

20

10

0

356 Amplifiers Tested From 8 Wafer Lots

V

T

= 5 V

V

T

= 10 V

DD

= 25°C to 125°C

DD

= 25°C to 125°C

60

50

40

30

20

10

0

A

P Package

Outliers:

(1) 19.2 µV/°C

(1) 12.1 µV/°C

P Package

Outliers:

(1) 18.7 µV/°C

(1) 11.6 µV/°C

−10 −8 −6 −4 −2

0

2

4

6

8

10

−10 −8 −6 −4 −2

0

2

4

6

8

10

α

VIO

− Temperature Coefficient − µV/°C

α

VIO

− Temperature Coefficient − µV/°C

Figure 8

Figure 9

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ꢐ

ꢌ

ꢐ

ꢋ

ꢑ

ꢒ

ꢓ

ꢆ

ꢁ

ꢋ

ꢍ

ꢏ

ꢎ

ꢆ

ꢀ

ꢐ

ꢋ

ꢑ

ꢆ

ꢁ

ꢆ

ꢊ

ꢍ

ꢁ

ꢐ

ꢔ

ꢐ

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

5

4

3

2

1

0

16

14

12

10

8

V

T

= 100 mV

= 25°C

V

T

= 100 mV

ID

A

ID

= 25°C

A

V

= 16 V

DD

V

= 5 V

DD

V

DD

= 4 V

V

= 10 V

DD

V

DD

= 3 V

6

4

2

0

− 2

− 4

− 6

− 8

− 10

0

− 5 − 10 − 15 − 20 − 25 − 30 − 35 − 40

I

− High-Level Output Current − mA

I

− High-Level Output Current − mA

OH

Figure 10

Figure 11

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

V

DD

−1.6

−1.7

−1.8

−1.9

−2

16

14

12

10

8

V

= 100 mV

= 10 kΩ

= 25°C

I

= −5 mA

ID

L

OH

R

T

V

ID

= 100 mA

V

DD

= 5 V

A

V

DD

= 10 V

−2.1

−2.2

−2.3

−2.4

6

4

2

0

−75 −50 −25

0

20

50

75

100 125

0

2

4

V

6

8

10

12

14

16

T

− Free-Air Temperature − °C

A

− Supply Voltage − V

DD

Figure 12

Figure 13

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE

vs

DIFFERENTIAL INPUT VOLTAGE

FREE-AIR TEMPERATURE

700

600

500

400

300

500

450

400

350

300

250

V

= 5 V

= 5 mA

= 25°C

DD

V

= 10 V

= 5 mA

DD

I

OL

I

OL

T

A

T

A

= 25°C

V

= −100 mV

ID

V

= −100 mV

= −1 V

ID

V

ID

= − 2.5 V

V

= −1 V

ID

0

0.5

V

1

1.5

2

2.5

3

3.3

4

0

1

V

2

3

4

5

6

7

8

9

10

− Common-Mode Input Voltage − V

IC

Figure 14

Figure 15

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

DIFFERENTIAL INPUT VOLTAGE

800

700

600

500

400

300

200

100

0

900

800

700

600

500

400

300

200

100

0

I

V

= 5 mA

= −1 V

= 0.5 V

OL

ID

IC

I

V

T

= 5 mA

OL

= |V 2|

ID/

IC

= 25°C

A

V

= 5 V

DD

V

DD

= 5 V

V

DD

= 10 V

V

= 10 V

DD

−75 −50 −25

0

25

50

75

100 125

0

−1 −2 −3 −4 −5 −6 −7 −8 −9 −10

T

A

− Free-Air Temperature − °C

V

ID

− Differential Input Voltage − V

Figure 16

Figure 17

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

3

2.5

2

V

T

A

= −1 V

= 0.5 V

= 25°C

ID

V

= −1 V

= 0.5 V

ID

IC

T

A

= 25°C

V

= 16 V

DD

V

= 5 V

DD

V

= 4 V

DD

V

= 10 V

DD

V

= 3 V

DD

1.5

1

0.5

0

1

I

2

3

4

5

6

7

8

0

5

10

15

20

25

30

− Low-Level Output Current − mA

OL

I

− Low-Level Output Current − mA

OL

Figure 18

Figure 19

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

2000

1800

1600

1400

1200

1000

800

2000

1800

1600

1400

1200

1000

800

T

A

= −55°C

R

= 1 MΩ

R

= 1 MΩ

L

−40°C

= 0°C

T

A

V

DD

= 10 V

25°C

70°C

85°C

600

V

DD

= 5 V

400

125°C

200

0

2

4

6

8

10

12

14

16

−75 −50 −25

0

25

50

75

100 125

V

DD

− Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 20

Figure 21

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

COMMON-MODE

INPUT VOLTAGE POSITIVE LIMIT

vs

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

10000

1000

100

10

16

14

12

10

8

V

= 10 V

DD

= 5 V

T

A

= 25°C

IC

See Note A

I

IB

I

IO

6

4

1

2

0.1

0

25

45

A

65

85

105

125

0

2

4

6

8

10

12

14

16

T

− Free-Air Temperature − °C

V

DD

− Supply Voltage − V

NOTE A: The typical values of input bias current and input offset

current below 5 pA were determined mathematically.

Figure 22

Figure 23

SUPPLY CURRENT

vs

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

90

60

50

40

30

20

10

0

T

= −55°C

A

V

= V /2

DD

V = V /2

O DD

O

80

70

60

50

40

30

20

10

0

No Load

−40°C

V

DD

= 10 V

0°C

25°C

70°C

V

DD

= 5 V

125°C

0

2

4

6

8

10

12

14

16

−75 −50 −25

0

25

50

75

100 125

V

DD

− Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 24

Figure 25

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

21

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

ꢌ 

ꢁ

ꢈ

ꢉ

ꢂ

ꢊꢋ

ꢍꢎ ꢏꢂꢐ ꢌ ꢐ ꢋꢑ ꢒꢓ ꢆꢁ ꢋ ꢍꢏ ꢎꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍꢁ ꢐꢔ ꢐꢏ ꢎꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

SLEW RATE

vs

SLEW RATE

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

0.07

0.06

0.05

0.04

0.03

0.07

0.06

0.05

0.04

0.03

0.02

0.01

0.00

R

C

A

=1 MΩ

= 20 pF

= 1

A

= 1

= 1 V

=1 MΩ

= 20 pF

= 25°C

L

V

= 10 V

= 5.5 V

DD

I(PP)

V

I(PP)

R

C

T

L

See Figure 1

A

See Figure 1

V

= 10 V

DD

= 1 V

I(PP)

V

= 5 V

DD

0.02

0.01

0.00

= 1 V

I(PP)

V

= 5 V

= 2.5 V

DD

V

I(PP)

−75 −50 −25

0

25

50

75

100 125

16

0

2

4

6

8

10

12

14

TA − Free-Air Temperature − °C

V

DD

− Supply Voltage − V

Figure 26

Figure 27

NORMALIZED SLEW RATE

vs

MAXIMUM-PEAK-TO-PEAK OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

FREQUENCY

1.4

1.3

10

9

8

7

6

5

4

3

2

1

0

A

= 1

V

IPP

= 1 V

=1 MΩ

= 20 pF

V

= 10 V

DD

R

C

L

1.2

1.1

1

T

A

= 125°C

= 25°C

= −55°C

V

DD

= 10 V

T

A

T

A

V

DD

= 5 V

V

DD

= 5 V

0.9

0.8

0.7

0.6

0.5

R

= 1 MΩ

L

See Figure 1

−75 −50 −25

0

25

50

75

100 125

0.1

1

10

100

T

A

− Free-Air Temperature − °C

f − Frequency − kHz

Figure 28

Figure 29

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

22

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢆ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢁꢃ ꢇ ꢅ ꢀꢁ ꢂꢃ ꢄꢁ ꢄ

ꢍꢎꢏ ꢂꢐꢌ ꢐꢋ ꢑ ꢒꢓꢆ ꢁ ꢋ ꢍꢏꢎ ꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍ ꢁꢐ ꢔꢐ ꢏꢎ ꢌ

ꢁꢈ

ꢉ

ꢂ

ꢊ

ꢋ

ꢌ 

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

UNITY-GAIN BANDWIDTH

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

150

130

110

90

140

130

120

110

100

90

V

= 5 V

DD

V = 10 mV

I

C

= 20 pF

L

= 20 pF

L

T

A

= 25°C

See Figure 3

80

70

50

60

50

30

0

2

4

6

8

10

12

14

16

−75 −50 −25

0

25

50

75

100 125

T

A

− Free-Air Temperature − °C

V

DD

− Supply Voltage − V

Figure 30

Figure 31

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT

vs

FREQUENCY

7

6

5

10

V

= 10 V

= 1 MΩ

= 25°C

DD

R

T

A

L

0°

4

3

10

30°

60°

A

VD

2

1

10

90°

Phase Shift

120°

1

150°

180°

0.1

1

10

100

1 k

10 k

100 k

1 M

f − Frequency − Hz

Figure 32

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

23

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢄ ꢁ ꢃ ꢅ ꢀ ꢁ ꢂ ꢃꢄ ꢁꢃ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢃꢇ ꢅ ꢀꢁ ꢂꢃ ꢄ ꢁ ꢄ

ꢌ 

ꢁ

ꢈ

ꢉ

ꢂ

ꢊꢋ

ꢍꢎ ꢏꢂꢐ ꢌ ꢐ ꢋꢑ ꢒꢓ ꢆꢁ ꢋ ꢍꢏ ꢎꢆꢀ ꢐꢋ ꢑꢆꢁ ꢆꢊ ꢍꢁ ꢐꢔ ꢐꢏ ꢎꢌ

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

†

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT

vs

FREQUENCY

7

6

10

V

= 10 V

= 1 MΩ

= 25°C

DD

R

T

A

L

5

4

0°

10

30°

60°

A

VD

3

2

10

90°

Phase Shift

1

10

120°

1

150°

180°

0.1

1

10

100

1 k

10 k

100 k

1 M

f − Frequency − Hz

Figure 33

PHASE MARGIN

vs

PHASE MARGIN

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

42°

40°

38°

40°

36°

V = 10 mV

V

= 5 mV

I

DD

V = 10 mV

C

= 20 pF

L

I

C

T

A

= 25°C

= 20 pF

L

See Figure 3

32°

36°

34°

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