TLC5941PWP原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

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产品型号TLC5941PWP的概述

1. 概述 TLC5941PWP是一款由德州仪器（Texas Instruments）公司设计的16通道脉宽调制（PWM）LED驱动器，广泛应用于各种LED照明及显示设备中。这款芯片特别适合需要多通道高精度控制的应用场合，例如 LED条、LED面板以及其他多色LED灯具。TLC5941PWP的设计允许用户实现高效率的LED驱动，同时能够以软件编程的方式方便控制各通道亮度，提升了应用设计的灵活性和可扩展性。该芯片的核心特点包括：每个通道具有独立的8位亮度控制，支持串行数据输入和多通道的并行输出，以及可调节的输出电流。此外，TLC5941PWP还配备了故障检测功能，使其在实际应用中更加可靠。 2. 详细参数 TLC5941PWP的主要参数包括： - 电源电压：建议工作电压范围通常在3V到5.5V之间。 - 输出电流：每个输出通道的最大电流可以达到120mA。 - 输出通道数量：包含16个...

产品型号TLC5941PWP的Datasheet PDF文件预览

TLC5941

PWP

RHB

www.ti.com

SLVS589–JULY 2005

16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM

CONTROL

FEATURES

APPLICATIONS

•

Monocolor, Multicolor, Full-Color LED Dis-

plays

•

16 Channels

12-bit (4096 Steps) Grayscale PWM Control

Dot Correction

•

LED Signboards

Display Back-lighting

– 6 bit (64 Steps)

•

Drive Capability (Constant-Current Sink)

– 0 mA to 80 mA

DESCRIPTION

The TLC5941 is a 16-channel, constant-current sink,

LED driver. Each channel has an individually adjust-

able 4096-step grayscale PWM brightness control

and a 64-step constant-current sink (dot correction).

The dot correction adjusts the brightness variations

between LED channels and other LED drivers. Both

grayscale control and dot correction are accessible

via a serial interface. A single external resistor sets

the maximum current value of all 16 channels.

•

LED Power Supply Voltage up to 17 V

V_CC= 3.0 V to 5.5 V

Serial Data Interface, SPI Compatible

Controlled In-Rush Current

30-MHz Data Transfer Rate

CMOS Level I/O

Error Information

The TLC5941 features two error information circuits.

The LED open detection (LOD) indicates a broken or

disconnected LED at an output terminal. The thermal

error flag (TEF) indicates an overtemperature con-

dition.

– LOD: LED Open Detection

– TEF: Thermal Error Flag

VCC

GND

SCLK

SIN

XLAT

CNT

MODE

Constant-Current

Driver

12−Bit Grayscale

PWM Control

GS Register

DC Register

OUT0

IREF

REF

=1.24

MODE

Max. OUTn

Current

Delay

6−Bit Dot Correction

LED Open Detection

GSCLK

BLANK

GS Counter

CNT

Input

Shift

CNT

Status

Constant-Current

Driver

Information:

12−Bit Grayscale

PWM Control

192

GS Register

OUT1

LOD,

TED,

DC DATA

Delay

DC Register

6−Bit Dot Correction

LED Open Detection

191

MODE

Temperature

Error Flag

(TEF)

LED Open

Detection

(LOD)

CNT

Input

Shift

Constant-Current

Driver

12−Bit Grayscale

PWM Control

GS Register

191

OUT15

180

Delay

x15

XERR

DC Register

6−Bit Dot Correction

LED Open Detection

191

SOUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TLC5941

www.ti.com

SLVS589–JULY 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

28-pin HTSSOP PowerPAD™

32-pin 5 mm x 5 mm QFN

28-pin PDIP

PART NUMBER

TLC5941PWP

TLC5941RHB

TLC5941NT

–40°C to 85°C

(1) For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI Web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS.

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

UNIT

V_I

I_O

V_I

Input voltage range⁽²⁾

Output current (dc)

Input voltage range

VCC

–0.3 V to 6 V

90 mA

V_(BLANK), V_(SCLK), V_(XLAT), V_(MODE)

V_(SOUT), V_(XERR)

–0.3 V to V_CC+0.3 V

–0.3 V to 18 V

V_O

Output voltage range

V_(OUT0)to V_(OUT15)

HBM (JEDEC JESD22-A114,

Human Body Model)

2 kV

ESD rating

CDM (JEDEC JESD22-C101,

Charged Device Model)

500 V

T_stg

T_A

Storage temperature range

–55°C to 150°C

–40°C to 85°C

31.58°C/W

35.9°C/W

Operating ambient temperature range

HTSSOP (PWP)⁽⁴⁾

Package thermal impedance⁽³⁾QFN (RHB)⁽⁴⁾

PDIP (NT)

48°C/W

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) The package thermal impedance is calculated in accordance with JESD 51-7.

(4) With PowerPAD soldered on PCB with 2-oz. trace of copper. See TI application report SLMA002 for further information.

TLC5941

www.ti.com

SLVS589–JULY 2005

RECOMMENDED OPERATING CONDITIONS

PARAMETER

DC Characteristics

TEST CONDITIONS

MIN

NOM

MAX

UNIT

V_CC

V_O

Supply Voltage

5.5

Voltage applied to output (OUT0 - OUT15)

High-level input voltage

V_IH

V_IL

I_OH

I_OL

0.8 V_CC

GND

V_CC

0.2 V_CC

–1

Low-level input voltage

High-level output current

Low-level output current

Constant output current

V_CC= 5 V at SOUT

°C

V_CC= 5 V at SOUT, XERR

OUT0 to OUT15

I_OLC

T_A

Operating free-air temperature range

–40

AC Characteristics

V_CC= 3 V to 5.5 V, T_A= –40°C to 85°C (unless otherwise noted)

Data shift clock

frequency

f_(SCLK)

SCLK

MHz

Grayscale clock

frequency

f_(GSCLK)

GSCLK

(1)

t_wh0/t_wl0

t_wh1/t_wl1

t_wh2

t_wh3

t_su0

SCLK pulse duration

GSCLK pulse duration

XLAT pulse duration

BLANK pulse duration

SCLK = H/L

(2)

GSCLK = H/L

(3)

XLAT = H

(2)

BLANK = H

SIN - SCLK

SCLK - XLAT

(3)

t_su1

(4)

t_su2

Setup time

Hold Time

MODE - SCLK

MODE - XLAT

t_su3

(2)

t_su4

BLANK - GSCLK

(3)

t_h0

SCLK - SIN

(3)

t_h1

XLAT - SCLK

(4)

t_h2

SCLK - MODE

XLAT - MODE

(4)

t_h3

(2)

t_h4

BLANK - GSCLK

(1) See Figure 8

(2) See Figure 12

(3) See Figure 10

(4) See Figure 6

DISSIPATION RATINGS

POWER RATING

PACKAGE

DERATING FACTOR ABOVE T_A= 25°C

31.67 mW/°C

T_A< 25°C

T_A= 70°C

T_A= 85°C

28-pin HTSSOP with

PowerPAD™

3958 mW

2533 mW

1296 mW

2058 mW

1053 mW

soldered⁽¹⁾

28-pin HTSSOP

without PowerPAD™

soldered

2026 mW

16.21 mW/°C

32-pin QFN⁽¹⁾

3482 mW

2456 mW

27.86 mW/°C

19.65 mW/°C

2228 mW

1572 mW

1811 mW

1277 mW

28-pin PDIP

(1) The PowerPAD is soldered to the PCB with a 2-oz. copper trace. See application report SLMA002 for further information.

TLC5941

www.ti.com

SLVS589–JULY 2005

ELECTRICAL CHARACTERISTICS

V_CC= 3 V to 5.5 V, T_A= -40°C to 85°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V_OH

V_OL

High-level output voltage

Low-level output voltage

I_OH= –1 mA, SOUT

I_OL= 1 mA, SOUT

V_CC–0.5

0.5

V_I= V_CCor GND; BLANK, TEST,

GSCLK, SCLK, SIN, XLAT pin

–1

I_I

Input current

µA

V_I= V_CC; MODE pin

V_I= GND; MODE pin

No data transfer, all output OFF,

V_O= 1 V, R_(IREF)= 10 kΩ

0.9

5.2

No data transfer, all output OFF,

V_O= 1 V, R_(IREF)= 1.3 kΩ

I_CC

Supply current

Data transfer 30 MHz, all output ON,

V_O= 1 V, R_(IREF)= 1.3 kΩ

Data transfer 30 MHz, all output ON,

V_O= 1 V, R_(IREF)= 640 Ω

All output ON, V_O= 1 V,

R_(IREF)= 640 Ω

I_O(LC)

Constant output current

Leakage output current

All output OFF,

V_O= 15 V, R_(IREF)= 640 Ω ,

OUT0 to OUT15

I_lkg

0.1

µA

All output ON,

V_O= 1 V, R_(IREF)= 640 Ω,

OUT0 to OUT15, –20°C to 85°C

±1

±4

All output ON,

V_O= 1 V, R_(IREF)= 480 Ω,

OUT0 to OUT15, –20°C to 85°C

∆I_O(LC0)

±1

±6

±8

±4

All output ON,

V_O= 1 V, R_(IREF)= 480 Ω

Constant current error

Device to device, averaged current from

OUT0 to OUT15,R_(IREF)= 1920 Ω

(20 mA)

+0.4,

-2

∆I_O(LC1)

Device to device, averaged current from

OUT0 to OUT15,R_(IREF)= 480 Ω

(80 mA)

+2,

-2.7

∆I_O(LC2)

±4

±6

All output ON,

V_O= 1 V, R_(IREF)= 640 Ω

OUT0 to OUT15

±1

Power supply rejection ratio,

PSRR

∆I_O(LC3)

%/V

All output ON,

V_O= 1 V, R_(IREF)= 480 Ω

OUT0 to OUT15

All output ON,

V_O= 1 V to 3 V,

R_(IREF)= 640 Ω,

OUT0 to OUT15

±2

±6

±8

∆I_O(LC4)

Load regulation

%/V

All output ON,

V_O= 1 V to 3 V,

R_(IREF)= 480 Ω,

OUT0 to OUT15

T_(TEF)

V_(LED)

Thermal error flag threshold Junction temperature⁽¹⁾

150

170

0.4

°C

LED open detection

threshold

0.3

Reference voltage

R_I(REF)= 640 Ω

output

V_(IREF)

1.20

1.24

1.28

(1) Not tested. Specified by design

TLC5941

www.ti.com

SLVS589–JULY 2005

SWITCHING CHARACTERISTICS

V_CC= 3 V to 5.5 V, T_A= –40°C to 85°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

SOUT

MIN

TYP

MAX UNIT

t_r0

Rise time

OUTn, V_CC= 5 V,

T_A= 60°C, DCx = 3F

t_r1

t_f0

SOUT

Fall time

OUTn, V_CC= 5 V,

T_A= 60°C, DCx = 3F

t_f1

(1)

t_pd0

t_pd1

SCLK - SOUT

(2)

BLANK - OUT0

(2)

t_pd2

t_pd3

t_pd4

t_d

Propagation delay time

Output delay time

OUTn - XERR

1000

(2)

GSCLK - OUT0

XLAT - I_OUT(dot correction)

1000

(2)

OUTn - OUT(n+1)

(1) See Figure 10

(2) See Figure 12

TLC5941

www.ti.com

SLVS589–JULY 2005

DEVICE INFORMATION

PWP PACKAGE

(TOP VIEW)

NT PACKAGE

(TOP VIEW)

OUT1

OUT0

GND

VCC

IREF

TEST

BLANK

XLAT

SCLK

SIN

MODE

OUT0

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

OUT9

OUT10

OUT11

OUT12

OUT13

OUT14

MODE

SIN

GSCLK

SOUT

XERR

OUT15

OUT14

OUT13

OUT12

OUT11

OUT10

OUT9

OUT8

SCLK

XLAT

BLANK

GND

Thermal

PAD

VCC

IREF

TEST

GSCLK

SOUT

XERR

OUT15

RHB PACKAGE

(TOP VIEW)

TEST

16 OUT10

15 OUT9

14 OUT8

13 NC

IREF 26

VCC 27

NC 28

THERMAL

PAD

NC 29

12 NC

GND 30

BLANK 31

XLAT 32

11 OUT7

10 OUT6

OUT5

NC − No internal connection

TLC5941

www.ti.com

SLVS589–JULY 2005

DEVICE INFORMATION (continued)

TERMINAL FUNCTION

TERMINAL

PWP

NO.

RHB

NO.

I/O

DESCRIPTION

NAME

NO.

Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF.

GS counter is also reset. When BLANK = L, OUTn are controlled by

grayscale PWM control.

BLANK

GND

Ground

GSCLK

IREF

Reference clock for grayscale PWM control

Reference current terminal

No connection

12, 13, 28, 29

OUT0

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

OUT9

OUT10

OUT11

OUT12

OUT13

OUT14

OUT15

SCLK

SIN

Constant-current output

Serial data shift clock

Serial data input

SOUT

TEST

Serial data output

Test pin: Connect to VCC

Power supply voltage. It is important to connect both pins to supply

voltage to ensure proper operation of the device.

VCC

Input mode-change pin. When MODE = GND, the device is in GS

mode. When MODE = V_CC, the device is in DC mode.

MODE

XERR

Error output. XERR is an open-drain terminal. XERR goes L when

LOD or TEF is detected.

Data latch. Note that the internal connections are switched by MODE.

At XLAT↑ (MODE = GND), GS register gets new data. At XLAT↑

(MODE = V_CC), DC register gets new data.

XLAT

TLC5941

www.ti.com

SLVS589–JULY 2005

PARAMETER MEASUREMENT INFORMATION

PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

Resistor values are equivalent resistance and not tested.

INPUT EQUIVALENT CIRCUIT

OUTPUT EQUIVALENT CIRCUIT (SOUT)

(BLANK, XLAT, SCLK, SIN, GSCLK, TEST)

VCC

23 W

400 W

INPUT

SOUT

GND

INPUT EQUIVALENT CIRCUIT (IREF)

VCC

OUTPUT EQUIVALENT CIRCUIT (XERR)

23 W

Amp

XERR

400 W

INPUT

100 W

GND

INPUT EQUIVALENT CIRCUIT (VCC)

OUTPUT EQUIVALENT CIRCUIT (OUT)

OUT

INPUT

GND

INPUT EQUIVALENT CIRCUIT (MODE)

INPUT

GND

Figure 1. Input and Output Equivalent Circuits

TLC5941

www.ti.com

SLVS589–JULY 2005

PARAMETER MEASUREMENT INFORMATION (continued)

, t , t

who wIO wh1 wl1 su0

su4, h4

(LED)

= 4 V

SOUT

Test Point

= 15 pF

= 51 W

OUTn

Test Point

= 15 pF

IOLC, IOLC3, IOLC4, IOUT/IREF

(LED)

1 V

OUT0

OUTn

= 0 V ~ 7 V

OUT15

IREF

Test Point

= 640 W

IREF

Figure 2. Parameter Measurement Circuits

TLC5941

www.ti.com

SLVS589–JULY 2005

Typical Characteristics

REFERENCE RESISTOR

OUTPUT CURRENT

POWER DISSIPATION RATE

FREE-AIR TEMPERATURE

100 k

10 k

1 k

4000

TLC5941PWP+

TLC5941RHB

3000

2000

1000

TLC5941NT

3.84 k

TLC5941PWP−

1.92 k

1.28 k

0.96 k

0.79 k

0.64 k

0.55 k

0.48 k

−40

100

−20

− Output Current − mA

− Free-Air Temperature − 5C

O(LC)

Figure 3.

Figure 4.

OUTPUT CURRENT

OUTPUT VOLTAGE

100

= 60 mA

MAX

= 30 mA

MAX

= 5 mA

MAX

0.20.4 0.6 0.8 1 1.21.4 1.61.8 2 2.22.4 2.6 2.8 3

− Output Voltage − V

Figure 5.

TLC5941

www.ti.com

SLVS589–JULY 2005

PRINCIPLES OF OPERATION

SERIAL INTERFACE

The TLC5941 includes a flexible serial interface, which can be connected to microcontrollers or digital signal

processors in various ways. Only 3 pins are needed to input data into the device. The rising edge of SCLK signal

shifts the data from the SIN pin to the internal register. After all data is clocked in, a rising edge of XLAT latches

the serial data to the internal registers. All data are clocked in with the MSB first. Multiple TLC5941 devices can

be cascaded by connecting the SOUT pin of one device with the SIN pin of the following device. The SOUT pin

can also be connected to the controller to receive status information from the TLC5941. The serial data format is

96-bit or 192-bit wide, depending on programming mode of the device.

DC Mode Data

Input Cycle

GS Mode Data

Input Cycle

DC Mode Data

Input Cycle

Vcc

MODE

su3

XLAT

SIN

DC n

MSB

DC n

LSB

MSB

LSB

DC n+1

MSB

DC n+1

MSB−1

su2

192

193

SCLK

SOUT

DC n

MSB

DC n

LSB

MSB

SID

MSB

Figure 6. Serial Data Input Timing Chart

ERROR INFORMATION OUTPUT

The open-drain output XERR is used to report both of the TLC5941 error flags, TEF and LOD. During normal

operating conditions, the internal transistor connected to the XERR pin is turned off. The voltage on XERR is

pulled up to V_CCthrough an external pullup resistor. If TEF or LOD is detected, the internal transistor is turned

on, and XERR is pulled to GND. Because XERR is an open-drain output, multiple ICs can be ORed together and

pulled up to V_CCwith a single pullup resistor. This reduces the number of signals needed to report a system error

(see Figure 13).

To differentiate LOD and TEF signal from XERR pin, LOD can be masked out with BLANK = HIGH.

Table 1. XERR Truth Table

ERROR CONDITION

TEMPERATURE

ERROR INFORMATION

SIGNALS

OUTn VOLTAGE

Don't Care

TEF

LOD

BLANK

XERR

T_J< T_(TEF)

T_J> T_(TEF)

Don't Care

OUTn > V_(LED)

OUTn < V_(LED)

OUTn > V_(LED)

OUTn < V_(LED)

T_J< T_(TEF)

T_J> T_(TEF)

TLC5941

www.ti.com

SLVS589–JULY 2005

TEF: THERMAL ERROR FLAG

The TLC5941 provides a temperature error flag (TEF) circuit to indicate an overtemperature condition of the IC. If

the junction temperature exceeds the threshold temperature (160°C typical), the TEF circuit trips and pulls XERR

to ground. TEF status can also be read out from the TLC5941 status register.

LOD: LED OPEN DETECTION

The TLC5941 provides an LED open-detection circuit (LOD). This circuit reports an error if any one of the 16

LEDs is open or disconnected from the circuit. The LOD circuit trips when the following two conditions are met

simultaneously:

1. BLANK is set to LOW

2. When the voltage at OUTn is less than V_(LED)of 0.3 V (typical). (Note: the voltage at each OUTn is sampled

1 µs after being turned on.)

The LOD circuit also pulls XERR to GND when tripped. The LOD status of each channel can also be read out

from the TLC5941 status information data (SID) in GS data input cycle.

DELAY BETWEEN OUTPUTS

The TLC5941 has graduated delay circuits between outputs. These circuits can be found in the constant-current

driver block of the device (see functional block diagram). The fixed-delay time is 20 ns (typical), OUT0 has no

delay, OUT1 has 20 ns delay, and OUT2 has 40 ns delay, etc. The maximum delay is 300 ns from OUT0 to

OUT15. The delay works by switch on and switch off of each output channel. This means that the on/off time of

each channel is the same regardless of delay. These delays prevent large inrush currents and switching noise

which reduces the bypass capacitors when the outputs turn on.

OUTPUT ENABLE

All OUTn channels of TLC5941 can be switched off with one signal. When BLANK is set to high, all OUTn

channels are disabled, regardless of logic operations of the device. The grayscale counter is also reset. When

BLANK is set to low, all OUTn channels work under normal conditions.

Table 2. BLANK Signal Truth Table

BLANK

LOW

OUT0 - OUT15

Normal condition

Disabled

HIGH

SETTING MAXIMUM CHANNEL CURRENT

The maximum output current per channel is programmed by a single resistor, R_(IREF), which is placed between

IREF pin and GND pin. The voltage on IREF is set by an internal band gap V_(IREF)with a typical value of

1.24 V. The maximum channel current is equivalent to the current flowing through R_(IREF)multiplied by a factor of

31.5. The maximum output current can be calculated by Equation 1:

(IREF)

31.5

max

(IREF)

(1)

where:

V_(IREF)= 1.24 V

R_(IREF)= User-selected external resistor.

Figure 3 shows the maximum output current I_Oversus R_(IREF). R_(IREF)is the value of the resistor between IREF

terminal to GND, and I_Ois the constant output current of OUT0 to OUT15.

TLC5941

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SLVS589–JULY 2005

POWER DISSIPATION CALCULATION

The device power dissipation needs to be below the power dissipation rate of the device package to ensure

^{correct operation. Equation 2}ǒ^ca_V^{lculates the power dissipation of device:}

₊ǒ_{VCC CC}Ǔ₎

OUT

MAX

PWM

(2)

where:

V_CC: device supply voltage

I_CC: device supply current

V_OUT: TLC5941 OUTn voltage when driving LED current

I_MAX: LED current adjusted by R_(IREF)Resistor

DC_n: maximum dot correction value for OUTn

N: number of OUTn driving LED at the same time

d_PWM: duty cycle defined by BLANK pin or GS PWM value

OPERATING MODES

Table 3 shows the available operating modes. The TLC5941 GS operating mode (see Figure 10) and shift

TLC5941 power up and switch back to GS PWM mode. The other solution is to overflow the input shift register

with 193 bits of dummy data and latch it while TLC5941 is in GS PWM mode.

Table 3. MODE Signal Truth Table

MODE

LOW

INPUT SHIFT REGISTER

OPERATING MODE

Grayscale PWM Mode

192 bit

96 bit

HIGH

Dot Correction Data Input Mode

SETTING DOT CORRECTION

The TLC5941 has the capability to fine-adjust the output current of each channel (OUT0 to OUT15)

independently. This is also called dot correction. This feature is used to adjust the brightness deviations of LEDs

connected to the output channels OUT0 to OUT15. Each of the 16 channels can be programmed with a 6-bit

word. The channel output can be adjusted in 64 steps from 0% to 100% of the maximum output current I_max

Equation 3 determines the output current for each output n:

DCn

+ I

max

OUTn

where:

(3)

I_max= the maximum programmable output current for each output.

DCn = the programmed dot correction value for output n (DCn = 0 to 63).

n = 0 to 15

Dot correction data are entered for all channels at the same time. The complete dot correction data format

consists of 16 x 6-bit words, which forms a 96-bit wide serial data packet. The channel data is put one after

another. All data is clocked in with MSB first. Figure 7 shows the DC data format.

TLC5941

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SLVS589–JULY 2005

LSB

MSB

DC 0.0

DC 0.5

DC 1.0

DC 14.5 DC 15.0

DC 15.5

DC OUT0

DC OUT15

DC OUT2 − DC OUT14

Figure 7. Dot Correction Data Packet Format

To input data into the dot correction register, MODE must be set to V_CC. The internal input shift register is then

set to 96-bit width. After all serial data are clocked in, a rising edge of XLAT is used to latch the data into the dot

correction register. Figure 8 shows the dc data input timing chart.

DC Mode Data

Input Cycle n

Input Cycle n+1

MODE

SIN

DC n

MSB

DC n

MSB−1

DC n

MSB−2

DC n

LSB+1

DC n

LSB

DC n+1

MSB

DC n+1

MSB−1

DC n−1

LSB

wh0

SCLK

wl0

DC n−1

MSB

DC n−1

MSB−1

DC n−1

MSB−2

DC n−1

LSB+1

DC n−1

LSB

DC n

MSB

DC n

MSB−1

DC n

MSB−2

SOUT

XLAT

wh2

su1

Figure 8. Dot Correction Data Input Timing Chart

SETTING GRAYSCALE

The TLC5941 can adjust the brightness of each channel OUTn using a PWM control scheme. The use of 12 bits

per channel results in 4096 different brightness steps, from 0% to 100% brightness. Equation 4 determines the

brightness level for each output n:

GSn

4095

Brightness in % +

100

(4)

where:

GSn = the programmed grayscale value for output n (GSn = 0 to 4095)

n = 0 to 15

Grayscale data for all OUTn

The input shift register enters grayscale data into the grayscale register for all channels simultaneously. The

complete grayscale data format consists of 16 x 12 bit words, which forms a 192-bit wide data packet (see

Figure 9). The data packet must be clocked in with the MSB first.

TLC5941

www.ti.com

SLVS589–JULY 2005

LSB

MSB

191

178

180

GS 0.0

GS 0.11 GS 0.0

GS 14.11 GS15.0

GS 15.11

GS OUT0

GS OUT2 − GS OUT14

GS OUT15

Figure 9. Grayscale Data Packet Format

When MODE is set to GND, the TLC5941 enters the grayscale data input mode. The device switches the input

shift register to 192-bit width. After all data is clocked in, a rising edge of the XLAT signal latches the data into

the grayscale register (see Figure 10). The first GS data input cycle after dot correction requires an additional

SCLK pulse after the XLAT signal to complete the grayscale update cycle. All GS data in the input shift register

is replaced with status information data (SID) after latching into the grayscale register.

DC Mode Data

Input Cycle

First GS Mode Data

Input Cycle After DC Data Input Cycle

Following GS Mode Data

Input Cycle

MODE

su3

XLAT

SIN

wh2

GS + 1

MSB

GS n + 1

LSB

MSB

LSB

su2

su1

192

193

192

SCLK

SOUT

pd0

SID n + 1

MSB

SID

MSB

SID

LSB

MSB

DC n

LSB

MSB

MSB−1

Figure 10. Grayscale Data Input Timing Chart

STATUS INFORMATION OUTPUT

The TLC5941 does have a status information register, which can be accessed in grayscale mode (MODE =

GND). After the XLAT signal latches the data into the GS register, the input shift register data is replaced with

status information data (SID) of the device (see Figure 10). LOD, TEF, and dot-correction register data can be

read out at the SOUT pin. The status information data packet is 192 bits wide. Bits 176 – 191 contain the LOD

status of each channel. Bit 175 contains the TEF status. Bits 72 – 167 contain the data of the dot-correction

LSB

MSB

191

167

168

175

176

DC 0.0

DC15.5

TEF

LOD 0

LOD 15

Reserved

DC Values

TEF

LOD Data

Figure 11. Status Information Data Packet Format

TLC5941

www.ti.com

SLVS589–JULY 2005

GRAYSCALE PWM OPERATION

The grayscale PWM cycle starts with the falling edge of BLANK. The first GSCLK pulse after BLANK increases

the grayscale counter by one and switches on all OUTn with grayscale value not zero. Each following rising edge

of GSCLK increases the grayscale counter by one. The TLC5941 compares the grayscale value of each output

OUTn with the grayscale counter value. All OUTn with grayscale values equal to counter values are switched off.

A BLANK=H signal after 4096 GSCLK pulses resets the grayscale counter to zero and completes the grayscale

PWM cycle (see Figure 12).

GS PWM

Cycle n

GS PWM

Cycle n+1

BLANK

GSCLK

wl1

su4

wh1

wh3

4096

wl1

pd4

pd1

pd3

OUT0

(Current)

n x t

t + n x t

pd3 d

+ t

pd1

OUT1

(Current)

+ 15 x t

pd1

OUT15

(Current)

pd3

XERR

Figure 12. Grayscale PWM Cycle Timing Chart

SERIAL DATA TRANSFER RATE

Figure 13 shows a cascading connection of n TLC5941 devices connected to a controller, building a basic

module of an LED display system. The maximum number of cascading TLC5941 devices depends on the

application system and is in the range of 40 devices. Equation 5 calculates the minimum frequency needed:

4096

(GSCLK)

(update)

+ 193 f

(SCLK)

(update)

(5)

where:

f_(GSCLK): minimum frequency needed for GSCLK

f_(SCLK): minimum frequency needed for SCLK and SIN

f_(update): update rate of whole cascading system

n: number cascaded of TLC5941 device

TLC5941

www.ti.com

SLVS589–JULY 2005

Application Example

(LED)

100 k

OUT0

OUT15

SOUT

OUT0

OUT15

SOUT

SIN

XERR

SCLK

XERR

SCLK

XLAT

GSCLK

XERR

SCLK

XLAT

100 nF

XLAT

TLC5941

IC 0

TLC5941

IC n

GSCLK

MODE

BLANK

TEST

GSCLK

MODE

BLANK

TEST

MODE

IREF

Controller

BLANK

SOUT

Figure 13. Cascading Devices

PACKAGE OPTION ADDENDUM

www.ti.com

21-Oct-2005

PACKAGING INFORMATION

Orderable Device

TLC5941PWP

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

HTSSOP

PWP

50 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TLC5941PWPR

TLC5941PWPRG4

HTSSOP

PWP

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TLC5941RHB

PREVIEW

ACTIVE

QFN

RHB

TBD

Call TI

TLC5941RHBR

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TLC5941RHBRG4

ACTIVE

QFN

RHB

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan

The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS

no Sb/Br)

please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

in which TI products or services are used. Information published by TI regarding third-party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

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amplifier.ti.com

www.ti.com/audio

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power.ti.com

Optical Networking

Security

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microcontroller.ti.com

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Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

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TLC5941PWP产品参数

型号:	TLC5941PWP
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	SSOP
包装说明：	HTSSOP-28
针数：	28
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	1 week
风险等级：	0.68
Samacsys Confidence：	3
Samacsys Status：	Released
Samacsys PartID：	96950
Samacsys Pin Count：	29
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	Small Outline Packages
Samacsys Footprint Name：	TLC5941PWP-1
Samacsys Released Date：	2015-04-16 09:48:08
Is Samacsys：	N
数据输入模式：	SERIAL
输入特性：	STANDARD
接口集成电路类型：	LED DISPLAY DRIVER
JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e4
长度：	9.7 mm
湿度敏感等级：	2
复用显示功能：	NO
功能数量：	1
区段数：	16
端子数量：	28
最高工作温度：	85 °C
最低工作温度：	-40 °C
输出特性：	CONSTANT-CURRENT
封装主体材料：	PLASTIC/EPOXY
封装代码：	HTSSOP
封装等效代码：	TSSOP28,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260
电源：	3.3/5 V
认证状态：	Not Qualified
座面最大高度：	1.2 mm
子类别：	Display Drivers
最大压摆率：	60 mA
最大供电电压：	5.5 V
最小供电电压：	3 V
标称供电电压：	5 V
表面贴装：	YES
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	4.4 mm
最小 fmax：	30 MHz
Base Number Matches：	1

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