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TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2342

D OR P PACKAGE

(TOP VIEW)

Wide Range of Supply Voltages Over

Specified Temperature Range:

–40°C to 85°C . . . 2 V to 8 V

Fully Characterized at 3 V and 5 V

Single-Supply Operation

1OUT

1IN–

1IN+

/GND

V

DD

1

2

3

4

8

7

6

5

2OUT

2IN–

2IN+

Common-Mode Input-Voltage Range

Extends Below the Negative Rail and Up to

V

DD–

V

–1 V at 25°C

DD

TLV2342

PW PACKAGE

(TOP VIEW)

Output Voltage Range Includes Negative

Rail

12

High Input Impedance . . . 10 Ω Typical

1

2

3

4

8

7

6

5

1OUT

1IN–

1IN+

/GND

V

DD+

ESD-Protection Circuitry

2OUT

2IN–

2IN+

Designed-In Latch-Up Immunity

V

DD –

description

TLV2344

The TLV234x operational amplifiers are in a family

of devices that has been specifically designed for

use in low-voltage single-supply applications.

Unlike other products in this family designed

primarily to meet aggressive power consumption

specifications, the TLV234x was developed to

offer ac performance approaching that of a BiFET

operational amplifier while operating from a

single-supply rail. At 3 V, the TLV234x has a

typical slew rate of 2.1 V/µs and 790-kHz

unity-gain bandwidth.

D OR N PACKAGE

(TOP VIEW)

1OUT

4OUT

1

2

3

4

5

6

7

14

13

12

11

10

9

1IN–

1IN+

4IN–

4IN+

V

DD+

DD–/GND

2IN+

3IN+

3IN–

3OUT

2N–

2OUT

8

Each amplifier is fully functional down to a

minimum supply voltage of 2 V and is fully

characterized, tested, and specified at both 3-V

and 5-V power supplies over a temperature range

of –40°C to 85°C. The common-mode input

voltage range includes the negative rail and

extends to within 1 V of the positive rail.

TLV2344

PW PACKAGE

(TOP VIEW)

1

1OUT

1IN –

1IN +

4OUT

4IN –

4IN +

14

V

/GND

DD+

DD –

2IN +

2IN –

2OUT

3IN +

3IN –

3OUT

7

8

‡

AVAILABLE OPTIONS

PACKAGED DEVICES

§

V

max

CHIP FORM

(Y)

IO

T

A

†

PLASTIC DIP PLASTIC DIP

SMALL OUTLINE

(D)

TSSOP

(PW)

AT 25°C

(N)

(P)

TLV2342IP

—

9 mV

TLV2342ID

TLV2344ID

—

TLV2342IPWLE

TLV2344IPWLE

TLV2342Y

TLV2344Y

–40°C to 85°C

10 mV

TLV2344IN

†

‡

§

The D package is available taped and reeled. Add R suffix to the device type (e.g., TLV2342IDR).

The PW package is only available left-end taped and reeled (e.g., TLV2342IPWLE).

Chip forms are tested at 25°C only.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

description (continued)

Low-voltage and low-power operation has been made possible by using the Texas Instruments silicon-gate

LinCMOS technology. The LinCMOS process also features extremely high input impedance and ultra-low input

bias currents. These parameters combined with good ac performance make the TLV234x effectual in

applications such as high-frequency filters and wide-bandwidth sensors.

To facilitate the design of small portable equipment, the TLV234x is made available in a wide range of package

options, including the small-outline and thin-shrink small-outline packages (TSSOP). The TSSOP package has

significantly reduced dimensions compared to a standard surface-mount package. Its maximum height of only

1.1 mm makes it particularly attractive when space is critical.

The device inputs and outputs are designed to withstand –100-mA currents without sustaining latch-up. The

TLV234x incorporates internal ESD-protection circuits that prevents functional failures at voltages up to

2000 V as tested under MIL-PRF-38535, Method 3015.2; however, care should be exercised in handling these

devices as exposure to ESD may result in the degradation of the device parametric performance.

TLV2342Y chip information

This chip, when properly assembled, displays characteristics similar to the TLV2342. Thermal compression or

ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive

epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(4)

(5)

(6)

(3)

(2)

V

DD

(8)

(3)

(2)

+

–

1IN+

1IN–

(1)

(7)

1OUT

2OUT

(5)

(6)

59

+

–

2IN+

2IN–

(4)

V

DD–

/GND

CHIP THICKNESS: 15 MILS TYPICAL

(7)

(1)

(8)

BONDING PADS: 4 × 4 MILS MINIMUM

T max = 150°C

J

72

TOLERANCES ARE ±10%.

ALL DIMENSIONS ARE IN MILS.

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2344Y chip information

This chip, when properly assembled, displays characteristics similar to the TLV2344. Thermal compression or

ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive

epoxy or a gold-silicon preform.

V

DD

(4)

BONDING PAD ASSIGNMENTS

(12) (11)

(3)

(2)

+

–

+

–

+

–

+

–

1IN+

1IN–

(14)

(8)

(13)

(10)

(9)

(1)

1OUT

2OUT

3OUT

4OUT

(3)

(5)

(6)

2IN+

2IN–

(7)

68

(10)

(9)

3IN+

3IN–

(8)

(12)

(13)

4IN+

4IN–

(14)

(6)

(2)

(1)

(3)

(4) (5)

108

(7)

(11)

V

/GND

DD–

CHIP THICKNESS: 15 MILS TYPICAL

BONDING PADS: 4 × 4 MILS MINIMUM

T max = 150°C

J

TOLERANCES ARE ±10%.

ALL DIMENSIONS ARE IN MILS.

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

equivalent schematic (each amplifier)

V

DD

P3

P4

R6

N5

P1

P2

IN–

IN+

R2

R1

P6

P5

C1

R5

N3

OUT

N4

N1

D1

N2

N6

R7

D2

R3

N7

R4

GND

ACTUAL DEVICE COMPONENT COUNT

†

COMPONENT

TLV2342

TLV2344

Transistors

Resistors

Diodes

54

14

4

108

28

8

Capacitors

2

4

†

Includes both amplifiers and all ESD, bias, and trim

circuitry.

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

†

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V

DD

Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V

ID

DD±

I

DD

Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA

I

Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 mA

O

Duration of short-circuit current at (or below) T = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . unlimited

A

Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C

A

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.

2. Differential voltages are at the noninverting input with respect to the inverting input.

3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded (see application selection).

DISSIPATION RATING TABLE

T

≤ 25°C

DERATING FACTOR

T = 85°C

A

POWER RATING

A

PACKAGE

POWER RATING

ABOVE T = 25°C

A

D–8

D–14

N

725 mW

5.8 mW/°C

7.6 mW/°C

5.6 mW/°C

8.0 mW/°C

4.2 mW/°C

6.0 mW/°C

377 mW

950 mW

494 mW

1575 mW

1000 mW

525 mW

364 mW

P

520 mW

PW–8

PW–14

273 mW

700 mW

340 mW

recommended operating conditions

MIN

2

MAX

8

UNIT

Supply voltage, V

V

DD

V

= 3 V

= 5 V

–0.2

–40

1.8

3.8

85

DD

Common-mode input voltage, V

V

IC

Operating free-air temperature, T

DD

°C

A

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2342I electrical characteristics at specified free-air temperature

TLV2342I

†

PARAMETER

TEST CONDITIONS

V

= 3 V

DD

TYP

V

= 5 V

DD

TYP

UNIT

T

A

MIN

MAX

MIN

MAX

V

O

= 1 V,

V

IC

= 1 V,

25°C

0.6

9

1.1

9

R

= 50 Ω,

= 10 kΩ

V

IO

Input offset voltage

mV

S

L

Full range

11

Average temperature

coefficient of input offset

voltage

25°C to

85°C

α

2.7

µV/°C

VIO

25°C

85°C

25°C

85°C

0.1

22

0.1

24

Input offset current

(see Note 4)

I

V

= 1 V,

V

= 1 V

pA

IO

O

IC

1000

2000

1000

2000

0.6

175

0.6

200

Input bias current (see Note 4)

IB

O

IC

–0.2

to

–0.3

to

2.3

–0.2

to

4

–0.3

to

4.2

25°C

V

2

Common-mode input voltage

range (see Note 5)

V

ICR

–0.2

to

–0.2

to

Full range

1.8

3.8

V

= 1 V,

= 100 mV,

= –1 mA

25°C

Full range

25°C

1.75

1.7

1.9

120

11

3.2

3

3.7

90

23

80

IC

ID

V

A

High-level output voltage

Low-level output voltage

V

OH

I

OH

V

= 1 V,

= –100 mV,

= 1 mA

150

190

150

190

IC

ID

mV

V/mV

dB

OL

Full range

25°C

I

OL

V

R

= 1 V,

= 10 kΩ,

3

2

5

3.5

65

IC

Large-signal differential

voltage amplification

L

VD

Full range

25°C

See Note 6

V

R

= 1 V,

= V

65

60

78

O

IC

min,

ICR

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

Full range

60

= 50 Ω

S

25°C

Full range

25°C

70

65

95

70

65

95

V

R

= 1 V,

= 50 Ω

V

= 1 V,

IC

O

k

dB

SVR

(∆V

DD

/∆V

IO

)

S

0.65

3

4

1.4

3.2

4.4

V

O

= 1 V,

V

IC

I

Supply current

mA

DD

No load

Full range

†

Full range is –40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.

5. This range also applies to each input individually.

6. At V

= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.

DD O

DD

O

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2342I operating characteristics at specified free-air temperature, V

= 3 V

DD

TLV2342I

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

MAX

V

= 1 V,

= 20 pF,

V

R

= 1 V,

= 10 kΩ,

I(PP)

25°C

85°C

2.1

IC

L

C

R

C

SR

Slew rate at unity gain

V/µs

L

S

L

1.7

25

See Figure 34

f = 1 kHz,

See Figure 35

= 20 Ω,

V

n

Equivalent input noise voltage

Maximum output-swing bandwidth

Unity-gain bandwidth

25°C

nV/√Hz

25°C

85°C

25°C

85°C

–40°C

25°C

85°C

170

145

790

690

53°

49°

47°

V

R

= V

OH

= 10 kΩ,

,

= 20 pF,

O

B

kHz

OM

1

See Figure 34

C = 20 pF,

L

V = 10 mV,

I

B

kHz

R

= 10 kΩ,

See Figure 36

L

V = 10 mV,

f = B ,

R = 10 kΩ,

I

1

φ

m

Phase margin

C

= 20 pF,

L

See Figure 36

TLV2342I operating characteristics at specified free-air temperature, V

= 5 V

DD

TLV2342I

TYP

3.6

PARAMETER

TEST CONDITIONS

T

UNIT

A

MIN

MAX

25°C

85°C

25°C

85°C

V

R

C

= 1 V,

V

= 1 V

IC

L

I(PP)

2.8

= 10 kΩ,

SR

Slew rate at unity gain

V/µs

= 20 pF,

See Figure 34

2.9

V

= 2.5 V

2.3

f = 1 kHz,

See Figure 35

R

= 20 Ω,

S

V

n

Equivalent input noise voltage

Maximum output-swing bandwidth

Unity-gain bandwidth

25°C

25

nV/√Hz

25°C

85°C

25°C

85°C

–40°C

25°C

85°C

320

250

1.7

1.2

°

V

R

= V

OH

= 10 kΩ,

,

C

= 20 pF,

O

L

B

kHz

OM

1

See Figure 34

C = 20 pF,

L

V = 10 mV,

I

L

B

kHz

R

= 10 kΩ,

See Figure 36

V = 10 mV,

f = B ,

R = 10 kΩ,

I

L

1

φ

m

Phase margin

46°

43°

C

= 20 pF,

L

See Figure 36

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2344I electrical characteristics at specified free-air temperature

TLV2344I

TEST

CONDITIONS

†

PARAMETER

V

= 3 V

DD

TYP

V

= 5 V

DD

TYP

UNIT

T

A

MIN

MAX

MIN

MAX

V

R

= 1 V,

= 50 Ω,

= 10 kΩ

O

IC

S

L

25°C

1.1

10

1.1

10

V

IO

Input offset voltage

mV

Full range

12

R

Average temperature coefficient of

input offset voltage

25°C to

85°C

α

2.7

µV/°C

VIO

25°C

85°C

25°C

85°C

0.1

22

0.1

24

V

= 1 V,

= 1 V

O

IC

I

Input offset current (see Note 4)

Input bias current (see Note 4)

pA

IO

1000

2000

1000

2000

0.6

175

0.6

200

V

= 1 V,

= 1 V

O

IC

I

IB

pA

V

–0.2

to

–0.3

to

2.3

–0.2

to

4

–0.3

to

4.2

25°C

2

Common-mode input voltage range

(see Note 5)

V

ICR

–0.2

to

1.8

–0.2

to

3.8

Full range

V

= 1 V,

= 100 mV,

= –1 mA

25°C

Full range

25°C

1.75

1.7

1.9

120

11

3.2

3

3.7

90

23

80

95

2.7

IC

ID

V

A

High-level output voltage

Low-level output voltage

OH

I

OH

V

= 1 V,

= –100 mV,

= 1 mA

150

190

150

190

IC

ID

mV

V/mV

dB

OL

Full range

25°C

I

OL

V

R

= 1 V,

= 10 kΩ,

3

2

5

3.5

65

60

70

65

IC

Large-signal differential

voltage amplification

L

VD

Full range

25°C

See Note 6

V

R

= 1 V,

= V

65

60

70

65

78

O

IC

min,

ICR

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

Full range

25°C

= 50 Ω

S

V

R

= 1 V,

= 50 Ω

95

IC

O

k

dB

SVR

(∆V

DD

/∆V )

IO

Full range

25°C

S

V

= 1 V,

1.3

6

8

6.4

8.8

O

V

IC

I

Supply current

mA

DD

Full range

No load

†

Full range is –40°C to 85°C.

NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.

5. This range also applies to each input individually.

6. At V

= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.

DD O

DD

O

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2344I operating characteristics at specified free-air temperature, V

= 3 V

DD

TLV2344I

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

MAX

V

R

= 1 V,

= 10 kΩ,

V

= 1 V,

= 20 pF,

IC

L

I(PP)

25°C

85°C

2.1

C

R

C

SR

Slew rate at unity gain

V/µs

L

S

L

1.7

25

See Figure 34

f = 1 kHz,

See Figure 35

= 20 Ω,

V

n

Equivalent input noise voltage

Maximum output-swing bandwidth

Unity-gain bandwidth

25°C

nV/√Hz

25°C

85°C

25°C

85°C

–40°C

25°C

85°C

170

145

790

690

53°

49°

47°

V

R

= V

OH

= 10 kΩ,

,

= 20 pF,

O

B

kHz

OM

1

See Figure 34

C = 20 pF,

L

V = 10 mV,

I

B

kHz

R

= 10 kΩ,

See Figure 36

L

V = 10 mV,

f = B ,

R = 10 kΩ,

I

1

C

= 20 pF,

φ

m

Phase margin

L

See Figure 36

TLV2344I operating characteristics at specified free-air temperature, V

= 5 V

DD

TLV2344I

TYP

3.6

PARAMETER

TEST CONDITIONS

T

UNIT

A

MIN

MAX

25°C

85°C

25°C

85°C

V

R

C

= 1 V,

IC

L

V

= 1 V

I(PP)

2.8

= 10 kΩ,

SR

Slew rate at unity gain

V/µs

= 20 pF,

See Figure 34

2.9

V

= 2.5 V

2.3

f = 1 kHz,

See Figure 35

R

= 20 Ω,

S

V

n

Equivalent input noise voltage

Maximum output-swing bandwidth

Unity-gain bandwidth

25°C

25

nV/√Hz

25°C

85°C

25°C

85°C

–40°C

25°C

85°C

320

250

1.7

1.2

°

V

R

= V

OH

= 10 kΩ,

,

C

= 20 pF,

O

L

B

kHz

OM

1

See Figure 34

C = 20 pF,

L

V = 10 mV,

I

L

B

MHz

R

= 10 kΩ,

See Figure 36

V = 10 mV,

f = B ,

R = 10 kΩ,

I

L

1

C

= 20 pF,

φ

m

Phase margin

46°

43°

L

See Figure 36

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2342Y electrical characteristics, T = 25°C

A

TLV2342Y

V

= 3 V

DD

TYP

V

= 5 V

DD

TYP

PARAMETER

TEST CONDITIONS

UNIT

MIN

MAX

MIN

MAX

V

= 1 V,

= 50 Ω,

V

R

= 1 V,

= 10 kΩ

O

IC

L

V

Input offset voltage

0.6

1.1

mV

IO

R

S

O

I

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 1 V,

V

= 1 V

0.1

0.6

0.1

0.6

pA

IO

IC

IB

IC

–0.3

to

2.3

–0.3

to

4.2

Common-mode input voltage

range (see Note 5)

V

ICR

V

= 1 V,

= –1 mA

V

= 100 mV,

= 10 kΩ,

IC

ID

V

High-level output voltage

Low-level output voltage

1.9

120

11

3.7

90

23

80

95

1.4

V

mV

V/mV

dB

OH

I

OH

V

= 1 V

= 1 mA

IC

ID

OL

I

OL

Large-signal differential voltage

amplification

V

IC

= 1 V,

R

L

A

VD

See Note 6

V

R

= 1 V,

= 50 Ω

V

IC

V

IC

V

IC

= V

min,

ICR

O

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

78

S

V

R

= 1 V

= 50 Ω

= 1 V,

O

k

95

dB

SVR

(∆V

DD

/∆V

ID

)

S

V

O

= 1 V,

I

Supply current

0.65

mA

DD

No load

NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.

5. This range also applies to each input individually.

6. At V

= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.

DD O

DD

O

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TLV2344Y electrical characteristics, T = 25°C

A

TLV2344Y

V

= 3 V

DD

TYP

V

= 5 V

DD

TYP

PARAMETER

TEST CONDITIONS

UNIT

MIN

MAX

MIN

MAX

V

R

= 1 V,

= 10 kΩ

V

R

= 1 V,

= 10 kΩ

O

L

IC

L

V

IO

Input offset voltage

1.1

mV

I

Input offset current (see Note 4)

Input bias current (see Note 4)

V

= 1 V,

V

= 1 V

0.1

0.6

0.1

0.6

pA

IO

O

IC

IB

O

IC

–0.3

to

2.3

–0.3

to

4.2

Common-mode input voltage

range (see Note 5)

V

ICR

V

= 1 V,

= –1 mA

IC

V

High-level output voltage

Low-level output voltage

V

= 100 mV,

1.9

120

11

3.7

90

23

80

95

2.7

V

mV

V/mV

dB

OH

ID

I

OH

V

= 1 V,

= 1 mA

IC

= –100 mV,

OL

ID

I

OL

Large-signal differential voltage

amplification

V

IC

= 1 V,

R

= 10 kΩ,

L

A

VD

See Note 6

V

R

= 1 V,

= 50 Ω

V

IC

V

IC

V

IC

= V

min,

ICR

O

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

78

S

V

R

= 1 V,

= 50 Ω

= 1 V,

O

k

95

dB

SVR

(∆V

DD

/∆V

ID

)

S

V

O

= 1 V,

I

Supply current

1.3

µA

DD

No load

NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.

5. This range also applies to each input individually.

6. At V

= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.

DD O

DD

O

11

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TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

V

Input offset voltage

Distribution

1 – 4

5 – 8

9

IO

α

Input offset voltage temperature coefficient

Input bias current

Distribution

VIO

I

IB

I

IO

vs Free-air temperature

vs Supply voltage

Input offset current

9

V

IC

Common-mode input voltage

10

vs High-level output current

vs Supply voltage

vs Free-air temperature

11

12

13

V

High-level output voltage

Low-level output voltage

OH

vs Common-mode input voltage

vs Free-air temperature

vs Differential input voltage

vs Low-level output current

14

15, 16

17

V

OL

18

vs Supply voltage

vs Free-air temperature

vs Frequency

19

20, 21

22, 23

A

Large-signal differential voltage amplification

Supply current

VD

vs Supply voltage

vs Free-air temperature

24

25

I

DD

vs Supply voltage

vs Free-air temperature

26

27

SR

Slew rate

V

Maximum peak-to-peak output voltage

Unity-gain bandwidth

vs Frequency

28

O(PP)

1

vs Supply voltage

vs Free-air temperature

29

30

B

vs Supply voltage

vs Free-air temperature

vs Load capacitance

31

32

33

φ

m

Phase margin

Phase shift

vs Frequency

22, 23

34

V

n

Equivalent input noise voltage

12

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLV2342

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2342

INPUT OFFSET VOLTAGE

50

60

50

V

= 3 V

DD

= 25°C

V

= 5 V

DD

= 25°C

T

A

T

A

P Package

40

30

40

30

20

10

0

10

0

–5 –4 –3 –2

–1

0

1

2

3

4

5

–5 –4 –3 –2

–1

0

1

2

3

4

5

V

IO

– Input Offset Voltage – mV

V

IO

– Input Offset Voltage – mV

Figure 1

Figure 2

DISTRIBUTION OF TLV2344

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2344

INPUT OFFSET VOLTAGE

60

50

V

T

= 5 V

V

T

= 3 V

DD

= 25°C

DD

= 25°C

A

N Package

40

30

40

30

20

10

0

10

0

–5 –4 –3 –2

–1

0

1

2

3

4

5

–1

0

1

2

3

4

5

V

IO

– Input Offset Voltage – mV

V

IO

– Input Offset Voltage – mV

Figure 3

Figure 4

13

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLV2342

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2342

INPUT OFFSET VOLTAGE

TEMPERATURE COEFFICIENT

50

60

50

V

T

= 5 V

V

T

= 3 V

DD

= 25°C to 85°C

DD

= 25°C to 85°C

A

P Package

Outliers:

(1) 20.5 mV/°C

P Package

40

30

40

30

20

10

0

20

10

0

–8 –6 –4 –2

–10

0

2

4

6

8

10

–10 –8 –6 –4 –2

0

2

4

6

8

10

α

– Temperature Coefficient – µV/°C

α

– Temperature Coefficient – µV/°C

VIO

Figure 5

Figure 6

DISTRIBUTION OF TLV2344

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2344

INPUT OFFSET VOLTAGE

TEMPERATURE COEFFICIENT

50

60

50

V

T

= 3 V

V

T

= 5 V

DD

= 25°C to 85°C

DD

= 25°C to 85°C

A

N Package

Outliers:

(1) 20.5 mV/°C

40

30

40

30

20

10

0

20

10

0

–10 –8 –6 –4 –2

0

2

4

6

8

10

–10 –8 –6 –4 –2

0

2

4

6

8

10

α

– Temperature Coefficient – µV/°C

α

– Temperature Coefficient – µV/°C

VIO

Figure 7

Figure 8

14

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

COMMON-MODE INPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

8

6

4

3

2

10

T

A

= 25°C

V

= 3 V

DD

= 1 V

See Note A

Positive Limit

IC

I

IB

1

10

I

IO

2

0

0.1

25

45

65

85

105

125

0

2

4

6

8

T

A

– Free-Air Temperature – °C

V

DD

– Supply Voltage – V

NOTE: The typical values of input bias current and input offset

current below 5 pA were determined mathematically.

Figure 9

Figure 10

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

vs

SUPPLY VOLTAGE

8

6

4

5

V

R

= 1 V

= 100 mV

= 10 kΩ

= 25°C

IC

ID

L

V

T

A

= 1 V

= 100 mV

= 25°C

IC

ID

T

A

4

3

2

1

0

V

= 5 V

DD

V

= 3 V

DD

2

0

2

4

6

8

0

–2

–4

–6

–8

V

DD

– Supply Voltage – V

I

– High-Level Output Current – mA

OH

Figure 11

Figure 12

15

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TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

FREE-AIR TEMPERATURE

3

2.4

1.8

1.2

0.6

0

700

650

600

550

V

= 3 V

= 1 V

= 100 mV

DD

IC

ID

V

= 5 V

= 5 mA

= 25°C

DD

I

T

OL

A

V

= –100 mV

ID

500

450

I

= –500µA

= –1 mA

= –2 mA

= –3 mA

= –4 mA

OH

400

350

V

= –1 V

ID

300

–75 –50 –25

0

25

50

75 100 125

0

0.5

V

1

1.5

2

2.5

3

3.5

4

T

A

– Free-Air Temperature – °C

– Common-Mode Input Voltage – V

IC

Figure 13

Figure 14

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

900

200

175

V

I

= 5 V

V

I

= 3 V

= 1 V

= –100 mV

= 1 mA

DD

IC

ID

DD

IC

ID

= 0.5 V

= –1 V

= 5 mA

800

700

600

500

OL

150

125

400

300

100

75

200

100

0

50

–75 –50 –25

0

25

50

75 100 125

–75 –50 –25

0

25

50

75 100 125

T

A

– Free-Air Temperature – °C

T

A

– Free-Air Temperature – °C

Figure 15

Figure 16

16

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TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE

vs

DIFFERENTIAL INPUT VOLTAGE

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

800

700

600

500

V

T

= 1 V

= –100 mV

= 25°C

V

I

= 5 V

= |V / 2|

ID

= 5 mA

IC

ID

A

DD

IC

OL

T

A

= 25°C

V

DD

= 5 V

400

300

V

DD

= 3 V

200

100

0.2

0.1

0

1

2

3

4

5

6

7

8

0

–1

V

–2

–3

–4

–5

–6

–7

–8

I

– Low-Level Output Current – mA

OL

– Differential Input Voltage – V

ID

Figure 17

Figure 18

TLV2342

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

50

60

R

= 10 kΩ

L

45

R

= 10 kΩ

L

50

40

30

20

10

0

40

35

T

A

= –40°C

30

V

= 5 V

DD

25

20

15

10

5

V

= 3 V

DD

T

= 25°C

A

T

= 85°C

A

0

–75 –50 –25

0

25

50

75 100 125

0

2

4

6

8

T

A

– Free-Air Temperature – °C

V

DD

– Supply Voltage – V

Figure 19

Figure 20

17

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

TLV2344

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

FREE-AIR TEMPERATURE

2000

1800

1600

1400

1200

1000

800

R

= 1 MΩ

L

V

DD

= 5 V

600

V

DD

= 3 V

400

200

0

–75 –50 –25

0

25

50

75 100 125

T

A

– Free-Air Temperature – °C

Figure 21

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

7

10

6

10

5

10

4

10

3

10

2

10

1

10

–60°

–30°

0°

V

R

C

= 3 V

= 1 MΩ

= 20 pF

= 25°C

DD

L

T

A

30°

60°

A

VD

90°

Phase Shift

120°

1

150°

180°

0.1

10

100

1 k

10 k

100 k

1 M

10 M

f – Frequency – Hz

Figure 22

18

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

7

10

6

10

5

10

4

10

3

10

2

10

1

10

–60°

–30°

0°

V

R

C

= 5 V

= 1 MΩ

= 20 pF

= 25°C

DD

L

T

A

30°

60°

A

VD

90°

Phase Shift

120°

1

150°

180°

0.1

10

100

1 k

10 k

100 k

1 M

10 M

f – Frequency – Hz

Figure 23

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

5

V

= 1 V

IC

O

No Load

4

3

T

A

= –40°C

T

A

= 25°C

2

1

0

T

A

= 85°C

0

2

4

6

8

V

DD

– Supply Voltage – V

Figure 24

19

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

SUPPLY CURRENT

vs

FREE-AIR TEMPERATURE

SLEW RATE

vs

SUPPLY VOLTAGE

4

3.5

3

8

7

6

5

4

3

2

V

= 1 V

V

= 1 V

I(PP)

= 1

IC

A

V

O

V

R

C

= 10 kΩ

= 20 pF

= 25°C

No Load

L

T

A

V

= 5 V

2.5

DD

2

1.5

V

= 3 V

DD

1

0.5

1

0

2

4

6

8

–75 –50 –25

0

25

50

75 100 125

T

A

– Free-Air Temperature – °C

V

DD

– Supply Voltage – V

Figure 25

Figure 26

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

SLEW RATE

vs

FREE-AIR TEMPERATURE

vs

FREQUENCY

8

7

6

5

4

3

2

5

4

3

V

= 1 V

R

= 10 kΩ

I(PP)

= 1

L

A

V

R

C

= 10 kΩ

= 20 pF

L

V

= 5 V

DD

V

= 5 V

DD

V

= 3 V

DD

2

1

0

T

= –40°C

A

T

= 25°C

A

V

DD

= 3 V

T

A

= 85°C

1

0

–75 –50 –25

0

25

50

75 100 125

10

100

1000

10000

f – Frequency – kHz

T

A

– Free-Air Temperature – °C

Figure 27

Figure 28

20

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

UNITY-GAIN BANDWIDTH

vs

UNITY-GAIN BANDWIDTH

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

2.1

1.9

1.7

1.5

1.3

1.1

0.9

0.7

0.5

0.3

0.1

3.5

V = 10 mV

V = 3 mV

I

R

= 10 kΩ

R

C

T

A

= 10 kΩ

= 20 pF

= 25°C

L

C

= 20 pF

2.9

2.3

V

= 5 V

DD

1.7

1.1

0.5

V

DD

= 3 V

0

1

2

3

4

5

6

7

8

–75 –50 –25

0

25

50

75 100 125

V

DD

– Supply Voltage – V

T

A

– Free-Air Temperature – °C

Figure 29

Figure 30

PHASE MARGIN

vs

PHASE MARGIN

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

53°

60°

58°

V = 10 mV

I

R

C

T

= 10 kΩ

= 20 pF

= 25°C

R

= 10 kΩ

L

C

= 20 pF

56°

A

51°

49°

47°

45°

54°

52°

V

= 3 V

DD

50°

48°

46°

44°

V

DD

= 5 V

42°

40°

0

2

4

6

8

–75 –50 –25

0

25

50

75 100 125

T

A

– Free-Air Temperature – °C

V

DD

– Supply Voltage – V

Figure 31

Figure 32

21

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL CHARACTERISTICS

PHASE MARGIN

vs

LOAD CAPACITANCE

EQUIVALENT INPUT NOISE VOLTAGE

vs

FREQUENCY

50°

45°

400

350

R

T

= 20 Ω

= 25°C

S

A

V

= 3 V

= 5 V

DD

300

250

200

150

40°

35°

DD

V

DD

= 5 V

100

50

30°

25°

V = 10 mV

V

DD

= 3 V

10

I

R

T

A

= 10 kΩ

= 25°C

L

0

1

0

10 20 30 40 50 60 70 80 90 100

100

1000

C

– Load Capacitance – pF

L

f – Frequency – Hz

Figure 33

Figure 34

22

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LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

PARAMETER MEASUREMENT INFORMATION

single-supply versus split-supply test circuits

Because the TLV234x is optimized for single-supply operation, circuit configurations used for the various tests

often present some inconvenience since the input signal, in many cases, must be offset from ground. This

inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative

rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives

the same result.

V

DD

V

DD+

–

+

–

+

V

O

V

O

V

I

V

I

C

R

L

C

L

R

L

V

DD–

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 35. Unity-Gain Amplifier

2 kΩ

V

DD

V

DD+

20 Ω

–

+

–

+

1/2 V

V

O

DD

V

O

20 Ω

V

DD–

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 36. Noise-Test Circuit

10 kΩ

V

DD+

V

DD

100 Ω

V

I

V

–

+

–

+

I

V

O

1/2 V

DD

C

L

V

DD–

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 37. Gain-of-100 Inverting Amplifier

23

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

PARAMETER MEASUREMENT INFORMATION

input bias current

Because of the high input impedance of the TLV234x operational amplifier, attempts to measure the input bias

current can result in erroneous readings. The bias current at normal ambient temperature is typically less than

1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid

erroneous measurements:

•

Isolate the device from other potential leakage sources. Use a grounded shield around and between the

device inputs (see Figure 38). Leakages that would otherwise flow to the inputs are shunted away.

Compensate for the leakage of the test socket by actually performing an input bias current test (using a

picoammeter) with no device in the test socket. The actual input bias current can then be calculated by

subtracting the open-socket leakage readings from the readings obtained with a device in the test

socket.

Many automatic testers as well as some bench-top operational amplifier testers use the servo-loop

technique with a resistor in series with the device input to measure the input bias current (the voltage

drop across the series resistor is measured and the bias current is calculated). This method requires

thatadevicebeinsertedintoatestsockettoobtainacorrectreading;therefore, anopen-socketreading

is not feasible using this method.

7

1

V = V

IC

14

8

Figure 38. Isolation Metal Around Device Inputs

(N or P package )

low-level output voltage

To obtain low-level supply-voltage operation, some compromise is necessary in the input stage. This

compromise results in the device low-level output voltage being dependent on both the common-mode input

voltage level as well as the differential input voltage level. When attempting to correlate low-level output

readings with those quoted in the electrical specifications, these two conditions should be observed. If

conditions other than these are to be used, please refer to the Typical Characteristics section of this data sheet.

input offset voltage temperature coefficient

Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This

parameter is actually a calculation using input offset voltage measurements obtained at two different

temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device

and the test socket. This moisture results in leakage and contact resistance which can cause erroneous input

offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the

moisture also covers the isolation metal itself, thereby rendering it useless. These measurements should be

performed at temperatures above freezing to minimize error.

full-power response

Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage

swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is

24

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

PARAMETER MEASUREMENT INFORMATION

generallymeasuredbymonitoringthedistortionleveloftheoutputwhileincreasingthefrequencyofasinusoidal

input signal until the maximum frequency is found above which the output contains significant distortion. The

full-peak response is defined as the maximum output frequency, without regard to distortion, above which full

peak-to-peak output swing cannot be maintained.

Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified

in this data sheet and is measured using the circuit of Figure 35. The initial setup involves the use of a sinusoidal

input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is

increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same

amplitude. Thefrequencyisthenincreaseduntilthemaximumpeak-to-peakoutputcannolongerbemaintained

(Figure 39). A square wave is used to allow a more accurate determination of the point at which the maximum

peak-to-peak output is reached.

(a) f = 100 Hz

(b) B

OM

> f > 100 Hz

(c) f = B

OM

(d) f > B

OM

Figure 39. Full-Power-Response Output Signal

test time

Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,

short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET

devices, and require longer test times than their bipolar and BiFET counterparts. The problem becomes more

pronounced with reduced supply levels and lower temperatures.

APPLICATION INFORMATION

single-supply operation

While the TLV234x performs well using dual-

power supplies (also called balanced or split

supplies), the design is optimized for single-

supply operation. This includes an input common-

mode voltage range that encompasses ground as

well as an output voltage range that pulls down to

ground. The supply voltage range extends down

to 2 V, thus allowing operation with supply levels

commonly available for TTL and HCMOS.

V

DD

R2

R1

V

I

–

+

V

O

TLE2426

V

– V

V

Many single-supply applications require that a

voltage be applied to one input to establish a

reference level that is above ground. This virtual

ground can be generated using two large

resistors, but a preferred technique is to use a

virtual-ground generator such as the TLE2426

(see Figure 40).

DD

I

R2

R1

DD

2

V

O

2

Figure 40. Inverting Amplifier With

Voltage Reference

25

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

APPLICATION INFORMATION

single-supply operation (continued)

The TLE2426 supplies an accurate voltage equal to V /2 while consuming very little power and is suitable for

DD

supply voltages of greater than 4 V.

The TLV234xworks well in conjunction with digital logic; however, when powering both linear devices and digital

logic from the same power supply, the following precautions are recommended:

•

Power the linear devices from separate bypassed supply lines (see Figure 41); otherwise, the linear

device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital

logic.

•

Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive

decoupling is often adequate; however, RC decoupling may be necessary in high-frequency

applications.

–

Power

Supply

Logic

+

(a) COMMON-SUPPLY RAILS

–

+

Power

Supply

Logic

(b) SEPARATE-BYPASSED SUPPLY RAILS (preferred)

Figure 41. Common Versus Separate Supply Rails

input characteristics

The TLV234x is specified with a minimum and a maximum input voltage that, if exceeded at either input, could

cause the device to malfunction. Exceeding this specified range is a common problem, especially in

single-supply operation. The lower range limit includes the negative rail, while the upper range limit is specified

at V

– 1 V at T = 25°C and at V

– 1.2 V at all other temperatures.

DD

A

DD

The use of the polysilicon-gate process and the careful input circuit design gives the TLV234x very good input

offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS

devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant

implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the

polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset

voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of operation.

Because of the extremely high input impedance and resulting low bias-current requirements, the TLV234x is

well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can

easily exceed bias-current requirements and cause a degradation in device performance.

26

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

APPLICATION INFORMATION

input characteristics (continued)

It is good practice to include guard rings around inputs (similar to those of Figure 38 in the Parameter

Measurement Information section). These guards should be driven from a low-impedance source at the same

voltage level as the common-mode input (see Figure 42).

The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.

V

I

–

+

–

+

–

+

V

O

V

O

V

O

V

i

V

I

(c) UNITY-GAIN AMPLIFIER

(a) NONINVERTING AMPLIFIER

(b) INVERTING AMPLIFIER

Figure 42. Guard-Ring Schemes

noise performance

The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage

differential amplifier. The low input bias-current requirements of the TLV234x results in a very low noise current,

which is insignificant in most applications. This feature makes the device especially favorable over bipolar

devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit greater noise

currents.

feedback

Operational amplifiers circuits nearly always

employ feedback, and since feedback is the first

prerequisite for oscillation, a little caution is

appropriate. Most oscillation problems result from

driving capacitive loads and ignoring stray input

capacitance. A small-value capacitor connected

in parallel with the feedback resistor is an effective

remedy (see Figure 43). The value of this

capacitor is optimized empirically.

–

+

Figure 43. Compensation for Input Capacitance

electrostatic-discharge protection

The TLV234x incorporates an internal electrostatic-discharge (ESD)-protection circuit that prevents functional

failures at voltages up to 2000 V as tested under MIL-PRF-38535. Method 3015.2. Care should be exercised,

however, when handling these devices as exposure to ESD may result in the degradation of the device

parametric performance. The protection circuit also causes the input bias currents to be temperature dependent

and have the characteristics of a reverse-biased diode.

27

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

APPLICATION INFORMATION

latch-up

BecauseCMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLV234xinputs

and outputs are designed to withstand –100-mA surge currents without sustaining latch-up; however,

techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes

should not by design be forward biased. Applied input and output voltage should not exceed the supply voltage

by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply

transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails

as close to the device as possible.

The current path established if latch-up occurs is usually between the positive supply rail and ground and can

be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply

voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the

forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of

latch-up occurring increases with increasing temperature and supply voltages.

V

DD

output characteristics

The output stage of the TLV234x is designed to

sink and source relatively high amounts of current

(see Typical Characteristics). If the output is

subjected to a short-circuit condition, this

high-current capability can cause device damage

undercertainconditions. Outputcurrentcapability

increases with supply voltage.

R

P

V

F

V

I

P

DD

O

I

V

I

–

+

R

P

I

L

P

V

O

I

P

= Pullup Current

Required by the

Operational Amplifier

(typically 500 µA)

F

R2

R1

I

L

R

L

Although the TLV234x possesses excellent

high-level output voltage and current capability,

methods are available for boosting this capability

if needed. The simplest method involves the use

Figure 44. Resistive Pullup to Increase V

OH

of a pullup resistor (R )connectedfromtheoutput

P

to the positive supply rail (see Figure 44). There

are two disadvantages to the use of this circuit.

First, the NMOS pulldown transistor N4 (see

equivalent schematic) must sink a comparatively

largeamountofcurrent. Inthiscircuit, N4behaves

likealinearresistorwithanonresistancebetween

approximately 60 Ω and 180 Ω, depending on

how hard the operational amplifier input is driven.

2.5 V

–

V

O

+

V

i

C

L

With very low values of R , a voltage offset from

0 V at the output occurs. Secondly, pullup resistor

P

T

= 25°C

A

f = 1 kHz

= 1 V

R acts as a drain load to N4 and the gain of the

V

P

I(PP)

–2.5 V

operational amplifier is reduced at output voltage

levels where N5 is not supplying the output

current.

Figure 45. Test Circuit for Output Characteristics

All operating characteristics of the TLV234x are measured using a 20-pF load. The device drives higher

capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower

frequencies thereby causing ringing, peaking, or even oscillation (see Figure 45 and Figure 46). In many cases,

adding some compensation in the form of a series resistor in the feedback loop alleviates the problem.

28

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

TYPICAL APPLICATION DATA

output characteristics (continued)

(a) C = 20 pF, R = NO LOAD

(b) C = 130 pF, R = NO LOAD

(c) C = 150 pF, R = NO LOAD

L L

L

Figure 46. Effect of Capacitive Loads

29

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

MECHANICAL INFORMATION

D (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

PINS **

0.050 (1,27)

8

14

16

DIM

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.197

(5,00)

0.344

(8,75)

0.394

(10,00)

M

A MAX

14

8

0.189

(4,80)

0.337

(8,55)

0.386

(9,80)

A MIN

0.244 (6,20)

0.228 (5,80)

0.008 (0,20) NOM

0.157 (4,00)

0.150 (3,81)

Gage Plane

1

7

A

0.010 (0,25)

0°–8°

0.044 (1,12)

0.016 (0,40)

Seating Plane

0.004 (0,10)

0.010 (0,25)

0.004 (0,10)

0.069 (1,75) MAX

4040047/B 03/95

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).

D. Four center pins are connected to die mount pad.

E. Falls within JEDEC MS-012

30

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

MECHANICAL INFORMATION

N (R-PDIP-T**)

PLASTIC DUAL-IN-LINE PACKAGE

16 PIN SHOWN

PINS **

14

16

18

20

DIM

0.775

(19,69)

0.775

(19,69)

0.920

(23.37)

0.975

(24,77)

A MAX

A

16

9

0.745

(18,92)

0.745

(18,92)

0.850

(21.59)

0.940

(23,88)

A MIN

0.260 (6,60)

0.240 (6,10)

1

8

0.070 (1,78) MAX

0.020 (0,51) MIN

0.310 (7,87)

0.290 (7,37)

0.035 (0,89) MAX

0.200 (5,08) MAX

Seating Plane

0.125 (3,18) MIN

0.100 (2,54)

0°–15°

0.021 (0,53)

0.015 (0,38)

0.010 (0,25)

M

0.010 (0,25) NOM

14/18 PIN ONLY

4040049/C 08/95

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)

31

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

MECHANICAL INFORMATION

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.310 (7,87)

0.290 (7,37)

0.020 (0,51) MIN

0.200 (5,08) MAX

Seating Plane

0.125 (3,18) MIN

0.100 (2,54)

0°–15°

0.021 (0,53)

0.015 (0,38)

0.010 (0,25)

M

0.010 (0,25) NOM

4040082/B 03/95

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

32

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2342, TLV2342Y, TLV2344, TLV2344Y

LinCMOS LOW-VOLTAGE HIGH-SPEED

OPERATIONAL AMPLIFIERS

SLOS194 – FEBRUARY 1997

MECHANICAL INFORMATION

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0,32

0,19

0,65

M

0,13

14

8

0,15 NOM

4,50

4,30

6,70

6,10

Gage Plane

0,25

1

7

0°–8°

0,75

A

0,50

Seating Plane

0,10

1,20 MAX

0,10 MIN

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

A MAX

A MIN

4040064/D 10/95

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

33

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

型号:	TLV2344ID
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	ROCHESTER ELECTRONICS LLC
零件包装代码：	SOIC
包装说明：	PLASTIC, SO-14
针数：	14
Reach Compliance Code：	unknown
风险等级：	5.62
Is Samacsys：	N
放大器类型：	OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)：	0.002 µA
标称共模抑制比：	60 dB
最大输入失调电压：	12000 µV
JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e4
长度：	8.65 mm
湿度敏感等级：	1
功能数量：	4
端子数量：	14
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
座面最大高度：	1.75 mm
标称压摆率：	2.9 V/us
子类别：	Operational Amplifier
供电电压上限：	8 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	NICKEL PALLADIUM GOLD
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
标称均一增益带宽：	1700 kHz
宽度：	3.9 mm
Base Number Matches：	1

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