TNY277PN各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号TNY277PN的概述

芯片TNY277PN的概述 TNY277PN是一款高效率、紧凑型的功率转换器芯片，广泛应用于开关电源（SMPS）设计，尤其在低功耗设备中表现出色。该芯片由NXP Semiconductors制造，其特点在于集成度高，易于设计，极大地缩短了开发周期。TNY277PN采用了变压器反馈控制，支持多种工作模式，提供了优秀的负载调节能力。它常用于适配器、电视、LED驱动电源以及其他消费类电子产品。芯片TNY277PN的详细参数 TNY277PN的详细参数涵盖了输入电压范围、输出功率、工作频率等多个方面，具体如下： - 输入电压范围：85V至265V AC - 输出功率：最大可达5W，适合低功率应用 - 输出电压：适用于多种输出电压设计，用户可根据需要调整 - 工作频率：典型工作频率约为132kHz - 开关电流：最大开关电流可达30mA - 效率：在高负载条件下，效率可达到75%以上，具有优良...

产品型号TNY277PN的Datasheet PDF文件预览

TNY274-280

TinySwitch-III Family

Energy Efﬁcient, Off-Line Switcher with

Enhanced Flexibility and Extended Power Range

Product Highlights

Lowest System Cost with Enhanced Flexibility

Output

•

Simple ON/OFF control, no loop compensation needed

Selectable current limit through BP/M capacitor value

Wide-Range

HV DC Input

Higher current limit extends peak power or, in open

frame applications, maximum continuous power

Lower current limit improves efﬁciency in enclosed

adapters/chargers

Allows optimum TinySwitch-III choice by swapping

devices with no other circuit redesign

EN/UV

BP/M

TinySwitch-III

PI-4095-082205

•

Tight I²f parameter tolerance reduces system cost

Figure 1. Typical Standby Application.

Maximizes MOSFET and magnetics power delivery

Minimizes max overload power, reducing cost of

transformer, primary clamp & secondary components

OUTPUT POWER TABLE

ON-time extension – extends low line regulation range/

hold-up time to reduce input bulk capacitance

Self-biased: no bias winding or bias components

Frequency jittering reduces EMI ﬁlter costs

Pin-out simpliﬁes heatsinking to the PCB

230 VAC ±15%

85-265 VAC

Peak or

PRODUCT³

•

Adapter¹Open Adapter¹Open

Frame²

8.5 W

11.5 W

15 W

TNY274 P or G 6 W

TNY275 P or G 8.5 W

TNY276 P or G 10 W

TNY277 P or G 13 W

TNY278 P or G 16 W

TNY279 P or G 18 W

TNY280 P or G 20 W

11 W

5 W

6 W

SOURCE pins are electrically quiet for low EMI

15 W

Enhanced Safety and Reliability Features

19 W

7 W

•

Accurate hysteretic thermal shutdown protection with

automatic recovery eliminates need for manual reset

Improved auto-restart delivers <3% of maximum power

in short circuit and open loop fault conditions

Output overvoltage shutdown with optional Zener

Line under-voltage detect threshold set using a single

optional resistor

23.5 W

28 W

8 W

18 W

10 W

12 W

14 W

21.5 W

25 W

•

32 W

•

36.5 W

28.5 W

Table 1. Notes: 1. Minimum continuous power in a typical non-

ventilated enclosed adapter measured at 50 °C ambient. Use of an

external heatsink will increase power capability 2. Minimum peak

power capability in any design or minimum continuous power in an

open frame design (see KeyApplication Considerations). 3. Packages:

P: DIP-8C, G: SMD-8C. See Part Ordering Information.

•

Very low component count enhances reliability and

enables single-sided printed circuit board layout

High bandwidth provides fast turn on with no overshoot

and excellent transient load response

Extended creepage between DRAIN and all other pins

improves ﬁeld reliability

EcoSmart^®– Extremely Energy Efﬁcient

•

PC Standby and other auxiliary supplies

DVD/PVR and other low power set top decoders

Supplies for appliances, industrial systems, metering, etc.

•

Easily meets all global energy efﬁciency regulations

No-load <150 mW at 265 VAC without bias winding,

<50 mW with bias winding

•

ON/OFF control provides constant efﬁciency down to

very light loads – ideal for mandatory CEC regulations

and 1 W PC standby requirements

Description

TinySwitch-IIIincorporatesa700VpowerMOSFET,oscillator,

high voltage switched current source, current limit (user

selectable) and thermal shutdown circuitry. The IC family uses

anON/OFFcontrolschemeandoffersadesignﬂexiblesolution

with a low system cost and extended power capability.

Applications

•

Chargers/adapters for cell/cordless phones, PDAs, digital

cameras, MP3/portable audio, shavers, etc.

February 2006

TNY274-280

BYPASS/

MULTI-FUNCTION

(BP/M)

DRAIN

(D)

REGULATOR

5.85 V

LINE UNDER-VOLTAGE

115 µA

25 µA

FAULT

PRESENT

BYPASS PIN

UNDER-VOLTAGE

AUTO-

RESTART

COUNTER

5.85 V

4.9 V

V_ILIMIT

CURRENT

LIMIT STATE

MACHINE

RESET

6.4 V

CURRENT LIMIT

COMPARATOR

ENABLE

1.0 V + V_T

1.0 V

JITTER

CLOCK

MAX

THERMAL

SHUTDOWN

OSCILLATOR

ENABLE/

UNDER-

VOLTAGE

(EN/UV)

LEADING

EDGE

BLANKING

SOURCE

(S)

PI-4077-013106

Figure 2. Functional Block Diagram.

Pin Functional Description

P Package (DIP-8C)

G Package (SMD-8C)

DRAIN (D) Pin:

This pin is the power MOSFET drain connection. It provides

internal operating current for both start-up and steady-state

operation.

EN/UV

BP/M

BYPASS/MULTI-FUNCTION (BP/M) Pin:

This pin has multiple functions:

1. It is the connection point for an external bypass capacitor

for the internally generated 5.85 V supply.

2. It is a mode selector for the current limit value, depending

on the value of the capacitance added. Use of a 0.1 µF

capacitor results in the standard current limit value. Use of

a 1 µF capacitor results in the current limit being reduced to

that of the next smaller device size. Use of a 10 µF capacitor

results in the current limit being increased to that of the next

larger device size for TNY275-280.

PI-4078-080905

Figure 3. Pin Conﬁguration.

witha Zenerconnectedfrom the BP/Mpintoa bias winding

supply.

3. It provides a shutdown function. When the current into the

bypass pin exceeds 5.5 mA, the device latches off until the

BP/M voltage drops below 4.9 V, during a power down.

This can be used to provide an output overvoltage function

ENABLE/UNDER-VOLTAGE (EN/UV) Pin:

Thispinhasdualfunctions:enableinputandlineunder-voltage

sense. During normal operation, switching of the power

2/06

TNY274-280

MOSFET is controlled by this pin. MOSFET switching is

terminated when a current greater than a threshold current is

drawn from this pin. Switching resumes when the current being

pulled from the pin drops to less than a threshold current. A

modulation of the threshold current reduces group pulsing. The

threshold current is between 60 µA and 115 µA.

maximum duty cycle signal (DC_MAX) and the clock signal that

indicates the beginning of each cycle.

The oscillator incorporates circuitry that introduces a small

amount of frequency jitter, typically 8 kHz peak-to-peak, to

minimize EMI emission. The modulation rate of the frequency

jitter is set to 1 kHz to optimize EMI reduction for both average

and quasi-peak emissions. The frequency jitter should be

measured with the oscilloscope triggered at the falling edge of

the DRAIN waveform. The waveform in Figure 4 illustrates

the frequency jitter.

TheEN/UVpinalsosenseslineunder-voltageconditionsthrough

an external resistor connected to the DC line voltage. If there is

noexternalresistorconnectedtothispin, TinySwitch-IIIdetects

its absence and disables the line under-voltage function.

SOURCE (S) Pin:

Enable Input and Current Limit State Machine

This pin is internally connected to the output MOSFET source

for high voltage power return and control circuit common.

The enable input circuit at the EN/UV pin consists of a low

impedance source follower output set at 1.2 V. The current

through the source follower is limited to 115 µA. When the

current out of this pin exceeds the threshold current, a low

logic level (disable) is generated at the output of the enable

circuit, until the current out of this pin is reduced to less than

the threshold current. This enable circuit output is sampled

at the beginning of each cycle on the rising edge of the clock

signal. If high, the power MOSFET is turned on for that cycle

(enabled). If low, the power MOSFET remains off (disabled).

Since the sampling is done only at the beginning of each cycle,

subsequent changes in the EN/UVpin voltage or current during

the remainder of the cycle are ignored.

TinySwitch-III Functional

Description

TinySwitch-IIIcombinesahighvoltagepowerMOSFETswitch

withapowersupplycontrollerinonedevice.Unlikeconventional

PWM (pulse width modulator) controllers, it uses a simple

ON/OFF control to regulate the output voltage.

Thecontrollerconsistsofanoscillator,enablecircuit(senseand

logic), current limit state machine, 5.85 V regulator, BYPASS/

MULTI-FUNCTIONpinunder-voltage,overvoltagecircuit,and

current limit selection circuitry, over- temperature protection,

current limit circuit, leading edge blanking, and a 700 V power

MOSFET. TinySwitch-III incorporates additional circuitry for

line under-voltage sense, auto-restart, adaptive switching cycle

on-time extension, and frequency jitter. Figure 2 shows the

functional block diagram with the most important features.

The current limit state machine reduces the current limit by

discrete amounts at light loads when TinySwitch-III is likely to

switch in the audible frequency range. The lower current limit

raises the effective switching frequency above the audio range

andreducesthetransformerﬂuxdensity,includingtheassociated

audible noise. The state machine monitors the sequence of

enable events to determine the load condition and adjusts the

current limit level accordingly in discrete amounts.

Oscillator

The typical oscillator frequency is internally set to an average

of 132 kHz. Two signals are generated from the oscillator: the

Undermostoperatingconditions(exceptwhenclosetono-load),

the low impedance of the source follower keeps the voltage on

the EN/UV pin from going much below 1.2 V in the disabled

state. This improves the response time of the optocoupler that

is usually connected to this pin.

600

500

V_DRAIN

400

5.85 V Regulator and 6.4 V Shunt Voltage Clamp

The 5.85 V regulator charges the bypass capacitor connected

to the BYPASS pin to 5.85 V by drawing a current from the

voltage on the DRAIN pin whenever the MOSFET is off. The

BYPASS/MULTI-FUNCTIONpinistheinternalsupplyvoltage

node. When the MOSFET is on, the device operates from the

energy stored in the bypass capacitor. Extremely low power

consumption of the internal circuitry allows TinySwitch-III to

operate continuously from current it takes from the DRAIN

pin. A bypass capacitor value of 0.1 µF is sufﬁcient for both

high frequency decoupling and energy storage.

300

200

100

136 kHz

128 kHz

Time (µs)

Figure 4. Frequency Jitter.

2/06

TNY274-280

In addition, there is a 6.4 V shunt regulator clamping the

BYPASS/MULTI-FUNCTION pin at 6.4 V when current

is provided to the BYPASS/MULTI-FUNCTION pin

through an external resistor. This facilitates powering of

TinySwitch-III externally through a bias winding to decrease

the no-load consumption to well below 50 mW.

Auto-Restart

In the event of a fault condition such as output overload, output

short circuit, or an open loop condition, TinySwitch-III enters

into auto-restart operation. An internal counter clocked by the

oscillator is reset every time the EN/UV pin is pulled low. If the

EN/UV pin is not pulled low for 64 ms, the power MOSFET

switching is normally disabled for 2.5 seconds (except in the

caseoflineunder-voltagecondition, inwhichcaseitisdisabled

until the condition is removed). The auto-restart alternately

enables and disables the switching of the power MOSFET until

the fault condition is removed. Figure 5 illustrates auto-restart

circuit operation in the presence of an output short circuit.

BYPASS/MULTI-FUNCTION Pin Under-Voltage

TheBYPASS/MULTI-FUNCTIONpinunder-voltagecircuitry

disables the power MOSFET when the BYPASS/MULTI-

FUNCTION pin voltage drops below 4.9 V in steady state

operation.OncetheBYPASS/MULTI-FUNCTIONpinvoltage

drops below 4.9 V in steady state operation, it must rise back

to 5.85 V to enable (turn-on) the power MOSFET.

In the event of a line under-voltage condition, the switching of

the power MOSFET is disabled beyond its normal 2.5 seconds

until the line under-voltage condition ends.

Over Temperature Protection

Thethermalshutdowncircuitrysensesthedietemperature. The

threshold is typically set at 142 °C with 75 °C hysteresis. When

thedietemperaturerisesabovethisthresholdthepowerMOSFET

is disabled and remains disabled until the die temperature falls

by 75 °C, at which point it is re-enabled. A large hysteresis of

75 °C (typical) is provided to prevent overheating of the PC

board due to a continuous fault condition.

Adaptive Switching Cycle On-Time Extension

Adaptive switching cycle on-time extension keeps the cycle

on until current limit is reached, instead of prematurely

terminating after the DC_MAXsignal goes low. This feature

reduces the minimum input voltage required to maintain

regulation, extending hold-up time and minimizing the size

of bulk capacitor required. The on-time extension is disabled

during the startup of the power supply, until the power supply

output reaches regulation.

Current Limit

ThecurrentlimitcircuitsensesthecurrentinthepowerMOSFET.

When this current exceeds the internal threshold (I_LIMIT), the

powerMOSFETisturnedofffortheremainderofthatcycle.The

current limit state machine reduces the current limit threshold

by discrete amounts under medium and light loads.

Line Under-Voltage Sense Circuit

TheDClinevoltagecanbemonitoredbyconnectinganexternal

resistorfromtheDClinetotheEN/UVpin. Duringpower-upor

when the switching of the power MOSFET is disabled in auto-

restart, the current into the EN/UV pin must exceed 25 µA to

initiateswitchingofthepowerMOSFET.Duringpower-up,this

isaccomplishedbyholdingtheBYPASS/MULTI-FUNCTION

pin to 4.9 V while the line under-voltage condition exists. The

BYPASS/MULTI-FUNCTION pin then rises from 4.9 V to

5.85Vwhenthelineunder-voltageconditiongoesaway.Whenthe

switchingofthepowerMOSFETisdisabledinauto-restartmode

andalineunder-voltageconditionexists,theauto-restartcounter

is stopped. This stretches the disable time beyond its normal

2.5 seconds until the line under-voltage condition ends.

The leading edge blanking circuit inhibits the current limit

comparator for a short time (t_LEB) after the power MOSFET is

turned on. This leading edge blanking time has been set so that

currentspikescausedbycapacitanceandsecondary-siderectiﬁer

reverse recovery time will not cause premature termination of

the switching pulse.

300

DRAIN

200

The line under-voltage circuit also detects when there is

no external resistor connected to the EN/UV pin (less than

~1 µAinto the pin). In this case the line under-voltage function

is disabled.

100

TinySwitch-III Operation

DC-OUTPUT

TinySwitch-III devices operate in the current limit mode. When

enabled, the oscillator turns the power MOSFET on at the

beginning of each cycle. The MOSFET is turned off when the

current ramps up to the current limit or when the DC_MAXlimit is

reached. Since the highest current limit level and frequency of

a TinySwitch-III design are constant, the power delivered to the

2500

5000

Time (ms)

Figure 5. Auto-Restart Operation.

2/06

TNY274-280

loadisproportionaltotheprimaryinductanceofthetransformer

and peak primary current squared. Hence, designing the supply

involves calculating the primary inductance of the transformer

for the maximum output power required. If the TinySwitch-III

is appropriately chosen for the power level, the current in the

calculated inductance will ramp up to current limit before the

DC_MAXlimit is reached.

not to proceed with the next switching cycle. The sequence of

cycles is used to determine the current limit. Once a cycle is

started, it always completes the cycle (even when the EN/UV

pin changes state half way through the cycle). This operation

results in a power supply in which the output voltage ripple

is determined by the output capacitor, amount of energy per

switch cycle and the delay of the feedback.

Enable Function

TinySwitch-III senses the EN/UV pin to determine whether or

The EN/UV pin signal is generated on the secondary by

comparing the power supply output voltage with a reference

voltage. The EN/UV pin signal is high when the power supply

output voltage is less than the reference voltage.

In a typical implementation, the EN/UV pin is driven by an

optocoupler. The collector of the optocoupler transistor is

connected to the EN/UV pin and the emitter is connected to

the SOURCE pin. The optocoupler LED is connected in series

withaZenerdiodeacrosstheDCoutputvoltagetoberegulated.

When the output voltage exceeds the target regulation voltage

level (optocoupler LED voltage drop plus Zener voltage), the

optocoupler LED will start to conduct, pulling the EN/UV pin

low. The Zener diode can be replaced by a TL431 reference

circuit for improved accuracy.

CLOCK

MAX

DRAIN

ON/OFF Operation with Current Limit State Machine

The internal clock of the TinySwitch-III runs all the time. At

the beginning of each clock cycle, it samples the EN/UV pin to

decide whether or not to implement a switch cycle, and based

on the sequence of samples over multiple cycles, it determines

the appropriate current limit. At high loads, the state machine

sets the current limit to its highest value. At lighter loads, the

state machine sets the current limit to reduced values.

DRAIN

PI-2749-082305

Figure 6. Operation at Near Maximum Loading.

CLOCK

MAX

DRAIN

PI-2377-082305

PI-2667-082305

Figure 8. Operation at Medium Loading.

Figure 7. Operation at Moderately Heavy Loading.

2/06

TNY274-280

200

100

DC-INPUT

CLOCK

MAX

BYPASS

400

200

DRAIN

Time (ms)

Figure 11. Power-Up Without Optional External UV Resistor

Connected to EN/UV Pin.

DRAIN

PI-2661-082305

200

Figure 9. Operation at Very Light Load.

100

DC-INPUT

At near maximum load, TinySwitch-III will conduct during

nearly all of its clock cycles (Figure 6). At slightly lower load,

it will “skip” additional cycles in order to maintain voltage

regulation at the power supply output (Figure 7). At medium

loads,cycleswillbeskippedandthecurrentlimitwillbereduced

(Figure 8).At very light loads, the current limit will be reduced

even further (Figure 9). Only a small percentage of cycles will

occur to satisfy the power consumption of the power supply.

400

300

200

100

DRAIN

The response time of the ON/OFF control scheme is very fast

compared to PWM control. This provides tight regulation and

excellent transient response.

Time (s)

Figure 12. Normal Power-Down Timing (without UV).

200

100

200

DC-INPUT

100

DC-INPUT

400

300

BYPASS

400

200

100

DRAIN

200

DRAIN

2.5

Time (s)

Time (ms)

Figure 13. Slow Power-Down Timing with Optional External

Figure 10. Power-Up with Optional External UV Resistor (4 MΩ)

(4 MΩ) UV Resistor Connected to EN/UV Pin.

Connected to EN/UV Pin.

2/06

TNY274-280

Power Up/Down

Functional Description above). This has two main beneﬁts.

First, for a nominal application, this eliminates the cost of a

bias winding and associated components. Secondly, for battery

charger applications, the current-voltage characteristic often

allows the output voltage to fall close to zero volts while still

delivering power. TinySwitch-III accomplishes this without a

forward bias winding and its many associated components. For

applications that require very low no-load power consumption

(50 mW), a resistor from a bias winding to the BYPASS/

MULTI-FUNCTION pin can provide the power to the chip.

The minimum recommended current supplied is 1 mA. The

BYPASS/MULTI-FUNCTION pin in this case will be clamped

at 6.4 V. This method will eliminate the power draw from the

DRAIN pin, thereby reducing the no-load power consumption

and improving full-load efﬁciency.

The TinySwitch-III requires only a 0.1 µF capacitor on the

BYPASS/MULTI-FUNCTION pin to operate with standard

current limit. Because of its small size, the time to charge this

capacitor is kept to an absolute minimum, typically 0.6 ms. The

time to charge will vary in proportion to the BYPASS/MULTI-

FUNCTIONpincapacitorvaluewhenselectingdifferentcurrent

limits. Due to the high bandwidth of the ON/OFF feedback,

there is no overshoot at the power supply output. When an

external resistor (4 MΩ) is connected from the positive DC

input to the EN/UV pin, the power MOSFET switching will

be delayed during power-up until the DC line voltage exceeds

the threshold (100 V). Figures 10 and 11 show the power-up

timing waveform in applications with and without an external

resistor (4 MΩ) connected to the EN/UV pin.

Understartupandoverloadconditions,whentheconductiontime

is less than 400 ns, the device reduces the switching frequency

to maintain control of the peak drain current.

Current Limit Operation

Each switching cycle is terminated when the DRAIN current

reaches the current limit of the device. Current limit operation

providesgoodlineripplerejectionandrelativelyconstantpower

delivery independent of input voltage.

During power-down, when an external resistor is used, the

power MOSFET will switch for 64 ms after the output loses

regulation. The power MOSFET will then remain off without

any glitches since the under-voltage function prohibits restart

when the line voltage is low.

BYPASS/MULTI-FUNCTION Pin Capacitor

The BYPASS/MULTI-FUNCTION pin can use a ceramic

capacitor as small as 0.1 µF for decoupling the internal power

supplyofthedevice.Alargercapacitorsizecanbeusedtoadjust

the current limit. For TNY275-280, a 1 µF BP/M pin capacitor

will select a lower current limit equal to the standard current

limit of the next smaller device and a 10 µF BP/M pin capacitor

will select a higher current limit equal to the standard current

limit of the next larger device. The higher current limit level of

the TNY280 is set to 850 mA typical. The TNY274 MOSFET

does not have the capability for increased current limit so this

feature is not available in this device.

Figure 12 illustrates a typical power-down timing waveform.

Figure 13 illustrates a very slow power-down timing waveform

as in standby applications. The external resistor (4 MΩ) is

connected to the EN/UV pin in this case to prevent unwanted

restarts.

No bias winding is needed to provide power to the chip

because it draws the power directly from the DRAIN pin (see

2/06

TNY274-280

2.2 nF

250 VAC

Ferrite Bead

3.5 × 7.6 mm

VR1

BYV28-200

+12 V, 1 A

P6KE150A

C11

100 µF

25 V

C10

1000 µF

25 V

1N4007

100 Ω

RTN

10 nF

1 kV

3.15 A

6.8 µF

400 V

22 µF

400 V

1 kΩ

20 Ω

85-265

VAC

RV1

275 VAC

1N4007GP

UF4003

R5*

3.6 MΩ

1N4007

VR2

1N5255B

28 V

1 mH

VR3

BZX79-C11

11 V

1 µF

60 V

47 Ω

1/8 W

*R5 and R8 are optional

components

390 Ω

1/8 W

R8*

21 kΩ

^†C7 is configurable to adjust

U1 current limit, see circuit

description

PC817A

EN/UV

BP/M

2 kΩ

1/8 W

C7 ^†

100 nF

50 V

TinySwitch-III

TNY278P

PI-4244-021406

Figure 14. TNY278P, 12 V, 1 A Universal Input Power Supply.

LED forward drop, current will ﬂow in the optocoupler LED.

This will cause the transistor of the optocoupler to sink current.

When this current exceeds the ENABLE pin threshold current

the next switching cycle is inhibited. When the output voltage

fallsbelowthefeedbackthreshold,aconductioncycleisallowed

to occur and, by adjusting the number of enabled cycles, output

regulation is maintained. As the load reduces, the number of

enabled cycles decreases, lowering the effective switching

frequencyandscalingswitchinglosseswithload. Thisprovides

almost constant efﬁciency down to very light loads, ideal for

meeting energy efﬁciency requirements.

Applications Example

The circuit shown in Figure 14 is a low cost, high efﬁciency,

ﬂyback power supply designed for 12 V, 1 A output from

universal input using the TNY278.

The supply features under-voltage lockout, primary sensed

output overvoltage latching shutdown protection, high

efficiency (>80%), and very low no-load consumption

(<50mWat265VAC). Outputregulationisaccomplishedusing

a simple zener reference and optocoupler feedback.

The rectiﬁed and ﬁltered input voltage is applied to the primary

winding of T1. The other side of the transformer primary is

driven by the integrated MOSFET in U1. Diode D5, C2, R1,

R2, and VR1 comprise the clamp circuit, limiting the leakage

inductance turn-off voltage spike on the DRAIN pin to a safe

value. The use of a combination a Zener clamp and parallel

RC optimizes both EMI and energy efﬁciency. Resistor R2

allows the use of a slow recovery, low cost, rectiﬁer diode by

limiting the reverse current through D5. The selection of a

slow diode also improves efﬁciency and conducted EMI but

should be a glass passivated type, with a speciﬁed recovery

time of ≤2 µs.

As the TinySwitch-III devices are completely self-powered,

there is no requirement for an auxiliary or bias winding on the

transformer. However by adding a bias winding, the output

overvoltage protection feature can be conﬁgured, protecting

the load against open feedback loop faults.

When an overvoltage condition occurs, such that bias voltage

exceeds the sum ofVR2 and the BYPASS/MULTIFUNCTION

(BP/M) pinvoltage(28V+5.85V),currentbeginstoﬂowintothe

BP/Mpin. Whenthiscurrentexceeds5mAtheinternallatching

shutdown circuit in TinySwitch-III is activated. This condition

is reset when the BP/M pin voltage drops below 2.6 V after

removal of the AC input. In the example shown, on opening

the loop, the OVP trips at an output of 17 V.

The output voltage is regulated by the Zener diode VR3. When

theoutputvoltageexceedsthesumoftheZenerandoptocoupler

2/06

TNY274-280

For lower no-load input power consumption, the bias winding

may also be used to supply the TinySwitch-III device. Resistor

R8 feeds current into the BP/M pin, inhibiting the internal high

voltage current source that normally maintains the BP/M pin

capacitor voltage (C7) during the internal MOSFET off time.

This reduces the no-load consumption of this design from

140 mW to 40 mW at 265 VAC.

Key Application Considerations

TinySwitch-lll Design Considerations

Output Power Table

The data sheet output power table (Table 1) represents the

minimum practical continuous output power level that can be

obtained under the following assumed conditions:

Under-voltage lockout is conﬁgured by R5 connected between

the DC bus and EN/UV pin of U1. When present, switching

is inhibited until the current in the EN/UV pin exceeds 25 µA.

This allows the startup voltage to be programmed within the

normal operating input voltage range, preventing glitching of

the output under abnormal low voltage conditions and also on

removal of the AC input.

1. The minimum DC input voltage is 100 V or higher for

85 VAC input, or 220 V or higher for 230 VAC input or

115 VAC with a voltage doubler. The value of the input

capacitance should be sized to meet these criteria for AC

input designs.

2. Efﬁciency of 75%.

3. Minimum data sheet value of I²f.

4. Transformer primary inductance tolerance of ±10%.

5. Reﬂected output voltage (V_OR) of 135 V.

6. Voltage only output of 12 V with a fast PN rectiﬁer diode.

7. Continuous conduction mode operation with transient K_P*

value of 0.25.

8. Increased current limit is selected for peak and open frame

power columns and standard current limit for adapter

columns.

9. The part is board mounted with SOURCE pins soldered to

a sufﬁcient area of copper and/or a heatsink is used to keep

the SOURCE pin temperature at or below 110 °C.

10. Ambient temperature of 50 °C for open frame designs and

40 °C for sealed adapters.

In addition to the simple input pi ﬁlter (C1, L1, C2) for

differential mode EMI, this design makes use of E-Shield™

shielding techniques in the transformer to reduce common

mode EMI displacement currents, and R2 and C4 as a damping

network to reduce high frequency transformer ringing. These

techniques, combined with the frequency jitter of TNY278,

give excellent conducted and radiated EMI performance with

this design achieving >12 dBµV of margin to EN55022 Class

B conducted EMI limits.

For design ﬂexibility the value of C7 can be selected to pick one

of the 3 current limits options in U1. This allows the designer

to select the current limit appropriate for the application.

*Below a value of 1, K_Pis the ratio of ripple to peak primary

current. To prevent reduced power capability due to premature

termination of switching cycles a transient K_Plimit of ≥0.25

•

Standardcurrentlimit(I_LIMIT)isselectedwitha0.1µFBP/M

pin capacitor and is the normal choice for typical enclosed

adapter applications.

When a 1 µF BP/M pin capacitor is used, the current

limit is reduced (I_LIMITredor I_LIMIT-1) offering reduced RMS

device currents and therefore improved efﬁciency, but at

the expense of maximum power capability. This is ideal

for thermally challenging designs where dissipation must

be minimized.

When a 10 µF BP/M pin capacitor is used, the current

limit is increased (I_LIMITincor I_LIMIT+1), extending the power

capability for applications requiring higher peak power or

continuous power where the thermal conditions allow.

is recommended. This prevents the initial current limit (I_INIT

from being exceeded at MOSFET turn on.

)

For reference, Table 2 provides the minimum practical power

deliveredfromeachfamilymemberatthethreeselectablecurrent

limitvalues. Thisassumesopenframeoperation(notthermally

limited) and otherwise the same conditions as listed above.

These numbers are useful to identify the correct current limit

to select for a given device and output power requirement.

•

Overvoltage Protection

The output overvoltage protection provided by TinySwitch-III

uses an internal latch that is triggered by a threshold current

of approximately 5.5 mA into the BP/M pin. In addition to an

internal ﬁlter, the BP/M pin capacitor forms an external ﬁlter

providing noise immunity from inadvertent triggering. For the

bypass capacitor to be effective as a high frequency ﬁlter, the

capacitorshouldbelocatedascloseaspossibletotheSOURCE

and BP/M pins of the device.

Furtherﬂexibilitycomesfromthecurrentlimitsbetweenadjacent

TinySwitch-IIIfamilymembersbeingcompatible. Thereduced

current limit of a given device is equal to the standard current

limitofthenextsmallerdeviceandtheincreasedcurrentlimitis

equal to the standard current limit of the next larger device.

2/06

TNY274-280

OUTPUT POWER TABLE

230 VAC ±15%

85-265 VAC

PRODUCT

I_LIMIT-1

I_LIMIT

I_LIMIT+1

I_LIMIT-1

I_LIMIT

I_LIMIT+1

TNY274 P or G

TNY275 P or G

TNY276 P or G

TNY277 P or G

TNY278 P or G

TNY279 P or G

TNY280 P or G

10.9

9.1

15.1

19.4

23.7

7.1

8.4

8.5

9.3

7.1

10.8

11.8

15.1

19.4

23.7

11.8

15.1

18.5

21.8

25.2

28.5

15.3

19.6

9.2

11.9

15.3

18.6

11.8

15.1

18.5

21.8

28.4

32.7

32.2

36.6

25.4

Table 2. Minimum Practical Power at Three Selectable Current Limit Levels.

For best performance of the OVP function, it is recommended

thatarelativelyhighbiaswindingvoltageisused,intherangeof

15V-30V. Thisminimizestheerrorvoltageonthebiaswinding

due to leakage inductance and also ensures adequate voltage

during no-load operation from which to supply the BP/M pin

for reduced no-load consumption.

practically eliminates audible noise. Vacuum impregnation

of the transformer should not be used due to the high primary

capacitanceandincreasedlossesthatresult.Higherﬂuxdensities

are possible, however careful evaluation of the audible noise

performance should be made using production transformer

samples before approving the design.

Selecting the Zener diode voltage to be approximately 6 V

above the bias winding voltage (28 V for 22 V bias winding)

gives good OVP performance for most designs, but can be

adjusted to compensate for variations in leakage inductance.

Adding additional ﬁltering can be achieved by inserting a low

value (10 Ω to 47 Ω) resistor in series with the bias winding

diode and/or the OVP Zener as shown by R7 and R3 in

Figure 14. The resistor in series with the OVPZener also limits

the maximum current into the BP/M pin.

Ceramic capacitors that use dielectrics such as Z5U, when used

in clamp circuits, may also generate audio noise. If this is the

case, try replacing them with a capacitor having a different

dielectric or construction, for example a ﬁlm type.

TinySwitch-lll Layout Considerations

Layout

See Figure 15 for a recommended circuit board layout for

TinySwitch-III.

Reducing No-load Consumption

AsTinySwitch-IIIisself-poweredfromtheBP/Mpincapacitor,

there is no need for an auxillary or bias winding to be provided

onthetransformerforthispurpose. Typicalno-loadconsumption

whenself-poweredis<150mWat265VACinput. Theaddition

ofabiaswindingcanreducethisdownto<50mWbysupplying

theTinySwitch-IIIfromthelowerbiasvoltageandinhibitingthe

internal high voltage current source. To achieve this, select the

value of the resistor (R8 in Figure 14) to provide the data sheet

DRAIN supply current. In practice, due to the reduction of the

bias voltage at low load, start with a value equal to 40% greater

thanthedatasheetmaximumcurrent,andthenincreasethevalue

of the resistor to give the lowest no-load consumption.

Single Point Grounding

Useasinglepointgroundconnectionfromtheinputﬁltercapacitor

to the area of copper connected to the SOURCE pins.

Bypass Capacitor (C_BP)

The BP/M pin capacitor should be located as near as possible

to the BP/M and SOURCE pins.

Primary Loop Area

The area of the primary loop that connects the input ﬁlter

capacitor, transformer primary and TinySwitch-III together

should be kept as small as possible.

Audible Noise

Primary Clamp Circuit

The cycle skipping mode of operation used in TinySwitch-III

can generate audio frequency components in the transformer.

To limit this audible noise generation the transformer should

be designed such that the peak core ﬂux density is below

3000 Gauss (300 mT). Following this guideline and using the

standard transformer production technique of dip varnishing

Aclamp is used to limit peak voltage on the DRAIN pin at turn

off. This can be achieved by using an RCD clamp or a Zener

(~200 V) and diode clamp across the primary winding. In all

cases, to minimize EMI, care should be taken to minimize the

circuit path from the clamp components to the transformer and

TinySwitch-III.

2/06

TNY274-280

Input Filter

Capacitor

TOP VIEW

Y1-

Capacitor

HV DC

INPUT

Output Filter

Capacitor

S S S

TinySwitch-III

EN/UV BP/M D

Opto-

coupler

OUT

Maximize hatched copper

areas (

) for optimum

heatsinking

PI-4278-013006

Figure 15. Recommended Circuit Board Layout for TinySwitch-III with Under-Voltage Lock Out Resistor.

Thermal Considerations

Optocoupler

The four SOURCE pins are internally connected to the IC lead

frameandprovidethemainpathtoremoveheatfromthedevice.

ThereforealltheSOURCEpinsshouldbeconnectedtoacopper

area underneath the TinySwitch-III to act not only as a single

point ground, but also as a heatsink. As this area is connected

to the quiet source node, this area should be maximized for

good heatsinking. Similarly for axial output diodes, maximize

the PCB area connected to the cathode.

Place the optocoupler physically close to the TinySwitch-III

to minimizing the primary-side trace lengths. Keep the high

current, high voltage drain and clamp traces away from the

optocoupler to prevent noise pick up.

Output Diode

For best performance, the area of the loop connecting the

secondary winding, the output diode and the output ﬁlter

capacitor, should be minimized. In addition, sufﬁcient copper

area should be provided at the anode and cathode terminals

of the diode for heatsinking. A larger area is preferred at the

quiet cathode terminal. A large anode area can increase high

frequency radiated EMI.

Y-Capacitor

The placement of the Y-capacitor should be directly from the

primary input ﬁlter capacitor positive terminal to the common/

return terminal of the transformer secondary. Such a placement

will route high magnitude common mode surge currents away

from the TinySwitch-III device. Note – if an input π (C, L, C)

EMI ﬁlter is used then the inductor in the ﬁlter should be placed

between the negative terminals of the input ﬁlter capacitors.

2/06

TNY274-280

startup. Repeatundersteadystateconditionsandverifythat

the leading edge current spike event is below I_LIMIT(Min)at the

endofthet_LEB(Min). Underallconditions, themaximumdrain

current should be below the speciﬁed absolute maximum

ratings.

Quick Design Checklist

As with any power supply design, all TinySwitch-III designs

should be veriﬁed on the bench to make sure that component

speciﬁcationsarenotexceededunderworstcaseconditions. The

following minimum set of tests is strongly recommended:

3. Thermal Check – At speciﬁed maximum output power,

minimuminputvoltageandmaximumambienttemperature,

verify that the temperature speciﬁcations are not exceeded

for TinySwitch-III, transformer, output diode, and output

capacitors. Enough thermal margin should be allowed for

part-to-part variation of the R_DS(ON)of TinySwitch-III as

speciﬁedinthedatasheet. Underlowline,maximumpower,

a maximum TinySwitch-III SOURCE pin temperature of

110 °C is recommended to allow for these variations.

1. Maximum drain voltage – Verify that V_DSdoes not exceed

650 V at highest input voltage and peak (overload) output

power. The 50 V margin to the 700 V BV_DSSspeciﬁcation

gives margin for design variation.

2. Maximumdraincurrent–Atmaximumambienttemperature,

maximum input voltage and peak output (overload) power,

verify drain current waveforms for any signs of transformer

saturation and excessive leading edge current spikes at

2/06

TNY274-280

ABSOLUTE MAXIMUM RATINGS^(1,5)

DRAIN Voltage ................................................-0.3 V to 700 V Lead Temperature⁽⁴⁾....................................................... 260 °C

DRAIN Peak Current: TNY274.......................400 (750) mA⁽²⁾

TNY275.....................560 (1050) mA⁽²⁾Notes:

TNY276.....................720 (1350) mA⁽²⁾1. All voltages referenced to SOURCE, T_A= 25 °C.

TNY277.....................880 (1650) mA⁽²⁾2. The higher peak DRAIN current is allowed while the

TNY278...................1040 (1950) mA⁽²⁾

DRAIN voltage is simultaneously less than 400 V.

TNY279 ................. 1200 (2250) mA⁽²⁾3. Normally limited by internal circuitry.

TNY280 ................. 1360 (2550) mA⁽²⁾4. 1/16 in. from case for 5 seconds.

EN/UV Voltage ................................................... -0.3 V to 9 V 5. Maximum ratings speciﬁed may be applied one at a time,

EN/UV Current ........................................................... 100 mA

BP/M Voltage ......................................................-0.3 V to 9 V

Storage Temperature ......................................-65 °C to 150 °C

Operating Junction Temperature⁽³⁾.................-40 °C to 150 °C

without causing permanent damage to the product.

Exposure to Absolute Maximum Rating conditions for

extended periods of time may affect product reliability.

THERMAL IMPEDANCE

Notes:

Thermal Impedance: P or G Package:

(θ_JA) ........................... 70 °C/W⁽²⁾; 60 °C/W⁽³⁾

(θ_JC)⁽¹⁾............................................... 11 °C/W

1. Measured on the SOURCE pin close to plastic interface.

2. Soldered to 0.36 sq. in. (232 mm²), 2 oz. (610 g/m²) copper clad.

3. Soldered to 1 sq. in. (645 mm²), 2 oz. (610 g/m²) copper clad.

Conditions

SOURCE = 0 V; T_J= -40 to 125 °C

See Figure 16

Parameter

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

CONTROL FUNCTIONS

Average

124

132

140

Output Frequency

f_OSC

T_J= 25 °C

See Figure 4

kHz

in Standard Mode

Peak-Peak Jitter

Maximum Duty

DC_MAX

Cycle

S1 Open

EN/UV Pin Upper

I_DIS

-150

-115

-90

µA

Turnoff Threshold

Current

I_EN/UV= 25 µA

I_EN/UV= -25 µA

1.8

0.8

2.2

1.2

2.6

1.6

EN/UV Pin

Voltage

V_EN

EN/UV Current > I_DIS(MOSFET Not

Switching) See Note A

I_S1

290

µA

TNY274

TNY275

275

295

310

365

445

510

630

360

400

430

460

540

640

760

DRAIN Supply

Current

EN/UV Open

(MOSFET

Switching at f_OSC

TNY276

TNY277

TNY278

TNY279

TNY280

I_S2

µA

)

See Note B

2/06

TNY274-280

Parameter

Conditions

SOURCE = 0 V; T_J= -40 to 125 °C

See Figure 16

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

CONTROL FUNCTIONS (cont.)

TNY274

TNY275-279

TNY280

-6

-3.8

-5.4

-6.8

-2.3

-3.5

-4.6

5.85

-1.8

-2.5

-3.9

-1

V_BP/M= 0 V,

T_J= 25 °C

See Note C, D

I_CH1

-8.3

-9.7

-4.1

-5

BP/M Pin Charge

Current

TNY274

V_BP/M= 4 V,

T_J= 25 °C

See Note C, D

I_CH2

TNY275-279

TNY280

-1.5

-2.1

6.15

-6.6

5.6

V_BP/M

See Note C

BP/M Pin Voltage

Hysteresis

V_BP/MH

0.80

6.0

0.95

6.4

1.20

6.7

BP/M Pin Shunt

Voltage

V_SHUNT

I_BP= 2 mA

EN/UV Pin Line

Under-Voltage

Threshold

I_LUV

T_J= 25 °C

22.5

27.5

µA

CIRCUIT PROTECTION

TNY274

T_J= 25 °C

di/dt = 50 mA/µs

233

256

326

419

512

605

698

196

233

250

275

350

450

550

650

750

210

250

267

294

374

481

588

695

802

233

277

See Note E

TNY275

T_J= 25 °C

di/dt = 55 mA/µs

See Note E

TNY276

T_J= 25 °C

di/dt = 70 mA/µs

Standard Current

Limit (BP/M

See Note E

TNY277

T_J= 25 °C

di/dt = 90 mA/µs

I_LIMIT

Capacitor =

0.1 µF)

See Note D

See Note E

TNY278

T_J= 25 °C

di/dt = 110 mA/µs

See Note E

TNY279

T_J= 25 °C

di/dt = 130 mA/µs

See Note E

TNY280

T_J= 25 °C

di/dt = 150 mA/µs

See Note E

TNY274

T_J= 25 °C

di/dt = 50 mA/µs

Reduced Current

Limit (BP/M

See Note E

I_LIMITred

TNY275

T_J= 25 °C

di/dt = 55 mA/µs

Capacitor = 1 µF)

See Note E

2/06

TNY274-280

Conditions

SOURCE = 0 V; T_J= -40 to 125 °C

See Figure 16

Parameter

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

CIRCUIT PROTECTION (cont.)

TNY276

T_J= 25 °C

di/dt = 70 mA/µs

256

326

419

512

605

196

326

419

512

605

698

791

275

350

450

550

650

210

350

450

550

650

750

305

388

499

610

721

233

388

499

610

721

833

943

See Note E

TNY277

T_J= 25 °C

di/dt = 90 mA/µs

See Note E

Reduced Current

Limit (BP/M

Capacitor = 1 µF)

See Note D

TNY278

T_J= 25 °C

di/dt = 110 mA/µs

I_LIMITred

See Note E

TNY279

T_J= 25 °C

di/dt = 130 mA/µs

See Note E

TNY280

T_J= 25 °C

di/dt = 150 mA/µs

See Note E

TNY274

T_J= 25 °C

di/dt = 50 mA/µs

See Note E, F

TNY275

T_J= 25 °C

di/dt = 55 mA/µs

See Note E

TNY276

T_J= 25 °C

di/dt = 70 mA/µs

See Note E

Increased Current

Limit (BP/M

Capacitor = 10 µF)

See Note D

TNY277

T_J= 25 °C

di/dt = 90 mA/µs

I_LIMITinc

See Note E

TNY278

T_J= 25 °C

di/dt = 110 mA/µs

See Note E

TNY279

T_J= 25 °C

di/dt = 130 mA/µs

See Note E

TNY280

T_J= 25 °C

di/dt = 150 mA/µs

850

I²f

See Note E

Standard

Current Limit

0.9 ×

I²f

1.12 ×

I²f

I²f = I_LIMIT(TYP)

I²f

A²Hz

Power Coefﬁcient

Initial Current Limit

Reduced or

Increased

Current Limit

f_OSC(TYP)

0.9 ×

I²f

1.16 ×

I²f

See Figure 19

T_J= 25 °C, See Note G

0.75 ×

I_LIMIT(MIN)

I_INIT

Leading Edge

Blanking Time

T_J= 25 °C

See Note G

t_LEB

170

135

215

150

142

Current Limit

Delay

T_J= 25 °C

See Note G, H

t_ILD

Thermal Shutdown

Temperature

T_SD

150

°C

2/06

TNY274-280

Parameter

Conditions

SOURCE = 0 V; T_J= -40 to 125 °C

See Figure 16

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

CIRCUIT PROTECTION (cont.)

Thermal Shut-

T_SDH

down Hysteresis

°C

BP/M Pin Shut-

I_SD

5.5

7.5

3.6

down Threshold

Current

BP/M Pin Power-

Up Reset Thresh-

old Voltage

V_BP/M(RESET)

1.6

2.6

OUTPUT

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

T_J= 25 °C

T_J= 100 °C

TNY274

I_D= 25 mA

TNY275

I_D= 28 mA

TNY276

I_D= 35 mA

7.8

11.7

5.2

7.8

3.9

5.8

2.6

3.9

9.0

13.5

6.0

9.0

4.5

6.7

3.0

4.5

ON-State

Resistance

TNY277

I_D= 45 mA

R_DS(ON)

Ω

TNY278

I_D= 55 mA

TNY279

I_D= 65 mA

TNY280

I_D= 75 mA

V_BP/M= 6.2 V

TNY274-276

TNY277-278

TNY279-280

V_EN/UV= 0 V

V_DS= 560 V

T_J= 125 °C

See Note I

I_DSS1

100

200

OFF-State Drain

Leakage Current

µA

V_DS= 375 V,

T_J= 50 °C

See Note G, I

V_BP/M= 6.2 V

V_EN/UV= 0 V

I_DSS2

Breakdown

Voltage

V_BP= 6.2 V, V_EN/UV= 0 V,

See Note J, T_J= 25 °C

BV_DSS

700

DRAIN Supply

Voltage

2/06

TNY274-280

Conditions

SOURCE = 0 V; T_J= -40 to 125 °C

See Figure 16

Parameter

Symbol

Min

Typ

Max

Units

(Unless Otherwise Speciﬁed)

OUTPUT (cont.)

Auto-Restart

ON-Time at f_OSC

T_J= 25 °C

t_AR

See Note K

Auto-Restart

Duty Cycle

DC_AR

T_J= 25 °C

NOTES:

A. I_S1is an accurate estimate of device controller current consumption at no-load, since operating frequency is so

low under these conditions. Total device consumption at no-load is the sum of I_S1and I_DSS2

B Since the output MOSFET is switching, it is difﬁcult to isolate the switching current from the supply current at the

DRAIN. An alternative is to measure the BP/M pin current at 6.1 V.

C. BP/M pin is not intended for sourcing supply current to external circuitry.

D. To ensure correct current limit it is recommended that nominal 0.1 µF / 1 µF / 10 µF capacitors are used. In

addition, the BP/M capacitor value tolerance should be equal or better than indicated below across the ambient

temperature range of the target application. The minimum and maximum capacitor values are guaranteed by

characterization.

Tolerance Relative to Nominal

Nominal BP/M

Pin Cap Value

Capacitor Value

Min

MAX

+100%

0.1 µF

1 µF

-60%

-50%

10 µF

E. For current limit at other di/dt values, refer to Figure 23.

F. TNY274 does not set an increased current limit value, but with a 10 µF BP/M pin capacitor the current limit is the

same as with a 1 µF BP/M pin capacitor (reduced current limit value).

G. This parameter is derived from characterization.

H. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the I_LIMIT

speciﬁcation.

I. I_DSS1is the worst case OFF state leakage speciﬁcation at 80% of BV_DSSand maximum operating junction

temperature. I_DSS2is a typical speciﬁcation under worst case application conditions (rectiﬁed 265 VAC) for no-load

consumption calculations.

J. Breakdown voltage may be checked against minimum BV_DSSspeciﬁcation by ramping the DRAIN pin voltage up

to but not exceeding minimum BV_DSS

K. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to

frequency).

2/06

TNY274-280

470 Ω

5 W

470 Ω

2 MΩ

BP/M

50 V

EN/UV

10 V

150 V

0.1 µF

NOTE: This test circuit is not applicable for current limit or output characteristic measurements.

PI-4079-080905

Figure 16. General Test Circuit.

(internal signal)

MAX

EN/UV

DRAIN

t_P

f_OSC

PI-2364-012699

Figure 18. Output Enable Timing.

Figure 17. Duty Cycle Measurement.

0.8

Figure 19. Current Limit Envelope.

2/06

TNY274-280

Typical Performance Characteristics

1.2

1.0

0.8

0.6

0.4

0.2

1.1

1.0

0.9

-50 -25

50 75 100 125

-50 -25

25 50 75 100 125 150

Junction Temperature (°C)

Figure 21. Frequency vs. Temperature.

Figure 20. Breakdown vs. Temperature.

1.2

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.8

Normalized

di/dt = 1

TNY274

TNY275

TNY276

TNY277

TNY278 110 mA/µs

TNY279 130 mA/µs

TNY280 150 mA/µs

50 mA/µs

55 mA/µs

70 mA/µs

90 mA/µs

0.6

0.4

0.2

Note: For the

normalized current

limit value, use the

typical current limit

specified for the

appropriate BP/M

capacitor.

-50

100

150

Temperature (°C)

Normalized di/dt

Figure 22. Standard Current Limit vs. Temperature.

Figure 23. Current Limit vs. di/dt.

300

1000

Scaling Factors:

TNY274 1.0

250

TNY275 1.5

TNY276 2.0

TNY277 3.5

TNY278 5.5

TNY279 7.3

200

100

Scaling Factors:

TNY274 1.0

TNY275 1.5

TNY276 2.0

TNY277 3.5

TNY278 5.5

TNY279 7.3

TNY280 11

150

100

T_CASE=25 °C

T_CASE=100 °C

100 200 300 400 500 600

DRAIN Voltage (V)

Figure 24. Output Characteristic.

Drain Voltage (V)

Figure 25. C_OSSvs. Drain Voltage.

2/06

TNY274-280

Typical Performance Characteristics (cont.)

1.2

1.0

Scaling Factors:

TNY274 1.0

TNY275 1.5

TNY276 2.0

TNY277 3.5

TNY278 5.5

TNY279 7.3

TNY280 11

0.8

0.6

0.4

0.2

-50 -25

Junction Temperature (°C)

Figure 27. Under-Voltage Threshold vs. Temperature.

25 50 75 100 125

200

400

600

DRAIN Voltage (V)

Figure 26. Drain Capacitance Power.

2/06

TNY274-280

PART ORDERING INFORMATION

TinySwitch Product Family

Series Number

Package Identiﬁer

Plastic Surface Mount SMD-8C

Plastic DIP-8C

Lead Finish

Pure Matte Tin (Pb-Free)

Tape & Reel and Other Options

Blank Standard Conﬁgurations

Tape & Reel, 1000 pcs min./mult., G Package only

TNY 278 G N - TL

DIP-8C

⊕

D S .004 (.10)

Notes:

-E-

1. Package dimensions conform to JEDEC specification

MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)

package with .300 inch row spacing.

2. Controlling dimensions are inches. Millimeter sizes are

shown in parentheses.

.240 (6.10)

.260 (6.60)

3. Dimensions shown do not include mold flash or other

protrusions. Mold flash or protrusions shall not exceed

.006 (.15) on any side.

4. Pin locations start with Pin 1, and continue counter-clock-

wise to Pin 8 when viewed from the top. The notch and/or

dimple are aids in locating Pin 1. Pin 3 is omitted.

5. Minimum metal to metal spacing at the package body for

the omitted lead location is .137 inch (3.48 mm).

6. Lead width measured at package body.

Pin 1

-D-

.367 (9.32)

.387 (9.83)

7. Lead spacing measured with the leads constrained to be

perpendicular to plane T.

.057 (1.45)

.068 (1.73)

(NOTE 6)

.125 (3.18)

.145 (3.68)

.015 (.38)

MINIMUM

-T-

SEATING

PLANE

.008 (.20)

.015 (.38)

.120 (3.05)

.140 (3.56)

.300 (7.62) BSC

(NOTE 7)

.100 (2.54) BSC

.048 (1.22)

.053 (1.35)

.137 (3.48)

MINIMUM

P08C

.300 (7.62)

.390 (9.91)

.014 (.36)

.022 (.56)

⊕

T E D S .010 (.25) M

PI-3933-100504

2/06

TNY274-280

SMD-8C

Notes:

⊕

D S .004 (.10)

.046 .060 .060 .046

1. Controlling dimensions are

inches. Millimeter sizes are

shown in parentheses.

2. Dimensions shown do not

include mold flash or other

protrusions. Mold flash or

protrusions shall not exceed

.006 (.15) on any side.

3. Pin locations start with Pin 1,

and continue counter-clock-

wise to Pin 8 when viewed

from the top. Pin 3 is omitted.

4. Minimum metal to metal

spacing at the package body

for the omitted lead location

is .137 inch (3.48 mm).

5. Lead width measured at

package body.

-E-

.080

.086

.186

.286

.372 (9.45)

.388 (9.86)

.010 (.25)

E S

.240 (6.10)

.260 (6.60)

.420

⊕

Pin 1

.137 (3.48)

MINIMUM

Solder Pad Dimensions

.100 (2.54) (BSC)

6. D and E are referenced

datums on the package

body.

.367 (9.32)

.387 (9.83)

-D-

.057 (1.45)

.068 (1.73)

(NOTE 5)

.125 (3.18)

.145 (3.68)

.004 (.10)

.032 (.81)

.037 (.94)

.048 (1.22)

.053 (1.35)

.009 (.23)

0 - 8

.036 (0.91)

.044 (1.12)

.004 (.10)

.012 (.30)

G08C

PI-4015-013106

2/06

TNY274-280

2/06

TNY274-280

Revision Notes

Date

1/06

Release ﬁnal data sheet.

Corrected ﬁgure numbers and references.

2/06

For the latest updates, visit our website: www.powerint.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume

any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY

DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A

PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.

PATENT INFORMATION

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S.

and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrationsʼ patents

may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.

LIFE SUPPORT POLICY

POWER INTEGRATIONSʼ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform,

when properly used in accordance with instructions for use, can be reasonably expected to result in signiﬁcant injury or death to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, Clampless, E-Shield, Filterfuse,

PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.

Power Integrations Worldwide Sales Support Locations

JAPAN

WORLD HEADQUARTERS

5245 Hellyer Avenue

San Jose, CA 95138, USA.

Main: +1-408-414-9200

Customer Service:

Phone: +1-408-414-9665

Fax: +1-408-414-9765

e-mail: usasales@powerint.com

GERMANY

Rueckertstrasse 3

D-80336, Munich

Germany

Phone: +49-89-5527-3910

Fax: +49-89-5527-3920

e-mail: eurosales@powerint.com

TAIWAN

5F, No. 318, Nei Hu Rd., Sec. 1

Nei Hu Dist.

Taipei, Taiwan 114, R.O.C.

Phone: +886-2-2659-4570

Fax: +886-2-2659-4550

e-mail: taiwansales@powerint.com

Keihin Tatemono 1st Bldg 2-12-20

Shin-Yokohama, Kohoku-ku,

Yokohama-shi, Kanagawa ken,

Japan 222-0033

Phone: +81-45-471-1021

Fax: +81-45-471-3717

e-mail: japansales@powerint.com

KOREA

RM 602, 6FL

CHINA (SHANGHAI)

Rm 807-808A

Pacheer Commercial Centre,

555 Nanjing Rd. West

Shanghai, P.R.C. 200041

Phone: +86-21-6215-5548

Fax: +86-21-6215-2468

e-mail: chinasales@powerint.com

INDIA

EUROPE HQ

1st Floor, St. Jamesʼs House

East Street, Farnham

Surrey GU9 7TJ

United Kingdom

Phone: +44 (0) 1252-730-140

Fax: +44 (0) 1252-727-689

e-mail: eurosales@powerint.com

261/A, Ground Floor

7th Main, 17th Cross,

Sadashivanagar

Bangalore, India 560080

Phone: +91-80-5113-8020

Fax: +91-80-5113-8023

e-mail: indiasales@powerint.com

Korea City Air Terminal B/D, 159-6

Samsung-Dong, Kangnam-Gu,

Seoul, 135-728, Korea

Phone: +82-2-2016-6610

Fax: +82-2-2016-6630

e-mail: koreasales@powerint.com

SINGAPORE

CHINA (SHENZHEN)

ITALY

APPLICATIONS HOTLINE

51 Newton Road

#15-08/10 Goldhill Plaza

Singapore, 308900

Phone: +65-6358-2160

Fax: +65-6358-2015

e-mail: singaporesales@powerint.com

Rm 2206-2207, Block A,

Electronics Science & Technology Bldg.

2070 Shennan Zhong Rd.

Shenzhen, Guangdong,

Via Vittorio Veneto 12

20091 Bresso MI

Italy

Phone: +39-028-928-6000

Fax: +39-028-928-6009

e-mail: eurosales@powerint.com

World Wide +1-408-414-9660

APPLICATIONS FAX

World Wide +1-408-414-9760

China, 518031

Phone: +86-755-8379-3243

Fax: +86-755-8379-5828

e-mail: chinasales@powerint.com

2/06

TNY277PN相关文章

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TNY277PN产品参数

型号:	TNY277PN
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	POWER INTEGRATIONS INC
零件包装代码：	DIP
包装说明：	DIP, DIP7/8,.3
针数：	8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	14 weeks
风险等级：	0.87
Samacsys Confidence：	4
Samacsys Status：	Released
Samacsys PartID：	532717
Samacsys Pin Count：	8
Samacsys Part Category：	Power Supply
Samacsys Package Category：	Dual-In-Line Packages
Samacsys Footprint Name：	PDIP-8C (P Package)_1
Samacsys Released Date：	2017-09-02 09:36:16
Is Samacsys：	N
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	2.6 V
最小输入电压：	1.8 V
标称输入电压：	2.2 V
JESD-30 代码：	R-PDIP-T7
JESD-609代码：	e3
长度：	9.575 mm
功能数量：	1
端子数量：	7
最高工作温度：	125 °C
最低工作温度：	-40 °C
最大输出电流：	0.481 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	DIP7/8,.3
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
子类别：	Power Management Circuits
最大供电电流 (Isup)：	0.46 mA
表面贴装：	NO
切换器配置：	SINGLE
最大切换频率：	140 kHz
温度等级：	AUTOMOTIVE
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm
Base Number Matches：	1

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