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产品型号TOP202YAI的概述

芯片TOP202YAI概述 TOP202YAI是一款高集成度的电源管理芯片，广泛应用于开关电源（SMPS）和LED驱动等多个领域。该芯片的设计主要目标是提供一个高效、可靠的解决方案，以满足现代电子产品对体积、效率和功能性日益增长的需求。TOP202YAI在实现高效能的同时，也具备若干保护机制，确保其在各种工作条件下的安全性和稳定性。芯片结构紧凑，集成了多个功能模块，包括高压启动、反馈控制和过载保护等，这使得用户在设计电源的时候，能在较小的地板面积上实现更高的性能。此外，TOP202YAI通过使用先进的制造工艺，确保了其在工作时的电源转换效率，最大限度地减少了热量的产生。详细参数 TOP202YAI的主要参数包括： - 输入电压范围：8V至32V - 输出功率：最高可达20W - 开关频率：约100kHz - 典型效率：高达85% - 90% - 输出电流：最高可支持6A - 起始电...

产品型号TOP202YAI的Datasheet PDF文件预览

TOP200-4/14

TOPSwitch^®Family

Three-terminal Off-line PWM Switch

Product Highlights

Low Cost Replacement for Discrete Switchers

• 20 to 50 fewer components - cuts cost, increases reliability

• Source-connected tab and Controlled MOSFET turn-on

reduce EMI and EMI filter costs

• Allows for a 50% smaller and lighter solution

• Cost competitive with linears above 5 W

Up to 90% Efficiency in Flyback Topology

• Built-in start-up and current limit reduce DC losses

• Low capacitance 700 V MOSFET cuts AC losses

• CMOS controller/gate driver consumes only 6 mW

• 70% maximum duty cycle minimizes conduction losses

DRAIN

SOURCE

CONTROL

TOPSwitch

Simplifies Design - Reduces Time to Market

• Supported by many reference design boards

• Integrated PWM Controller and 700 V MOSFET in a

industry standard three pin TO-220 package

PI-1703-112995

Figure 1. Typical Application.

• Only one external capacitor needed for compensation,

bypass and start-up/auto-restart functions

TOPSwitch SELECTION GUIDE

OUTPUT POWER RANGE

System Level Fault Protection Features

• Auto-restart and cycle by cycle current limiting functions

handle both primary and secondary faults

• On-chip latching thermal shutdown protects the entire

system against overload

ORDER

PART

NUMBER

PFC/

FLYBACK

BOOST

230 VAC or

110 VAC

w/Doubler

85-265

VAC

230/277

VAC

Highly Versatile

TOP200YAI*

TOP201YAI*

TOP202YAI*

TOP203YAI*

TOP214YAI*

TOP204YAI*

0-25 W

0-12 W

0-25 W

20-50 W

30-75 W

• Implements Buck, Boost, Flyback or Forward topology

• Easily interfaces with both opto and primary feedback

• Supports continuous or discontinuous mode of operation

20-45 W 10-22 W

30-60 W 15-30 W

Description

40-70 W 20-35 W 50-100 W

50-85 W 25-42 W 60-125 W

60-100 W 30-50 W 75-150 W

The TOPSwitch family implements, with only three pins, all

functions necessary for an off-line switched mode control

system:highvoltageN-channelpowerMOSFETwithcontrolled

turn-on gate driver, voltage mode PWM controller with

integrated 100 kHz oscillator, high voltage start-up bias circuit,

bandgap derived reference, bias shunt regulator/error amplifier

forloopcompensationandfaultprotectioncircuitry. Compared

to discrete MOSFET and controller or self oscillating (RCC)

switching converter solutions, a TOPSwitch integrated circuit

can reduce total cost, component count, size, weight and at the

same time increase efficiency and system reliability. These

* Package Outline: Y03A

devices are intended for 100/110/230 VAC off-line Power

Supply applications in the 0 to 100 W (0 to 50 W universal)

range and 230/277 VAC off-line power factor correction (PFC)

applications in the 0 to 150 W range.

July 1996

TOP200-4/14

CONTROL

DRAIN

INTERNAL

SUPPLY

SHUTDOWN/

AUTO-RESTART

SHUNT REGULATOR/

ERROR AMPLIFIER

÷ 8

5.7 V

4.7 V

5.7 V

POWER-UP

RESET

EXTERNALLY

TRIGGERED

SHUTDOWN

LIMIT

THERMAL

SHUTDOWN

CONTROLLED

TURN-ON

GATE

DRIVER

OSCILLATOR

MAX

CLOCK

SAW

LEADING

EDGE

BLANKING

PWM

COMPARATOR

MINIMUM

ON-TIME

DELAY

SOURCE

PI-1746-011796

Figure 2. Functional Block Diagram.

Pin Functional Description

DRAIN Pin:

Output MOSFET drain connection. Provides internal bias

current during start-up operation via an internal switched high-

voltage current source. Internal current sense point.

DRAIN

CONTROL Pin:

SOURCE (TAB)

CONTROL

Error amplifier and feedback current input pin for duty cycle

control. Internal shunt regulator connection to provide internal

biascurrentduringnormaloperation. Triggerinputforlatching

shutdown. It is also used as the supply bypass and auto-restart/

compensation capacitor connection point.

TO-220/3 (YO3A)

PI-1065A-110194

SOURCE Pin:

Output MOSFET source connection. Primary-side circuit

common, power return, and reference point.

Figure 3. Pin Configuration.

7/96

TOP200-4/14

TOPSwitch Family Functional Description

TOPSwitchisaselfbiasedandprotected

linear control current-to-duty cycle

converter with an open drain output.

High efficiency is achieved through the

Auto-restart

MAX

use of CMOS and integration of the

Slope = PWM Gain

-16%/mA

maximumnumberoffunctionspossible.

CMOS significantly reduces bias

currents as compared to bipolar or

discretesolutions. Integrationeliminates

externalpowerresistorsusedforcurrent

sensing and/or supplying initial start-up

bias current.

MIN

During normal operation, the internal

output MOSFET duty cycle linearly

decreases with increasing CONTROL

pin current as shown in Figure 4. To

implement all the required control, bias,

and protection functions, the DRAIN

and CONTROL pins each perform

several functions as described below.

Refer to Figure 2 for a block diagram

and Figure 6 for timing and voltage

waveformsoftheTOPSwitchintegrated

circuit.

2.5

6.5

CD1

(mA)

PI-1691-112895

Figure 4. Relationship of Duty Cycle to CONTROL Pin Current.

Charging C

5.7 V

4.7 V

Control Voltage Supply

CONTROL pin voltage V_Cis the supply

or bias voltage for the controller and

driver circuitry. An external bypass

capacitorcloselyconnectedbetweenthe

CONTROL and SOURCE pins is

requiredtosupplythegatedrivecurrent.

The total amount of capacitance

connected to this pin (C_T) also sets the

auto-restart timing as well as control

loop compensation. V_Cis regulated in

either of two modes of operation.

Hysteretic regulation is used for initial

start-up and overload operation. Shunt

regulation is used to separate the duty

cycleerrorsignalfromthecontrolcircuit

supply current. During start-up, V_C

current is supplied from a high-voltage

switched current source connected

internally between the DRAIN and

CONTROL pins. The current source

provides sufficient current to supply the

control circuitry as well as charge the

total external capacitance (C_T).

Off

DRAIN

Switching

(a)

CD2

Discharging C

CD1

Discharging C

Charging C

5.7 V

4.7 V

8 Cycles

95%

Off

DRAIN

Switching

(b)

C is the total external capacitance

connected to the CONTROL pin

PI-1124A-060694

Figure 5. Start-up Waveforms for (a) Normal Operation and (b) Auto-restart.

7/96

TOP200-4/14

TOPSwitch Family Functional Description (cont.)

The first time V_Creaches the upper

threshold, the high-voltage current

source is turned off and the PWM

modulator and output transistor are

activated, as shown in Figure 5(a).

During normal operation (when the

output voltage is regulated) feedback

control current supplies the V_Csupply

current. The shunt regulator keeps V_Cat

typically 5.7 V by shunting CONTROL

pin feedback current exceeding the

required DC supply current through the

PWMerrorsignalsenseresistorR_E. The

low dynamic impedance of this pin (Z_C)

sets the gain of the error amplifier when

Bandgap Reference

Gate Driver

All criticalTOPSwitchinternal voltages

are derived from a temperature-

compensated bandgap reference. This

reference is also used to generate a

temperature-compensatedcurrentsource

which is trimmed to accurately set the

oscillator frequency and MOSFET gate

drive current.

The gate driver is designed to turn the

output MOSFET on at a controlled rate

to minimize common-mode EMI. The

gate drive current is trimmed for

improved accuracy.

Error Amplifier

Theshuntregulatorcanalsoperformthe

function of an error amplifier in primary

feedback applications. The shunt

regulator voltage is accurately derived

from the temperature compensated

bandgapreference. Thegainoftheerror

amplifier is set by the CONTROL pin

dynamic impedance. The CONTROL

pin clamps external circuit signals to the

V_Cvoltage level. The CONTROL pin

current in excess of the supply current is

separated by the shunt regulator and

flows through R_Eas the error signal.

Oscillator

The internal oscillator linearly charges

and discharges the internal capacitance

between two voltage levels to create a

sawtooth waveform for the pulse width

modulator. The oscillator sets the pulse

width modulator/current limit latch at

thebeginningofeachcycle. Thenominal

frequency of 100 kHz was chosen to

minimize EMI and maximize efficiency

inpowersupplyapplications. Trimming

of the current reference improves

oscillator frequency accuracy.

used in

primary feedback

configuration. The dynamic impedance

of the CONTROL pin together with the

external resistance and capacitance

determines the control loop

compensation of the power system.

If the CONTROL pin external

capacitance (C_T) shoulddischarge tothe

lower threshold, then the output

MOSFET is turned off and the control

circuitisplacedinalow-currentstandby

mode. The high-voltage current source

is turned on and charges the external

capacitance again. Charging current is

shown with a negative polarity and

discharging current is shown with a

positive polarity in Figure 6. The

hystereticauto-restartcomparatorkeeps

V_Cwithin a window of typically 4.7 to

5.7Vbyturningthehigh-voltagecurrent

source on and off as shown in Figure

5(b). Theauto-restartcircuithasadivide-

by-8 counter which prevents the output

MOSFET from turning on again until

eight discharge-charge cycles have

elapsed. The counter effectively limits

TOPSwitch power dissipation by

reducing the auto-restart duty cycle to

typically 5%. Auto-restart continues to

cycle until output voltage regulation is

again achieved.

Cycle-By-Cycle Current Limit

The cycle by cycle peak drain current

limit circuit uses the output MOSFET

ON-resistance as a sense resistor. A

current limit comparator compares the

output MOSFET ON-state drain-source

voltage,V_DS(ON),withathresholdvoltage.

High drain current causes V_DS(ON)to

exceed the threshold voltage and turns

the output MOSFET off until the start of

the next clock cycle. The current limit

comparator threshold voltage is

temperature compensated to minimize

variation of the effective peak current

limit due to temperature related changes

Pulse Width Modulator

The pulse width modulator implements

a voltage-mode control loop by driving

the output MOSFET with a duty cycle

inversely proportional to the current

flowing into the CONTROL pin. The

error signal across R_Eis filtered by an

RC network with a typical corner

frequency of 7 kHz to reduce the effect

of switching noise. The filtered error

signal is compared with the internal

oscillatorsawtoothwaveformtogenerate

thedutycyclewaveform. Asthecontrol

current increases, the duty cycle

decreases. A clock signal from the

oscillator sets a latch which turns on the

output MOSFET. The pulse width

modulator resets the latch, turning off

the output MOSFET. The maximum

duty cycle is set by the symmetry of the

internal oscillator. The modulator has a

minimum ON-time to keep the current

consumption of the TOPSwitch

independent of the error signal. Note

that a minimum current must be driven

into the CONTROL pin before the duty

cycle begins to change.

in output MOSFET R_DS(ON)

Theleadingedgeblankingcircuitinhibits

the current limit comparator for a short

time after the output MOSFET is turned

on. The leading edge blanking time has

been set so that current spikes caused by

primary-side capacitances and

secondary-siderectifierreverserecovery

time will not cause premature

termination of the switching pulse.

7/96

TOP200-4/14

DRAIN

OUT

• • •

C(reset)

45 mA

PI-1119-110194

Figure 6. Typical Waveforms for (1) Normal Operation, (2) Auto-restart, (3) Latching Shutdown, and (4) Power Down Reset.

Shutdown/Auto-restart

removing and restoring input power, or

momentarilypullingtheCONTROLpin

belowthepower-upresetthresholdresets

the latch and allows TOPSwitch to

resume normal power supply operation.

V_Cis regulated in hysteretic mode when

the power supply is latched off.

High-voltage Bias Current Source

This current source biases TOPSwitch

from the DRAIN pin and charges the

CONTROL pin external capacitance

(C_T) during start-up or hysteretic

operation. Hysteretic operation occurs

during auto-restart and latched

shutdown. Thecurrentsourceisswitched

onandoffwithaneffectivedutycycleof

approximately 35%. This duty cycle is

determined by the ratio of CONTROL

pin charge (I_C) and discharge currents

(I_CD1and I_CD2). This current source is

turnedoffduringnormaloperationwhen

the output MOSFET is switching.

To minimize TOPSwitch power

dissipation, the shutdown/auto-restart

circuit turnsthe power supplyonandoff

at a duty cycle of typically 5% if an out

of regulation condition persists. Loss of

regulationinterruptstheexternalcurrent

into the CONTROL pin. V_Cregulation

changes from shunt mode to the

hysteretic auto-restart mode described

above. When the fault condition is

removed, the power supply output

becomesregulated,V_Cregulationreturns

to shunt mode, and normal operation of

the power supply resumes.

Overtemperature Protection

Temperature protection is provided by a

precision analog circuit that turns the

output MOSFET off when the junction

temperature exceeds the thermal

shutdowntemperature(typically145°C).

Activating the power-up reset circuit by

removing and restoring input power or

momentarilypullingtheCONTROLpin

belowthepower-upresetthresholdresets

the latch and allows TOPSwitch to

resume normal power supply operation.

V_Cis regulated in hysteretic mode when

the power supply is latched off.

Latching Shutdown

The output overvoltage protection latch

is activated by a high-current pulse into

the CONTROL pin. When set, the latch

turns off the TOPSwitch output.

Activating the power-up reset circuit by

7/96

TOP200-4/14

General Circuit Operation

Primary Feedback Regulation

the integrated high-voltage MOSFET

transistor within the TOP200 (U1). The

circuitoperatesataswitchingfrequency

of 100 kHz, set by the internal oscillator

of the TOP200. The clamp circuit

implemented by VR1 and D1 limits the

leading-edge voltage spike caused by

transformerleakageinductancetoasafe

value. The5Vpowersecondarywinding

is rectified and filtered by D2, C2, C3,

and L1 to create the 5 V output voltage.

current will flow into the control pin.

Increasing control pin current decreases

the duty cycle until a stable operating

point is reached. The output voltage is

proportional to the bias voltage by the

turnsratio oftheoutputtobiaswindings.

C5isusedtobypasstheCONTROLpin.

C5 also provides loop compensation for

the power supply by shunting AC

currents around the CONTROL pin

dynamicimpedance,andalsodetermines

the auto-restart frequency during start-

up and auto-restart conditions. See DN-

8formoreinformationregardingtheuse

of the TOP200 in bias supplies.

The circuit shown in Figure 7 is a simple

5 V, 5 W bias supply using the TOP200.

This universal input flyback power

supplyemploysprimary-sideregulation

from a transformer bias winding. This

approachisbestforlow-costapplications

requiring isolation and operation within

a narrow range of load variation. Line

and load regulation of±5% or better can

be achieved from 10% to 100% of rated

load.

The output of the T1 bias winding is

rectified and filtered by D3, R1, and C5.

The voltage across C5 is regulated by

U1, and is determined by the 5.7 V

internal shunt regulator at the

CONTROL pin of U1. When the

rectified bias voltage on C5 begins to

exceed the shunt regulator voltage,

Voltage feedback is obtained from the

transformer (T1) bias winding, which

eliminates the need for optocoupler and

secondary-referenced error amplifier.

High-voltage DC is applied to the

primary winding of T1. The other side

of the transformer primary is driven by

1N5822

(Bead)

5 V

VR1

1N4764

330 µF

25 V

150 µF

25 V

RTN

UF4005

1N4148

INPUT

CIRCUIT PERFORMANCE:

Load Regulation - ±4%

(10% to 100%)

Line Regulation - ±1.5%

95 to 370 V DC

47 µF

22 Ω

DRAIN

SOURCE

Ripple Voltage ±25 mV

CONTROL

TOP200YAI

PI-1749-012296

Figure 7. Schematic Diagram of a Minimum Parts Count 5 V, 5 W Bias Supply Utilizing the TOP200.

7/96

TOP200-4/14

UG8BT

3.3 µH

7.5 V

39 Ω

68 Ω

VR1

680 µF

25 V

120 µF

25 V

P6KE150

NEC2501

UF4005

VR2

1N5234B

6.2 V

BR1

400 V

33 µF

400 V

RTN

22 mH

1N4148

CIRCUIT PERFORMANCE:

Line Regulation - ±0.5%

(85-265 VAC)

Load Regulation - ±1%

(10 -100%)

1 nF

0.1 µF

47µF

DRAIN

3.15 A

Ripple Voltage ± 50 mV

Meets CISPR-22 Class B

SOURCE

CONTROL

0.1 µF

TOP202YAI

ST202A REFERENCE DESIGN BOARD

PI-1695-112895

Figure 8. Schematic Diagram of a 15 W Universal Input Power Supply Utilizing the TOP202 and Simple Optocoupler Feedback.

Simple Optocoupler Feedback

currenttransferratio,andtheTOPSwitch

control current to duty cycle transfer

function set the DC control loop gain.

C5togetherwiththecontrolpindynamic

impedance and capacitor ESR establish

a control loop pole-zero pair. C5 also

determines the auto-restart frequency

and filters internal gate drive switching

currents. R2andVR2provideminimum

current loading when output current is

low. See DN-11 for more information

regarding the use of the TOP202 in a

low-cost, 15 W universal power supply.

voltage can be fine tuned by adjusting

the resistor divider formed by R4 and

R5. Other output voltages are possible

by adjusting the transformer turns ratios

as well as the divider ratio.

The circuit shown in Figure 8 is a 7.5 V,

15Wsecondaryregulatedflybackpower

supply using the TOP202 that will

operate from 85 to 265 VAC input

voltage. Improved output voltage

accuracy and regulation over the circuit

of Figure 7 is achieved by using an

optocoupler and secondary referenced

Zener diode. The general operation of

thepowerstageofthiscircuitisthesame

as that described for Figure 7.

The general operation of the input and

power stages of this circuit are the same

as that described for Figures 7 and 8. R3

and C5 tailor frequency response. The

TL431(U2)regulatestheoutputvoltage

by controlling optocoupler LED current

(and TOPSwitchduty cycle) to maintain

anaveragevoltageof 2.5VattheTL431

input pin. Divider R4 and R5 determine

the actual output voltage. C9 rolls off

thehighfrequencygainoftheTL431for

stable operation. R1 limits optocoupler

LED current and determines high

frequency loop gain. For more

information, refer to application note

AN-14.

Theinputvoltageisrectifiedandfiltered

by BR1 and C1. L2, C6 and C7 reduce

conducted emission currents. The bias

winding is rectified and filtered by D3

and C4 to create a typical 11 V bias

voltage. Zener diode (VR2) voltage

together with the forward voltage of the

LED in the optocoupler U2 determine

the output voltage. R1, the optocoupler

Accurate Optocoupler Feedback

The circuit shown in Figure 9 is a highly

accurate, 15 V, 30 W secondary-

regulatedflybackpowersupplythatwill

operate from 85 to 265 VAC input

voltage. A TL431 shunt regulator

directly senses and accurately regulates

the output voltage. The effective output

7/96

TOP200-4/14

3.3 µH

MUR610CT

15 V

200 Ω

1/2 W

120 µF

25 V

VR1

P6KE200

1000 µF

35 V

RTN

47 µF

400 V

BYV26C

1N4148

NEC2501

BR1

400 V

0.1 µF

33 mH

510 Ω

CIRCUIT PERFORMANCE:

Line Regulation - ±0.2%

(85-265 VAC)

Load Regulation - ±0.2%

(10-100%)

49.9 kΩ

0.1 µF

Ripple Voltage ±150 mV

Meets CISPR-22 Class B

47 µF

6.2 Ω

TL431

3.15 A

DRAIN

SOURCE

10 kΩ

CONTROL

1 nF

TOP204YAI

ST204A REFERENCE DESIGN BOARD

PI-1696-112895

Figure 9. Schematic Diagram of a 30 W Universal Input Power Supply Utilizing the TOP204 and Accurate Optocoupler Feedback.

500 µH

MUR460

VR1

IN5386B

1N4935

EMI

FILTER

200 kΩ

VR2

IN5386B

220 nF

400 V

47 µF

BR1

400 V

4.7 µF

3 kΩ

200 Ω

DRAIN

SOURCE

CONTROL

TYPICAL PERFORMANCE:

Power Factor = 0.98

THD = 8%

R10

6.8 kΩ

TOP202YAI

220 µF

RTN

PI-1750-012296

Figure 10. Schematic Diagram of a 65 W 230 VAC Input Boost Power Factor Correction Circuit Utilizing the TOP202.

7/96

TOP200-4/14

General Circuit Operation (cont.)

Boost PFC Pre-regulator

by the boost inductance and parasitic

When power is first applied, C3 charges

to typically 5.7 volts before TOPSwitch

starts. C3 then provides TOPSwitch

bias current until the output voltage

becomes regulated. When the output

voltage becomes regulated, series

connected Zener diodes VR1 and VR2

begin to conduct, drive current into the

TOPSwitch control pin, and directly

control the duty cycle. C3 together with

R3 perform low pass filtering on the

feedback signal to prevent output line

frequency ripple voltage from varying

the duty cycle. For more information,

refer to Design Note DN-7.

TOPSwitch can also be used as a fixed

frequency, discontinuous mode boost

pre-regulator to improve Power Factor

and reduce Total Harmonic Distortion

(THD) for applications such as power

supplies and electronic ballasts. The

circuitshowninFigure10operatesfrom

230VACanddelivers65Wat410VDC

with typical Power Factor over 0.98 and

THD of 8%. Bridge Rectifier BR1 full

wave rectifiesthe AC input voltage. L1,

D1, C4, and TOPSwitch make up the

boost power stage. D2 prevents reverse

current through the TOPSwitch body

diode due to ringing voltages generated

capacitance. R1 generates a pre-

compensation current proportional to

the instantaneous rectified AC input

voltage which directly varies the duty

cycle. C2 filters high frequency

switching currents while having no

filteringeffectonthelinefrequencypre-

compensation current. R2 decouples

the pre-compensation current from the

large filter capacitor C3 to prevent an

averaging effect which would increase

total harmonic distortion. C1 filters

high frequency noise currents which

could cause errors in the pre-

compensation current.

Key Application Issues

KeeptheSOURCEpinlengthveryshort.

UseaKelvinconnectiontotheSOURCE

pin for the CONTROL pin bypass

capacitor. Use single point grounding

techniquesattheSOURCEpinasshown

in Figure 11.

Under some conditions, externally

provided bias or supply current driven

into the CONTROL pin can hold the

TOPSwitch in one of the 8 auto-restart

cycles indefinitely and prevent starting.

Shorting the CONTROL pin to the

SOURCE pin will reset the TOPSwitch.

Toavoidthisproblemwhendoingbench

evaluations, it is recommended that the

V_Cpowersupplybe turnedonbefore the

DRAIN voltage is applied.

Short interruptions of AC power may

cause TOPSwitch to enter the 8-count

auto-restart cycle before starting again.

This is because the input energy storage

capacitorsarenotcompletelydischarged

and the CONTROL pin capacitance has

not discharged below the pin internal

power-up reset voltage.

Minimize peak voltage and ringing on

the DRAIN voltage at turn-off. Use a

Zener or TVS Zener diode to clamp the

DRAIN voltage.

In some cases, minimum loading may

be necessary to keep a lightly loaded or

unloaded output voltage within the

desired range due to the minimum ON-

time.

Do not plug the TOPSwitch device into

a “hot” IC socket during test. External

CONTROLpincapacitancemaydeliver

a surge current sufficient to trigger the

shutdown latch which turns the

TOPSwitch off.

CONTROL pin currents during auto-

restart operation are much lower at low

input voltages (< 20 V) which increases

the auto-restart cycle period (see the I_C

vs. Drain Voltage Characteristic curve).

For additional applications information

regarding the TOPSwitch family, refer

to AN-14.

Bias/Feedback

Return

High Voltage

Return

Kelvin-connected

bypass capacitor

and/or compensation network

Do not bend SOURCE pin

Keep it short

Bend DRAIN pin

forward if needed

for creepage

PC Board

Bias/Feedback

Input

High-voltage Return

Bypass

Capacitor

Bias/Feedback Input

Bias/Feedback Return

TOP VIEW

PI-1240-110194

Figure 11. Recommended TOPSwitch Layout.

7/96

TOP200-4/14

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

DRAIN Voltage ............................................ -0.3 to 700 V

CONTROL Voltage ..................................... - 0.3 V to 9 V

Storage Temperature ...................................... -65 to 125°C

Operating Junction Temperature⁽²⁾................. -40 to 150°C

Lead Temperature⁽³⁾................................................. 260°C

Thermal Impedance (θ_JA) ...................................... 70°C/W

Thermal Impedance (θ_JC)⁽⁴⁾.................................... 2 °C/W

1. Unless noted, all voltages referenced to SOURCE,

T_A= 25°C.

2. Normally limited by internal circuitry.

3. 1/16" from case for 5 seconds.

4. Measured at tab closest to plastic interface.

Conditions

(Unless Otherwise Specified)

Min

Typ Max

Parameter

Symbol

See Figure 14

Units

SOURCE = 0 V

T_j= -40 to 125°C

CONTROL FUNCTIONS

Output

f_OSC

I_C= 4 mA, T_j= 25˚C

100

110

kHz

Frequency

Maximum

Duty Cycle

DC_MAX

I_C= I_CD1+ 0.5 mA, See Figure 12

I_C= 10 mA,

TOP200/1/2

1.0

1.8

2.0

3.0

3.5

Minimum

Duty Cycle

DC_MIN

See Figure 12

TOP203/4/14

I_C= 4 mA, T_j= 25˚C

PWM

Gain

-11

-16

-0.05

2.5

-21

%/mA

%/mA/˚C

See Figure 4

PWM Gain

Temperature Drift

See Note 1

External

Bias Current

1.5

I_B

See Figure 4

I_C= 4 mA, T_j= 25˚C

See Figure 13

Dynamic

Impedance

Z_C

Ω

Dynamic Impedance

Temperature Drift

0.18

%/˚C

SHUTDOWN/AUTO-RESTART

-2.4

-2

-1.9

-1.5

-1.2

-0.8

V_C= 0 V

V_C= 5 V

CONTROL Pin

T_j= 25˚C

See Note 1

S1 open

I_C

%/˚C

Charging Current

Temperature Drift

0.4

5.7

Auto-restart

Threshold Voltage

V_C(AR)

7/96

TOP200-4/14

Conditions

(Unless Otherwise Specified)

See Figure 14

Parameter

Symbol

Min

Typ Max

Units

SOURCE = 0 V

T_j= -40 to 125°C

SHUTDOWN/AUTO-RESTART (cont.)

UV Lockout

S1 open

4.7

1.0

Threshold Voltage

Auto-restart

Hysteresis Voltage

0.6

Auto-restart

Duty Cycle

Auto-restart

Frequency

1.2

CIRCUIT PROTECTION

TOP200

0.415

0.830

1.25

1.50

1.88

2.25

0.585

1.17

1.75

2.10

2.63

3.15

di/dt = 80 mA/µs, T_j= 25˚C

TOP201

di/dt = 170 mA/µs, T_j= 25˚C

TOP202

di/dt = 250 mA/µs, T_j= 25˚C

TOP203

Self-protection

Current Limit

I_LIMIT

di/dt = 330 mA/µs, T_j= 25˚C

TOP214

di/dt = 420 mA/µs, T_j= 25˚C

TOP204

di/dt = 500 mA/µs, T_j= 25˚C

Leading Edge

Blanking Time

I_C= 4 mA

150

100

145

t_LEB

Current Limit

Delay

t_ILD

Thermal Shutdown

Temperature

I_C= 4 mA

125

°C

Latched Shutdown

Trigger Current

See Figure 13

S2 open

I_SD

Power-up Reset

Threshold Voltage

2.0

3.3

4.2

V_C(RESET)

7/96

TOP200-4/14

Conditions

(Unless Otherwise Specified)

See Figure 14

Parameter

OUTPUT

Symbol

Min

Typ Max

Units

SOURCE = 0 V

T_j= -40 to 125°C

TOP200

I_D= 50 mA

TOP201

T_j= 25°C

15.6

25.7

7.8

12.9

5.2

8.6

3.9

6.4

3.1

5.2

2.6

4.3

18.0

29.7

9.0

14.9

6.0

9.9

4.5

7.5

3.6

6.0

3.0

5.0

T_j= 100°C

T_j= 25°C

T_j= 100°C

T_j= 25°C

T_j= 100°C

T_j= 25°C

T_j= 100°C

T_j= 25°C

T_j= 100°C

T_j= 25°C

T_j= 100°C

I_D= 100 mA

TOP202

I_D= 150 mA

TOP203

ON-State

Resistance

R_DS(ON)

Ω

I_D= 200 mA

TOP214

I_D= 250 mA

TOP204

I_D= 300 mA

Device in Latched Shutdown

I_C= 4 mA, V_DS= 560 V, T_A= 125°C

Device in Latched Shutdown

I_C= 4 mA, I_D= 500 µA, T_A= 25°C

Measured With

OFF-State

Current

I_DSS

µA

500

Breakdown

Voltage

BV_DSS

700

Rise

Time

t_r

t_f

100

Figure 8 Schematic

Measured With

Fall

Time

Figure 8 Schematic

SUPPLY

DRAIN Supply

Voltage

See Note 2

I_C= 4 mA

Shunt Regulator

Voltage

V_C(SHUNT)

5.5

5.8

6.1

Shunt Regulator

Temperature Drift

ppm/˚C

±50

Output

TOP200/1/2

0.6

0.7

1.2

1.4

1.6

1.8

I_CD1

I_CD2

MOSFET enabled

TOP203/4/14

CONTROL Supply/

Discharge Current

Output MOSFET Disabled

0.5

0.8

1.1

7/96

TOP200-4/14

NOTES:

1. For specifications with negative values, a negative temperature coefficient corresponds to an increase in

magnitude with increasing temperature, and a positive temperature coefficient corresponds to a decrease in

magnitude with increasing temperature.

2. It is possible to start up and operate TOPSwitch at DRAIN voltages well below 36 V. However, the CONTROL pin

charging current is reduced, which affects start-up time and auto-restart frequency and duty cycle. Refer to the

characteristic graph on CONTROL pin charge current (I_C) vs. DRAIN voltage for low voltage operation

characteristics.

TYPICAL CONTROL PIN I-V CHARACTERISTIC

120

100

Latched Shutdown

Trigger Current (45 mA)

90%

DRAIN

VOLTAGE

Dynamic

Impedance

DC =

Slope

10%

0 V

PI-1215-091794

CONTROL Pin Voltage (V)

Figure 12. TOPSwitch Duty Cycle Measurement.

Figure 13. TOPSwitch CONTROL Pin I-V Characteristic.

470 Ω

5 W

DRAIN

SOURCE

470 Ω

CONTROL

TOPSwitch

40 V

0.1 µF

47 µF

0-50 V

NOTE: This test circuit is not applicable for current limit or output characteristic measurements.

PI-1126-041994

Figure 14. TOPSwitch General Test Circuit.

7/96

TOP200-4/14

BENCH TEST PRECAUTIONS FOR EVALUATION OF ELECTRICAL CHARACTERISTICS

The following precautions should be

followed when testing TOPSwitch by

itself outside of a power supply. The

schematic shown in Figure 14 is

suggested for laboratory testing of

TOPSwitch.

Thecontrolpinvoltagewillbeoscillating

at a low frequency from 4.7 to 5.7 V and

the DRAIN is turned on every eighth

cycle of the CONTROL pin oscillation.

If the CONTROL pin power supply is

turnedonwhileinthisauto-restartmode,

there is only a 12.5% chance that the

control pin oscillation will be in the

correct state (DRAIN active state) so

that the continuous DRAIN voltage

waveform may be observed. It is

recommended that the V_Cpower supply be

turnedonfirstandtheDRAINpowersupply

second if continuous drain voltage

waveforms are to be observed. The 12.5%

chance of being in the correct state is due to

the 8:1 counter.

When the DRAIN supply is turned on,

the part will be in the auto-restart mode.

Typical Performance Characteristics

BREAKDOWN vs. TEMPERATURE

FREQUENCY vs. TEMPERATURE

1.1

1.2

1.0

0.8

0.6

0.4

0.2

1.0

0.9

-50 -25

25 50 75 100 125 150

-50 -25

25 50 75 100 125 150

Junction Temperature (°C)

CURRENT LIMIT vs. TEMPERATURE

I vs. DRAIN VOLTAGE

1.2

= 5 V

1.0

0.8

0.6

0.4

0.2

1.6

1.2

0.8

0.4

-50 -25

25 50 75 100 125 150

100

Junction Temperature (°C)

Drain Voltage (V)

7/96

TOP200-4/14

Typical Performance Characteristics (cont.)

OUTPUT CHARACTERISTICS

vs. DRAIN VOLTAGE

OSS

1000

TCASE=25˚C

TCASE=100˚C

Scaling Factors:

TOP204 1.00

TOP214 0.83

TOP203 0.67

TOP202 0.50

TOP201 0.33

TOP200 0.17

100

Scaling Factors:

TOP204 1.00

TOP214 0.83

TOP203 0.67

TOP202 0.50

TOP201 0.33

TOP200 0.17

200

400

600

Drain Voltage (V)

DRAIN Voltage (V)

DRAIN CAPACITANCE POWER

500

Scaling Factors:

TOP204 1.00

400

TOP214 0.83

TOP203 0.67

TOP202 0.50

TOP201 0.33

TOP200 0.17

300

200

100

200

400

600

DRAIN Voltage (V)

7/96

TOP200-4/14

Y03A

Plastic TO-220/3

DIM

inches

11.68-12.19

10.16-10.54

5.99-6.60

6.10 - REF.

13.21-14.22

.71-.97

.460-.480

.400-.415

.236-.260

.240 - REF.

.520-.560

.028-.038

.045-.055

.090-.110

.165-.185

.045-.055

.095-.115

.015-.020

.705-.715

.146-.156

.103-.113

Notes:

1. Package dimensions conform to

JEDEC specification TO-220 AB for

standard flange mounted, peripheral

lead package; .100 inch lead spacing

(Plastic) 3 leads (issue J, March 1987)

2. Controlling dimensions are inches.

3. Pin numbers start with Pin 1, and

continue from left to right when

viewed from the top.

4. Dimensions shown do not include

mold flash or other protrusions. Mold

flash or protrusions shall not exceed

.006 (.15 mm) on any side.

1.14-1.40

2.29-2.79

4.19-4.70

1.14-1.40

2.41-2.92

.38-.51

5. Position of terminals to be

measured at a position .25 (6.35 mm)

from the body.

17.91-18.16

3.71-3.96

2.62-2.87

6. All terminals are solder plated.

* LEADS AND TAB ARE

SOLDER PLATED

PI-1848-050696

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.

Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it

convey any license under its patent rights or the rights of others.

PI Logo and TOPSwitch are registered trademarks of Power Integrations, Inc.

AMERICAS

EUROPE & AFRICA

Power Integrations (Europe) Ltd.

Mountbatten House

Fairacres

WORLD HEADQUARTERS

Power Integrations, Inc.

477 N. Mathilda Avenue

Sunnyvale, CA 94086

USA

For Your Nearest Sales/Rep Office

Please Contact Customer Service

Phone: 408•523•9265

Windsor SL4 4LE

Fax:

408•523•9365

United Kingdom

Main:

408•523•9200

Phone: 44•(0)•1753•622•208

Customer Service:

Fax:

44•(0)•1753•622•209

Phone: 408•523•9265

Fax:

408•523•9365

JAPAN

Power Integrations, K.K.

Keihin-Tatemono 1st Bldg.

12-20 Shin-Yokohoma 2-Chome, Kohoku-ku

Yokohama-shi, Kanagawa 222 Japan

Phone: 81•(0)•45•471•1021

APPLICATIONS HOTLINE

World Wide 408•523•9260

ASIA & OCEANIA

For Your Nearest Sales/Rep Office

Please Contact Customer Service

Phone: 408•523•9265

APPLICATIONS FAX

Americas

408•523•9361

Fax:

408•523•9365

Europe/Africa

44•(0)•1753•622•209

Fax:

81•(0)•45•471•3717

Japan

Asia/Oceania

81•(0)•45•471•3717

408•523•9364

7/96

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TOP202YAI产品参数

型号:	TOP202YAI
是否Rohs认证：	不符合
生命周期：	Obsolete
IHS 制造商：	POWER INTEGRATIONS INC
零件包装代码：	SFM
包装说明：	PLASTIC, TO-220, 3 PIN
针数：	3
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.86
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION
最小输入电压：	36 V
JESD-30 代码：	R-PSFM-T3
功能数量：	1
端子数量：	3
最高工作温度：	85 °C
最低工作温度：	-40 °C
标称输出电压：	5.7 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	TO-220
封装等效代码：	SIP3,.1TB
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
子类别：	Switching Regulator or Controllers
表面贴装：	NO
切换器配置：	BOOST
最大切换频率：	100 kHz
技术：	CMOS
温度等级：	INDUSTRIAL
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED

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