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DGN−8

TPS2060, TPS2064

TPS2068, TPS2069

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SLVS553E–MARCH 2005–REVISED APRIL 2007

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

FEATURES

APPLICATIONS

•

Heavy Capacitive Loads

•

70-mΩ High-Side MOSFET

•

Short-Circuit Protections

1.5-A Continuous Current

Thermal and Short-Circuit Protection

Accurate Current Limit (1.6 A min, 2.6 A max)

Operating Range: 2.7 V to 5.5 V

0.6-ms Typical Rise Time

Undervoltage Lockout

Deglitched Fault Report (OC)

TPS2068

DGN PACKAGE

(TOP VIEW)

TPS2069

DGN PACKAGE

(TOP VIEW)

No OC Glitch During Power Up

1-µA Maximum Standby Supply Current

Reverse Current Blocking

OUT

OC

OUT

OC

GND

IN

EN

TPS2060/64 Temperature Range: 0°C to 70°C

TPS2068/69 Temperature Range:

-40°C to 85°C

•

ESD Protection

UL Listed – File No. E169910

DESCRIPTION

The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and

short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches

for power-distribution systems that require single or dual power switches in a single package. Each switch is

controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the

power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no

external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output

current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.

When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the

junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a

thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch

remains off until valid input voltage is present. Current limit is typically 2.1 A.

1.5 A

TPS2069

TPS2068

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPad is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553E–MARCH 2005–REVISED APRIL 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMENDED

MAXIMUM

CONTINUOUS

LOAD CURRENT

TYPICAL

SHORT-CIRCUIT

CURRENT LIMIT

AT 25°C

PACKAGED

DEVICES

(1)(2)

NUMBER OF

SWITCHES

T_A

ENABLE

MSOP (DGN)

Active low

Active high

Active low

Active high

TPS2060DGN

TPS2064DGN

TPS2068DGN

TPS2069DGN

0°C to 70°C

Dual

1.5 A

2.1 A

-40°C to 85°C

Single

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2060DGN).

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted⁽¹⁾

UNIT

Input voltage range, V_I(IN)

–0.3 V to 6 V

V_I

Input voltage range, V_I(ENx), V_I(ENx)

Voltage range, V_I(OC), V_I(/OCx)

–0.3 V to 6 V

V_O

I_O

Output voltage range, V_O(OUT), V_O(OUTx)

Continuous output current, I_O(OUT), I_O(OUTx)

Continuous total power dissipation

–0.3 V to 6 V

Internally limited

See Dissipation Rating Table

0°C to 105°C

TPS2060/64

TPS2068/69

Operating virtual junction temperature

range

T_J

-40°C to 105°C

–65°C to 150°C

2 kV

T_stg

Storage temperature range

Human body model MIL-STD-883C

Charge device model (CDM)

Electrostatic discharge (ESD) protection

500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATING RATING TABLE⁽¹⁾

T_A< 25°C

POWER RATING

DERATING FACTOR

ABOVE T_A= 25°C

T_A= 70°C

POWER RATING

T_A= 85°C

POWER RATING

PACKAGE

DGN-8

1370 mW

17 mW/°C

600 mW

342 mW

(1) Heatsink the PowerPad™per the recommendations of SLMA002A. PCB used for recommendations per appendix A4.

RECOMMENDED OPERATING CONDITIONS

MIN

MAX

5.5

UNIT

Input voltage, V_I(IN)

2.7

0

V

A

V_I

Input voltage, V_I(ENx), V_I(ENx)

Continuous output current, I_O(OUTx)

5.5

I_O

0

1.5

T_J

TPS2060/64

TPS2068/69

0

105

Operating virtual junction temperature

°C

-40

2

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ELECTRICAL CHARACTERISTICS

0°C ≤ T_J≤ 105°C for the TPS2060/64 and -40°C ≤ T_J≤ 105° for the TPS2068/69, V_I(IN)= 5.5 V, I_O= 1 A, V_I(ENx)= 0 V, or

V_I(ENx)= 5.5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS⁽¹⁾

MIN TYP

MAX UNIT

POWER SWITCH

Static drain-source on-state

resistance, 5-V operation and

3.3-V operation

V_I(IN)= 5 V or 3.3 V, I_O= 1.5 A

70

75

115 mΩ

r_DS(on)

Static drain-source on-state

resistance, 2.7-V operation

V_I(IN)= 2.7 V, I_O= 1.5 A

V_I(IN)= 5.5 V

125 mΩ

0.6

0.4

1.5

t_r

t_f

Rise time, output

Fall time, output

V_I(IN)= 2.7 V

V_I(IN)= 5.5 V

V_I(IN)= 2.7 V

1

ms

0.5

C_L= 1 µF,

R_L= 5 Ω

T_J= 25°C

0.05

0.5

ENABLE INPUT EN OR EN

V_IH

V_IL

I_I

High-level input voltage

2.7 V < V_I(IN)< 5.5 V

2

V

Low-level input voltage

Input current

0.8

V_I(ENx)= 0 V or 5.5 V, V_I(ENx)= 0 V or 5.5 V

C_L= 100 µF, R_L= 5 Ω

-0.5

0.5

3

µA

t_on

t_off

Turnon time

ms

Turnoff time

C_L= 100 µF, R_L= 5 Ω

10

CURRENT LIMIT

V_I(IN)= 5 V, OUT connected to GND, device enabled

into short-circuit

I_OS

Short-circuit output current

1.6

3.2

2.1

2.6

A

TPS2060/64

TPS2068/69

3.2

3.9

3.4

V_I(IN)= 5 V, Current ramp

(≤ 100 A/s) on OUT

I_{OC_TRIP}

Overcurrent trip threshold

Short-circuit output current

2.85

V_I(IN)= 5 V, OUT1 and OUT2 connected to GND,

device enabled into short-circuit, current measured at

V_I(IN)

(2)

I_OS

4.2

5.2

A

Overcurrent trip threshold

TPS2060/64

V_I(IN)= 5 V, Current ramp (≤ 100 A/s) on OUT1 and

OUT2 tied together, current measured at V_I(IN)

(2)

I_{OC_TRIP}

I_OL

6.4

7.8

A

T_J= 25°C

0.5

50

43

1

5

No load on OUT, V_I(ENx)= 5.5 V,

or V_I(ENx)= 0 V

Supply current, low-level output

µA

Over T_Jrange

T_J= 25°C

70

90

60

70

Supply current, high-level output

TPS2060/64

No load on OUT, V_I(ENx)= 0 V,

or V_I(ENx)= 5.5 V

I_OH

µA

Over T_Jrange

T_J= 25°C

Supply current, high-level output

TPS2068/69

No load on OUT, V_I(ENx)= 0 V,

or V_I(ENx)= 5.5 V

I_OH

I_lkg

Over T_Jrange

OUT connected to ground, V_I(ENx)= 5.5 V,

or V_I(ENx)= 0 V

Leakage current

1

µA

Reverse leakage current

V_I(OUTx)= 5.5 V, IN = ground

T_J= 25°C

0.2

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN

Hysteresis, IN

OVERCURRENT OCx

2

4

2.5

V

T_J= 25°C

75

8

mV

V_OL(OCx)

Output low voltage

Off-state current

OC deglitch

I_O(OCx)= 5 mA

0.4

1

V

V_O(OCx)= 5 V or 3.3 V

OCx assertion or deassertion

µA

ms

15

THERMAL SHUTDOWN⁽³⁾

Thermal shutdown threshold

Recovery from thermal shutdown

135

125

°C

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account

separately.

(2) This configuration has not been tested for UL certification.

(3) The thermal shutdown only reacts under overcurrent conditions.

3

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SLVS553E–MARCH 2005–REVISED APRIL 2007

ELECTRICAL CHARACTERISTICS (continued)

0°C ≤ T_J≤ 105°C for the TPS2060/64 and -40°C ≤ T_J≤ 105° for the TPS2068/69, V_I(IN)= 5.5 V, I_O= 1 A, V_I(ENx)= 0 V, or

V_I(ENx)= 5.5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS⁽¹⁾

MIN TYP

MAX UNIT

Hysteresis

10

°C

DEVICE INFORMATION

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

TPS2060 TPS2064

EN1

EN2

EN1

EN2

GND

IN

3

4

-

I

Enable input, logic low turns on power switch IN-OUT1

Enable input, logic low turns on power switch IN-OUT2

Enable input, logic high turns on power switch IN-OUT1

Enable input, logic high turns on power switch IN-OUT2

Ground

-

3

4

1

2

8

5

7

6

-

1

2

8

5

7

6

I

Input voltage

OC1

OC2

OUT1

OUT2

O

Overcurrent, open-drain output, active low, IN-OUT1

Overcurrent, open-drain output, active low, IN-OUT2

Power-switch output, IN-OUT1

Power-switch output, IN-OUT2

PowerPad PowerPad

Connect to GND

Functional Block Diagram (TPS2060 and TPS2064)

OC1

Thermal

Deglitch

Sense

GND

EN1

(See Note B)

Current

Driver

Limit

Charge

Pump

(See Note A)

CS

OUT1

OUT2

UVLO

(See Note A)

CS

IN

Charge

Pump

Current

Driver

Limit

OC2

EN2

(See Note B)

Thermal

Sense

Deglitch

A. Current sense.

B. Active low (ENx) for TPS2060. Active high (ENx) for TPS2064.

4

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SLVS553E–MARCH 2005–REVISED APRIL 2007

DEVICE INFORMATION

Terminal Functions (TPS2068 and TPS2069)

TERMINAL

I/O

DESCRIPTION

NAME

TPS2068

TPS2069

EN

4

-

I

Enable input, logic low turns on power switch

Enable input, logic high turns on power switch

Ground

EN

-

4

GND

IN

1

2, 3

1

2, 3

I

Input voltage

OC

OUT

5

O

Overcurrent, open-drain output, active-low

Power-switch output

6, 7, 8

PowerPad

6, 7, 8

PowerPad

Connect to GND

Functional Block Diagram (TPS2068 and TPS2069)

(See Note A)

CS

OUT

IN

Charge

Pump

Current

EN

Driver

Limit

(See Note B)

OC

UVLO

Deglitch

Thermal

Sense

GND

A. Current sense.

B. Active low (EN) for TPS2068. Active high (EN) for TPS2069.

5

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PARAMETER MEASUREMENT INFORMATION

OUT

t

f

t

r

R

L

C

L

V

90%

10%

O(OUT)

90%

10%

TEST CIRCUIT

50%

90%

50%

V

I(EN)

t

off

t

off

t

on

t

on

90%

V

O(OUT)

10%

VOLTAGE WAVEFORMS

Figure 1. Test Circuit and Voltage Waveforms

R_L= 5 W,

C_L= 1 mF,

V_I(EN)

T_A= 25 °C

5 V/div

R_L= 5 W,

C_L= 1 mF,

T_A= 25 °C

V_O(OUT)

2 V/div

V_O(OUT)

2 V/div

t - Time - 400 ms

Figure 3. Turnoff Delay and Fall Time With 1-µF Load

t - Time - 400 ms

Figure 2. Turnon Delay and Rise Time With 1-µF Load

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PARAMETER MEASUREMENT INFORMATION (continued)

R_L= 5 W,

C_L= 100 mF,

T_A= 25 °C

V_I(EN)

5 V/div

R_L= 5 W,

C_L= 100 mF,

T_A= 25 °C

V_O(OUT)

2 V/div

V_O(OUT)

2 V/div

t - Time - 400 ms

Figure 4. Turnon Delay and Rise Time With 100-µF Load

t - Time - 400 ms

Figure 5. Turnoff Delay and Fall Time With 100-µF Load

V

= 5 V,

= 3 W,

= 255C

IN

R

T

L

V

A

I(EN)

5 V/div

V

I(EN)

5 V/div

220 mF

470 mF

I

100 mF

O(OUT)

500 mA/div

I

O(OUT)

500 mA/div

t − Time − 500 ms/div

Figure 6. Short-Circuit Current,

Device Enabled Into Short

Figure 7. Inrush Current With Different

Load Capacitance

7

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PARAMETER MEASUREMENT INFORMATION (continued)

V_O(OCx)

2 V/div

I_O(OUT)

1 A/div

t - Time - 2 ms/div

Figure 8. 0.6-Ω Load Connected to Enabled Device

TYPICAL CHARACTERISTICS

TURNON TIME

vs

INPUT VOLTAGE

TURNOFF TIME

vs

INPUT VOLTAGE

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

2

1.9

1.8

1.7

C

R

T

= 100 mF,

= 5 W,

= 255C

C

R

T

= 100 mF,

= 5 W,

= 255C

L

A

1.6

1.5

0.1

0

2

3

4

5

6

2

3

4

5

6

V − Input Voltage − V

I

V − Input Voltage − V

I

Figure 9.

Figure 10.

8

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TYPICAL CHARACTERISTICS (continued)

RISE TIME

vs

INPUT VOLTAGE

FALL TIME

vs

INPUT VOLTAGE

0.25

0.2

0.6

0.5

0.4

C

R

T

= 1 mF,

= 5 W,

= 255C

C

R

T

= 1 mF,

= 5 W,

= 255C

L

A

0.15

0.1

0.3

0.2

0.1

0.05

0

2

3

4

5

6

2

3

4

5

6

V − Input Voltage − V

I

V − Input Voltage − V

I

Figure 11.

Figure 12.

TPS2060, TPS2064

TPS2068, TPS2069

SUPPLY CURRENT, OUTPUT ENABLED

vs

JUNCTION TEMPERATURE

60

50

40

30

20

70

60

50

40

30

20

10

V_I= 5.5 V

V = 5.5 V

I

V_I= 5 V

V = 5 V

I

V = 3.3 V

I

V = 2.7 V

I

V_I= 2.7 V

V_I= 3.3 V

10

0

−50

0

50

100

150

-50

0

50

100

150

T − Junction Temperature − 5C

J

T_J- Junction Temperature - °C

Figure 13.

Figure 14.

9

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TYPICAL CHARACTERISTICS (continued)

SUPPLY CURRENT, OUTPUT DISABLED

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs

JUNCTION TEMPERATURE

120

100

80

60

40

20

0

0.5

I

O

= 0.5 A

V = 5.5 V

0.45

I

Out1 = 5 V

V = 5 V

I

0.4

0.35

0.3

Out1 = 3.3 V

Out1 = 2.7 V

V = 3.3 V

I

V = 2.7 V

I

0.25

0.2

0.15

0.1

0.05

0

−50

0

50

100

150

−50

0

50

100

150

T − Junction Temperature − 5C

J

T − Junction Temperature − 5C

J

Figure 15.

Figure 16.

SHORT-CIRCUIT OUTPUT CURRENT

UNDERVOLTAGE LOCKOUT

vs

JUNCTION TEMPERATURE

vs

JUNCTION TEMPERATURE

2.6

2.3

UVLO Rising

2.5

2.4

2.26

V_I= 3.3 V

V_I= 2.7 V

2.3

2.22

2.18

2.2

2.1

UVLO Falling

V_I= 5.5 V

V_I= 5 V

2

1.9

1.8

1.7

1.6

2.14

2.1

−50

0

50

100

150

-50

0

50

100

150

T − Junction Temperature − 5C

J

T_J- Junction Temperature - °C

Figure 17.

Figure 18.

10

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TYPICAL CHARACTERISTICS (continued)

CURRENT-LIMIT RESPONSE

vs

PEAK CURRENT

200

150

100

V = 5 V,

I

T_A= 25 °C

50

0

2.5

5

7.5

10

Peak Current - A

Figure 19.

11

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APPLICATION INFORMATION

POWER-SUPPLY CONSIDERATIONS

TPS2060

2

Power Supply

2.7 V to 5.5 V

IN

7

6

Load

OUT1

0.1 µF

22 µF

8

OC1

EN1

OC2

3

5

OUT2

4

EN2

GND

1

Figure 20. Typical Application

A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.

Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.

This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the

output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit transients.

OVERCURRENT

A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not

increase the series resistance of the current path. When an overcurrent condition is detected, the device

maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only

if the fault is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before the

device is enabled or before V_I(IN)has been applied (see Figure 6). The TPS206x senses the short and

immediately switches into a constant-current output.

In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload

occurs, high currents may flow for a short period of time before the current-limit circuit can react (see Figure 8).

After the current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into

constant-current mode.

In the third condition, the load has been gradually increased beyond the recommended operating current. The

current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is

exceeded. The TPS206x is capable of delivering current up to the current-limit threshold without damaging the

device. Once the threshold has been reached, the device switches into its constant-current mode.

OC RESPONSE

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition

is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or

overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a

momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.

The TPS206x is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminates

the need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turned

off due to an overtemperature shutdown.

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APPLICATION INFORMATION (continued)

V+

R

pullup

TPS2060

GND

OC1

OUT1

OUT2

OC2

IN

EN1

EN2

Figure 21. Typical Circuit for the OC Pin

POWER DISSIPATION AND JUNCTION TEMPERATURE

The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass large

currents. The thermal resistances of these packages are high compared to those of power packages; it is good

design practice to check power dissipation and junction temperature. Begin by determining the r_DS(on)of the

N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the

highest operating ambient temperature of interest and read r_DS(on)from Figure 16. Using this value, the power

dissipation per switch can be calculated by:

P_D= r_DS(on)× I²

Multiply this number by the number of switches being used. This step renders the total power dissipation from

the N-channel MOSFETs.

Finally, calculate the junction temperature:

T_J= P_Dx R_θJA+ T_A

Where:

T_A= Ambient temperature °C

R

_θJA= Thermal resistance

P_D= Total power dissipation based on number of switches being used.

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,

repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally

sufficient to get a reasonable answer.

THERMAL PROTECTION

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for

extended periods of time. The TPS206x implements a thermal sensing to monitor the operating junction

temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature

rises due to excessive power dissipation. Once the die temperature rises to approximately 140°C due to

overcurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the power

switch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooled

approximately 10°C, the switch turns back on. The switch continues to cycle in this manner until the load fault or

input power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdown

or overcurrent occurs.

UNDERVOLTAGE LOCKOUT (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input

voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of

hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The

UVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if the

switch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI and

voltage overshoots.

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APPLICATION INFORMATION (continued)

UNIVERSAL SERIAL BUS (USB) APPLICATIONS

The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for

low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB

interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for

differential data, and two lines are provided for 5-V power distribution.

USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power

is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V

from the 5-V input or its own internal power supply.

The USB specification defines the following five classes of devices, each differentiated by power-consumption

requirements:

•

Hosts/self-powered hubs (SPH)

Bus-powered hubs (BPH)

Low-power, bus-powered functions

High-power, bus-powered functions

Self-powered functions

SPHs and BPHs distribute data and power to downstream functions. The TPS206x has higher current capability

than required by one USB port; so, it can be used on the host side and supplies power to multiple downstream

ports or functions.

HOST/SELF-POWERED AND BUS-POWERED HUBS

Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see

Figure 22). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream

connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection

and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,

and stand-alone hubs.

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APPLICATION INFORMATION (continued)

Downstream

USB Ports

D+

D−

V

BUS

0.1 µF

22 µF

GND

D+

D−

V

BUS

GND

Power Supply

3.3 V

5 V

D+

D−

TPS2060

2

8

IN

7

V

BUS

OUT1

0.1 µF

GND

OC1

EN1

OC2

EN2

3

5

USB

Controller

D+

D−

4

6

V

BUS

OUT2

0.1 µF

2 µF

GND

1

D+

D−

V

BUS

0.1 µF

22 µF

GND

D+

D−

V

BUS

0.1 µF

22 µF

GND

Figure 22. Typical Six-Port USB Host / Self-Powered Hub

BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to

power up with less than one unit load. The BPH usually has one embedded function, and power is always

available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,

the power to the embedded function may need to be kept off until enumeration is completed. This can be

accomplished by removing power or by shutting off the clock to the embedded function. Power switching the

embedded function is not necessary if the aggregate power draw for the function and controller is less than one

unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the

embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

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APPLICATION INFORMATION (continued)

LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power

functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and

can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of

44 Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 23). With TPS206x,

the internal functions could draw more than 500 mA, which fits the needs of some applications such as motor

driving circuits.

Power Supply

D+

D−

3.3 V

TPS2060

2

8

IN

V

BUS

7

10 µF

0.1 µF

Internal

Function

OUT1

GND

0.1 µF

10 µF

OC1

EN1

OC2

EN2

3

5

USB

Control

6

4

OUT2

GND

Internal

Function

0.1 µF

10 µF

1

Figure 23. High-Power Bus-Powered Function

USB POWER-DISTRIBUTION REQUIREMENTS

USB can be implemented in several ways, and, regardless of the type of USB device being developed, several

power-distribution features must be implemented.

•

Hosts/SPHs must:

–

Current-limit downstream ports

Report overcurrent conditions on USB V_BUS

BPHs must:

–

Enable/disable power to downstream ports

Power up at <100 mA

Limit inrush current (<44 Ω and 10 µF)

•

Functions must:

–

Limit inrush currents

Power up at <100 mA

The feature set of the TPS206x allows them to meet each of these requirements. The integrated current-limiting

and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and controlled rise

times meet the need of both input and output ports on bus-powered hubs, as well as the input ports for

bus-powered functions (see Figure 24).

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APPLICATION INFORMATION (continued)

TUSB2040

Hub Controller

SN75240

BUSPWR

Tie to TPS2041 EN Input

Downstream

Ports

Upstream

Port

A

B

C

D

GANGED

DP1

DM1

D +

D −

DP0

DM0

D +

D −

Ferrite Beads

A

B

C

D

GND

5 V

†

GND

SN75240

DP2

DM2

TPS2041B

OC EN

IN OUT

1 µF

33 µF

5-V Power

Supply

DP3

DM3

5 V

D +

D −

A

B

C

D

Ferrite Beads

TPS76333

IN

SN75240

GND

DP4

DM4

0.1 µF

4.7 µF

V

CC

3.3 V

GND

5 V

†

4.7 µF

TPS2060

PWRON1

GND

EN1

OC1

OUT1

OUT2

33 µF

OVRCUR1

PWRON2

OVRCUR2

48-MHz

Crystal

EN2

OC2

XTAL1

XTAL2

D +

D −

IN

0.1 µF

Ferrite Beads

Tuning

Circuit

GND

5 V

†

OCSOFF

GND

33 µF

D +

D −

Ferrite Beads

GND

5 V

†

33 µF

†

USB rev 1.1 requires 120 µF per hub.

Figure 24. Hybrid Self / Bus-Powered Hub Implementation

GENERIC HOT-PLUG APPLICATIONS

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.

These are considered hot-plug applications. Such implementations require the control of current surges seen by

the main power supply and the card being inserted. The most effective way to control these surges is to limit and

slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply

normally turns on. Due to the controlled rise times and fall times of the TPS206x, these devices can be used to

provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS206x

also ensures that the switch is off after the card has been removed, and that the switch is off during the next

insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card or

module.

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APPLICATION INFORMATION (continued)

PC Board

TPS2060

Power

Supply

Block of

Circuitry

OC1

GND

2.7 V to 5.5 V

IN

OUT1

OUT2

0.1 µF

EN1

EN2

1000 µF

Optimum

OC2

Block of

Circuitry

Overcurrent Response

Figure 25. Typical Hot-Plug Implementation

By placing the TPS206x between the V_CCinput and the rest of the circuitry, the input power reaches these

devices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltage

ramp at the output of the device. This implementation controls system surge currents and provides a

hot-plugging mechanism for any device.

DETAILED DESCRIPTION

Power Switch

The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch,

the power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch

supplies a minimum current of 1.5 A.

Charge Pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate

of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires

little supply current.

Driver

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated

electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall

times of the output voltage.

Enable (ENx)

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to

reduce the supply current. The supply current is reduced to less than 1 µA when a logic high is present on ENx,

or when a logic low is present on ENx. A logic zero input on ENx, or a logic high input on ENx restores bias to

the drive and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS

logic levels.

Overcurrent (OCx)

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is

encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A

10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature

shutdown occurs, the OCx is asserted instantaneously.

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DETAILED DESCRIPTION (continued)

Current Sense

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than

conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry

sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its

saturation region, which switches the output into a constant-current mode and holds the current constant while

varying the voltage on the load.

Thermal Sense

The TPS206x implements a thermal sensing to monitor the operating temperature of the power distribution

switch. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises

to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch,

thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has

cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the

fault is removed. The open-drain false reporting output (OCx) is asserted (active low) when an overtemperature

shutdown or overcurrent occurs.

Undervoltage Lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control

signal turns off the power switch.

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