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产品型号TPS562208DDCR的概述

芯片概述 TPS562208DDCR是一款由德州仪器（Texas Instruments）推出的高效降压转换器，专门设计用于低电压、高效率的电源管理应用。该芯片以其优越的性能和灵活的应用场景受到广泛关注。TPS562208DDCR支持宽输入电压范围，可提供稳定的输出电压，广泛用于数码相机、通信设备、便携式音频产品及其他需要高效能电源解决方案的场合。详细参数 TPS562208DDCR的关键参数包括： 1. 输入电压范围：4.5V至17V，能够适配多种电源配置。 2. 输出电压调节范围：可调节输出电压，支持1.0V至5.5V的设置范围，适应不同负载需求。 3. 输出电流：最大输出电流可达2A，具备良好的负载能力。 4. 转换效率：在负载条件下，TPS562208DDCR的效率可高达95%，有效降低能量损耗。 5. 开关频率：可配置的开关频率，最大为2.5MHz，支持高频率操作，减少外部...

产品型号TPS562208DDCR的Datasheet PDF文件预览

TPS562201, TPS562208

ZHCSEL5B – DECEMBER 2015 – REVISED SEPTEMBER 2020

TPS562201, TPS562208

www.ti.com.cn

采用 6 引脚 SOT-23 封装的 TPS56220x 4.5V 至 17V 输入、2A 同步降压稳压器{1}

1 特性

3 说明

• TPS562201 和 TPS562208 2A 转换器集成了

140mΩ 和 84mΩ FET

TPS562201 和 TPS562208 是采用 SOT-23 封装的简

单易用型 2A 同步降压转换器。

• {1}D-CAP2{2} 模式控制，用于快速瞬态响应

此器件被优化为使用尽可能少的外部组件即可运行，并

且可以实现低待机电流。

•

输入电压范围：4.5V 至 17V

输出电压范围：0.76V 至 7V

脉冲跳跃模式 (TPS562201) 或持续电流模式

这些开关模式电源 (SMPS) 器件采用 D-CAP2 模式控

制，从而提供快速瞬态响应，并且在无需外部补偿组件

的情况下支持专用聚合物等低等效串联电阻 (ESR) 输

出电容器以及超低 ESR 陶瓷电容器。

(TPS562208)

• 580kHz 开关频率

低关断电流（低于 10µA）

• 2% 反馈电压精度 (25°C)

•

TPS562201 可在脉冲跳跃模式下运行，从而能在轻载

运行期间保持高效率。TPS562201 和 TPS562208 采

用 6 引脚 1.6mm × 2.9mm SOT (DDC) 封装，额定结

温范围为 –40°C 至 125°C。

•

从预偏置输出电压启动

逐周期过流限制

断续模式过流保护

器件信息

封装⁽¹⁾

非锁存欠压保护 (UVP) 和热关断 (TSD) 保护

固定软启动：1.0ms

封装尺寸（标称值）

器件型号

TPS562201

TPS562208

SOT (6)

1.60mm x 2.90mm

2 应用

•

数字电视电源

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

高清蓝光^™光盘播放器

网络家庭终端设备

数字机顶盒 (STB)

监控

100%

90%

80%

70%

60%

50%

40%

TPS562201

VBST

GND

VIN

VOUT

COUT

VIN

VOUT

VFB

30%

CIN

V_OUT= 1.05 V

V_OUT= 1.8 V

20%

V_OUT= 3.3 V

V_OUT= 5 V

10%

简化原理图

0.001

0.01 0.02 0.05 0.1 0.2

I_load(A)

0.5

2 3 45

D021

TPS562201 效率

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

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www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

Product Folder Links: TPS562201 TPS562208

English Data Sheet: SLVSD91

TPS562201, TPS562208

ZHCSEL5B – DECEMBER 2015 – REVISED SEPTEMBER 2020

www.ti.com.cn

Table of Contents

7.4 Device Functional Modes..........................................11

8 Application and Implementation..................................13

8.1 Application Information............................................. 13

8.2 Typical Application.................................................... 13

9 Power Supply Recommendations................................19

10 Layout...........................................................................19

10.1 Layout Guidelines................................................... 19

10.2 Layout Example...................................................... 19

11 Device and Documentation Support..........................20

11.1 Receiving Notification of Documentation Updates..20

11.2 Support Resources................................................. 20

11.3 Trademarks............................................................. 20

11.4 Electrostatic Discharge Caution..............................20

11.5 Glossary..................................................................20

12 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

Pin Functions.................................................................... 3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings........................................ 4

6.2 ESD Ratings............................................................... 4

6.3 Recommended Operating Conditions.........................4

6.4 Thermal Information....................................................4

6.5 Electrical Characteristics.............................................5

6.6 Typical Characteristics................................................6

7 Detailed Description......................................................10

7.1 Overview...................................................................10

7.2 Functional Block Diagram.........................................10

7.3 Feature Description...................................................10

Information.................................................................... 20

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision A (December 2017) to Revision B (September 2020)

Page

更新了整个文档的表、图和交叉参考的编号格式。.............................................................................................1

将“TPS562201 效率”中的“TPS563201”更改为“TPS562201”............................................................... 1

•

• Changed 'TPS563201' to 'TPS562201' in "TPS562201 Supply Current vs Junction Temperature"...................6

• Changed to 'TPS562208' from 'TPS563208' and 'TPS562201' from 'TPS563208' in "Line Regulation"..........16

• Changed to 'TPS562201' from 'TPS563201' in "TPS562201 Efficiency, V_OUT= 1.05 V"................................. 16

Changes from Revision * (December 2015) to Revision A (December 2017)

Page

• Deleted the OVP comparator from the block diagram. ....................................................................................10

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5 Pin Configuration and Functions

GND

VBST

VIN

TPS562201

VFB

图 5-1. 6-Pin SOT DDC Package (Top View)

Pin Functions

DESCRIPTION

NAME

GND

NO.

Ground pin source terminal of low-side power NFET as well as the ground terminal for controller circuit.

Connect sensitive VFB to this GND at a single point.

Switch node connection between high-side NFET and low-side NFET

VIN

Input voltage supply pin. The drain terminal of high-side power NFET

VFB

Converter feedback input. Connect to output voltage with feedback resistor divider.

Enable input control. Active high and must be pulled up to enable the device

Supply input for the high-side NFET gate drive circuit. Connect a 0.1-µF capacitor between VBST and SW pins.

VBST

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.3

–2

MAX

UNIT

VIN, EN

VBST

VBST (10-ns transient)

VBST (vs SW)

Input voltage

6.5

VFB

SW (10 ns transient)

–3.5

–40

–55

Operating junction temperature, T_J

Storage temperature, T_stg

150

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

6.2 ESD Ratings

VALUE

±3000

±1500

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Electrostatic

discharge

V_(ESD)

Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

V_IN

Supply input voltage

4.5

–0.1

–1.8

–3.5

–40

VBST

VBST (10-ns transient)

VBST(vs SW)

6.0

V_I

Input voltage

VFB

5.5

SW (10 ns transient)

T_J

Operating junction temperature

125

°C

6.4 Thermal Information

TPS562201 and

TPS562208

THERMAL METRIC⁽¹⁾

UNIT

DDC (SOT)

6 PINS

90.8

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

42.3

16.3

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TPS562201 and

TPS562208

THERMAL METRIC⁽¹⁾

UNIT

DDC (SOT)

6 PINS

Junction-to-top characterization parameter

Junction-to-board characterization parameter

2.6

°C/W

ψ_JT

ψ_JB

16.3

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.5 Electrical Characteristics

T_J= –40°C to 125°C, V = 12 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

SUPPLY CURRENT

TPS562201

TPS562208

380

590

520

µA

V_INcurrent, EN = 5 V, VFB =

0.8 V

Operating – non-switching

supply current

I_VIN

750

I_VINSDN

Shutdown supply current

V_INcurrent, EN = 0 V

µA

LOGIC THRESHOLD

V_ENH

V_ENL

R_EN

EN high-level input voltage

1.6

EN low-level input voltage

EN pin resistance to GND

0.8

V_EN= 12 V

225

400

900

kΩ

VFB VOLTAGE AND DISCHARGE RESISTANCE

VFB threshold voltage

V_O= 1.05 V, I_O= 10 mA, Eco-mode^™operation

V_O= 1.05 V, continuous mode operation

V_FB= 0.8 V

774

768

µA

V_FBTH

VFB threshold voltage

VFB input current

749

787

I_VFB

±0.1

MOSFET

R_DS(on)h

R_DS(on)l

High-side switch resistance

Low-side switch resistance

140

T_A= 25°C, V_BST– SW = 5.5 V

mΩ

T_A= 25°C

CURRENT LIMIT

I_ocl

Current limit

DC current, V_OUT= 1.05 V, L1 = 2.2 µH

2.4

3.2

4.0

THERMAL SHUTDOWN

Shutdown temperature

Hysteresis

160

T_SDN

Thermal shutdown threshold⁽¹⁾

°C

ON-TIME TIMER CONTROL

t_OFF(MIN)

SOFT START

t_ss

Minimum off time

VFB = 0.5 V

220

1.0

310

Soft-start time

Internal soft-start time

V_IN= 12 V, V_O= 1.05 V, FCCM mode

Frequency

F_sw

Switching frequency

580

kHz

OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION

V_UVP

Output UVP threshold

Hiccup wait time

Hiccup detect (H > L)

65%

1.8

T_{HICCUP_WAI}

T_{HICCUP_RE}Hiccup time before restart

UVLO

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T_J= –40°C to 125°C, V = 12 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

4.0

3.6

0.4

MAX UNIT

Wake up VIN voltage

4.3

UVLO

UVLO threshold

Shut down VIN voltage

Hysteresis VIN voltage

3.3

(1) Not production tested

6.6 Typical Characteristics

V_IN= 12 V (unless otherwise noted)

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.770

0.769

0.768

0.767

0.766

0.765

0.764

100

130

100

130

œ50

œ20

œ50

œ20

Junction Temperature (°C)

C001

C002

图 6-1. TPS562201 Supply Current vs Junction

图 6-2. VFB Voltage vs Junction Temperature

Temperature

1.23

1.20

1.17

1.14

1.11

1.08

1.05

1.02

1.50

1.47

1.44

1.41

1.38

1.35

100

130

100

130

œ50

œ20

œ50

œ20

Junction Temperature (°C)

C004

C003

图 6-3. EN Pin UVLO Low Voltage vs Junction

图 6-4. EN Pin UVLO High Voltage vs Junction

Temperature

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250

230

210

190

170

150

130

110

130

120

110

100

110 130

100

130

œ50 œ30 œ10

œ50

œ20

Junction Temperature (°C)

C006

C005

图 6-6. Low-Side R_ds-onvs Junction Temperature

图 6-5. High-Side R_ds-onvs Junction Temperature

620

600.0

Vout = 1.05 V

Vout = 1.8 V

600

580

560

500.0

Vout = 5 V

400.0

300.0

200.0

100.0

0.0

540

Vout = 1.05 V

520

Vout = 3.3 V

Vout = 5 V

500

0.001

0.010

0.100

I_OUT(A)

1.000

V_IN(V)

C012

C013

I_out= 10 mA

V_IN= 12 V

图 6-7. TPS562208 Switching Frequency vs Input

图 6-8. TPS562201 Switching Frequency vs Output

Voltage

Current

1.0

0.9

0.8

0.7

0.6

0.5

1.0

0.9

0.8

0.7

0.6

0.5

0.4

Vin = 5 V

0.3

Vin = 9 V

Vin = 12 V

Vin = 15 V

0.2

0.1

Vin = 12 V

Vin = 15 V

0.1

0.001

0.010

0.100

I-load (A)

1.000

0.001

0.010

0.100

I-load (A)

1.000

C015

C017

图 6-9. TPS562201 V_OUT= 1.05 V Efficiency, L = 2.2 图 6-10. TPS562201 V_OUT= 1.5 V Efficiency, L = 2.2

µH

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1.0

0.9

0.8

0.7

0.6

0.5

0.4

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

Vin = 5 V

Vin = 9 V

Vin = 12 V

Vin = 15 V

0.3

0.2

0.1

Vin = 9 V

Vin = 12 V

Vin = 15 V

0.001

0.010

0.100

I-load (A)

1.000

0.001

0.010

0.100

I-load (A)

1.000

C018

C019

图 6-11. TPS562201 V_OUT= 1.8 V Efficiency, L = 2.2 图 6-12. TPS562201 V_OUT= 3.3 V Efficiency, L = 3.3

µH µH

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

Vin = 5 V

Vin = 9 V

Vin = 12 V

Vin = 15 V

Vin = 9 V

Vin = 12 V

Vin = 15 V

0.001

0.010

0.100

I-load (A)

1.000

0.001

0.010

0.100

1.000

I_load(A)

C020

C022

图 6-13. TPS562201 V_OUT= 5 V Efficiency, L = 3.3

图 6-14. TPS562208 V_OUT= 1.05 V Efficiency, L =

µH

2.2 µH

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

Vin = 5 V

Vin = 9 V

Vin = 5 V

Vin = 9 V

0.2

0.1

Vin = 12 V

Vin = 15 V

Vin = 12 V

Vin = 15 V

0.0

0.001

0.010

0.100

1.000

0.001

0.010

0.100

1.000

I_load(A)

C022

图 6-15. TPS562208 V_OUT= 1.5 V Efficiency, L = 2.2 图 6-16. TPS562208 V_OUT= 1.8 V Efficiency, L = 2.2

µH

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1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

Vin = 5 V

Vin = 9 V

Vin = 12 V

Vin = 15 V

Vin = 9 V

Vin = 12 V

Vin = 15 V

0.0

0.001

0.010

0.100

1.000

0.001

0.010

0.100

1.000

I_load(A)

C022

图 6-17. TPS562208 V_OUT= 3.3 V Efficiency, L = 2.2

图 6-18. TPS562208 V_OUT= 5 V Efficiency, L = 3.3

µH

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7 Detailed Description

7.1 Overview

The TPS562201 and TPS562208 are 2-A synchronous step-down converters. The proprietary D-CAP2 mode

control supports low-ESR output capacitors, such as specialty polymer capacitors and multi-layer ceramic

capacitors, without complex external compensation circuits. The fast transient response of D-CAP2 mode control

can reduce the output capacitance required to meet a specific level of performance.

7.2 Functional Block Diagram

VIN

UVP

Hiccup

VREG5

Regulator

UVLO

VFB

VBST

PWM

Voltage

Ref

Reference

Control Logic

Soft Start

Ton

One-Shot

XCON

VREG5

TSD

OCL

threshold

OCL

GND

7.3 Feature Description

7.3.1 Adaptive On-Time Control and PWM Operation

The main control loop of the TPS562201 is adaptive on-time pulse width modulation (PWM) controller that

supports a proprietary D-CAP2 mode control. The D-CAP2 mode control combines adaptive on-time control with

an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with

both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output.

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one

shot timer expires. This one shot duration is set proportional to the converter input voltage, V_IN, and inversely

proportional to the output voltage, V_O, to maintain a pseudo-fixed frequency over the input voltage range, hence

it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again

when the feedback voltage falls below the reference voltage. An internal ramp is added to reference voltage to

simulate output ripple, eliminating the need for ESR induced output ripple from D-CAP2 mode control.

7.3.2 Pulse Skip Control (TPS562201)

The TPS562201 and TPS562208 are designed with Advanced Eco-mode to maintain high light load efficiency.

As the output current decreases from heavy load condition, the inductor current is also reduced and eventually

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comes to point that its rippled valley touches zero level, which is the boundary between continuous conduction

and discontinuous conduction modes. The rectifying MOSFET is turned off when the zero inductor current is

detected. As the load current further decreases, the converter runs into discontinuous conduction mode. The on-

time is kept almost the same as it was in the continuous conduction mode so that it takes longer time to

discharge the output capacitor with smaller load current to the level of the reference voltage. This makes the

switching frequency lower, proportional to the load current, and keeps the light load efficiency high. The

transition point to the light load operation I_OUT(LL)current can be calculated in 方程式 1.

(V_IN- V_OUT)´ V_OUT

I_OUT(LL)

2´L ´ f_SW

(1)

7.3.3 Soft Start and Pre-Biased Soft Start

The TPS562201 and TPS562208 have an internal 1.0-ms soft start. When the EN pin becomes high, the internal

soft-start function begins ramping up the reference voltage to the PWM comparator. If the output capacitor is pre-

biased at start-up, the devices initiate switching and start ramping up only after the internal reference voltage

becomes greater than the feedback voltage, VFB. This scheme ensures that the converters ramp up smoothly

into regulation point.

7.3.4 Current Protection

The output overcurrent limit (OCL) is implemented using a cycle-by-cycle valley detect control circuit. The switch

current is monitored during the OFF state by measuring the low-side FET drain to source voltage. This voltage is

proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.

During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by V_in,

V_out, the on-time, and the output inductor value. During the on-time of the low-side FET switch, this current

decreases linearly. The average value of the switch current is the load current, I_out. If the monitored current is

above the OCL level, the converter keeps the low-side FET on and delays the creation of a new set pulse, even

the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent

switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner.

There are some important considerations for this type of over-current protection. The load current is higher than

the overcurrent threshold by one half of the peak-to-peak inductor ripple current. Also, when the current is being

limited, the output voltage tends to fall as the demanded load current can be higher than the current available

from the converter. This can cause the output voltage to fall. When the VFB voltage falls below the UVP

threshold voltage, the UVP comparator detects it, then the device will shut down after the UVP delay time

(typically 24 µs) and restart after the hiccup time (typically 15 ms).

When the overcurrent condition is removed, the output voltage returns to the regulated value.

7.3.5 Undervoltage Lockout (UVLO) Protection

UVLO protection monitors the internal regulator voltage. When the voltage is lower than UVLO threshold voltage,

the device is shut off. This protection is non-latching.

7.3.6 Thermal Shutdown

The device monitors the temperature of itself. If the temperature exceeds the threshold value (typically 160°C),

the device is shut off. This is a non-latch protection.

7.4 Device Functional Modes

7.4.1 Normal Operation

When the input voltage is above the UVLO threshold and the EN voltage is above the enable threshold, the

TPS562200 can operate in their normal switching modes. Normal continuous conduction mode (CCM) occurs

when the minimum switch current is above 0 A. In CCM, the TPS562208 operates at a quasi-fixed frequency of

580 kHz.

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7.4.2 Eco-mode Operation

When the TPS562201 and TPS562208 are in the normal CCM operating mode and the switch current falls to 0

A, the TPS562200 begins operating in pulse skipping Eco-mode. Each switching cycle is followed by a period of

energy saving sleep time. The sleep time ends when the VFB voltage falls below the Eco-mode threshold

voltage. As the output current decreases, the perceived time between switching pulses increases.

7.4.3 Standby Operation

When the TPS562201 and TPS562208 are operating in either normal CCM or Eco-mode, they can be placed in

standby by asserting the EN pin low.

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8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

8.1 Application Information

The devices are typical step-down DC-DC converters. It typically uses to convert a higher dc voltage to a lower

dc voltage with a maximum available output current of 2 A. The following design procedure can be used to select

component values for the TPS562201 and TPS562208. Alternately, the WEBENCH^®software may be used to

generate a complete design. The WEBENCH software uses an iterative design procedure and accesses a

comprehensive database of components when generating a design. This section presents a simplified

discussion of the design process.

8.2 Typical Application

The application schematic in 图 8-1 was developed to meet the previous requirements. This circuit is available

as the evaluation module (EVM). The sections provide the design procedure.

图 8-1 shows the TPS562201 and TPS562208 4.5-V to 17-V Input, 1.05-V output converter schematics.

C7 0.1 uF

VBST

GND

R3 10.0 k

VOUT = 1.05 V/2A

VOUT

2.2 uH

VIN

VOUT

VFB

R1 3.09 k

22 uF 22 uF

10 k

Not Installed

10 uF 10 uF 0.1 uF

VIN = 4.5 to 17 V

VIN

图 8-1. TPS562201 and TPS562208 1.05-V/2-A Reference Design

8.2.1 Design Requirements

表 8-1 shows the design parameters.

表 8-1. Design Parameters

PARAMETER

EXAMPLE VALUE

Input voltage range

4.5 to 17 V

1.05 V

Output voltage

Transient response, 1.5-A load step

Input ripple voltage

ΔVout = ±5%

400 mV

30 mV

Output ripple voltage

Output current rating

Operating frequency

580 kHz

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8.2.2 Detailed Design Procedure

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFB pin. TI recommends to use 1%

tolerance or better divider resistors. Start by using 方程式 2 to calculate VOUT.

To improve efficiency at very light loads, consider using larger value resistors. Too high of resistance will be more

susceptible to noise and voltage errors from the VFB input current will be more noticeable.

V_OUT= 0.768´ 1+

(2)

8.2.2.2 Output Filter Selection

The LC filter used as the output filter has double pole at:

F =

2p L_OUT´ C_OUT

(3)

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal

gain of the device. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off

at a –40 dB per decade rate and the phase drops rapidly. D-CAP2 introduces a high frequency zero that

reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the

zero frequency. The inductor and capacitor for the output filter must be selected so that the double pole of

Equation 3 is located below the high frequency zero but close enough that the phase boost provided be the high

frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values

recommended in 表 8-2.

表 8-2. Recommended Component Values

L1 (µH)

TYP

2.2

(kΩ)

OUTPUT VOLTAGE

(V)

C8 + C9

(µF)

MIN

2.2

3.3

MAX

4.7

1.05

1.2

1.5

1.8

2.5

3.3

3.09

3.74

5.76

9.53

13.7

22.6

33.2

54.9

10.0

20 to 68

2.2

3.3

4.7

6.5

4.7

The inductor peak-to-peak ripple current, peak current, and RMS current are calculated using 方程式 4, 方程式

5, and 方程式 6. The inductor saturation current rating must be greater than the calculated peak current and the

RMS or heating current rating must be greater than the calculated RMS current.

Use 580 kHz for f_SW. Make sure the chosen inductor is rated for the peak current of 方程式 5 and the RMS

current of 方程式 6.

_IN(MAX)- V_OUT

V_OUT

Il_P-P

L_O´ f_SW

IN(MAX)

(4)

Il_P-P

Il_PEAK= I_O+

(5)

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I_LO(RMS)= I_O

Il_P-P

(6)

For this design example, the calculated peak current is 3.5 A and the calculated RMS current is 3.01 A. The

inductor used is a WE 744311330 with a peak current rating of 11 A and an RMS current rating of 6.5 A.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS562201 and TPS562208

are intended for use with ceramic or other low-ESR capacitors. Recommended values range from 20 µF to 68

µF. Use 方程式 7 to determine the required RMS current rating for the output capacitor.

V_OUT´ V_IN- V_OUT

(

12 ´ V ´L_O´ f_SW

)

I_CO(RMS)

(7)

For this design, two TDK C3216X5R0J226M 22-µF output capacitors are used. The typical ESR is 2 mΩ each.

The calculated RMS current is 0.286 A and each output capacitor is rated for 4 A.

8.2.2.3 Input Capacitor Selection

The TPS562201 and TPS562208 require an input decoupling capacitor and a bulk capacitor is needed

depending on the application. TI recommends a ceramic capacitor over 10 µF for the decoupling capacitor. An

additional 0.1-µF capacitor (C3) from pin 3 to ground is optional to provide additional high frequency filtering.

The capacitor voltage rating needs to be greater than the maximum input voltage.

8.2.2.4 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. TI

recommends to use a ceramic capacitor.

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8.2.3 Application Curves

3.00%

2.00%

1.00%

0.00%

-1.00%

3.00%

2.00%

1.00%

0.00%

-1.00%

-2.00%

-3.00%

TPS562201

TPS562208

-2.00%

-3.00%

TPS562201

TPS562208

0.0

0.5

1.0

1.5

2.0

2.5

0.0

0.5

1.0

1.5

2.0

2.5

Loading (A)

C010

Loading (A)

图 8-3. Load Regulation V_IN= 12 V

图 8-2. Load Regulation, V_IN= 5 V

1.070

1.068

1.066

1.064

1.062

1.060

1.058

1.056

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

Vin = 5 V

Vin = 9 V

TPS562201

Vin = 12 V

Vin = 15 V

TPS562208

0.001

0.010

0.100

I-load (A)

1.000

Input Voltage (V)

C011

C015

TPS562201: I_out= 1 A

TPS562208: I_out= 10 mA

图 8-4. Line Regulation

图 8-5. TPS562201 Efficiency, V_OUT= 1.05 V

V_O= 50 mV/div

V_IN= 100 mV/div

V_LX= 5 V/div

I_O= 2 A/div

I_L= 500 mA/div

800 ns/div

20 ns/div

图 8-6. TPS562201 Input Voltage Ripple

图 8-7. TPS562201 Output Voltage Ripple, I_OUT= 10

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V_O= 20 mV/div

V_LX= 5 V/div

I_L= 500 mA/div

1 µs/div

图 8-8. TPS562201 Output Voltage Ripple, I_OUT

图 8-9. TPS562201 Output Voltage Ripple, I_OUT= 2

0.25 A

= 50 mv/div

V_OUT= 20 mV/div

SW = 5V/div

800 ns/div

100 µs/div

图 8-10. TPS562208 Output Voltage Ripple, I_OUT= 0

图 8-11. TPS562201 Transient Response, 0.1 to 1.5

V_OUT= 20 mv/div

V_O= 20 mv/div

I_OUT= 1 A/div

I_O= 1 A/div

100 µs/div

图 8-13. TPS562208 Transient Response 0.1 to 2 A

图 8-12. TPS562201 Transient Response, 0.75 to

2.25 A

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V_IN= 5 V/div

V_EN= 5 V/div

V_O= 500 mV/div

2 ms/div

1 ms/div

图 8-14. TPS562201 Start-Up Relative to V_I

图 8-15. TPS562201 Start-Up Relative to EN

V_IN= 5 V/div

V_EN= 5 V/div

V_O= 500 mV/div

10 ms/div

10 µs/div

图 8-16. TPS562201 Shutdown Relative to V_I

图 8-17. TPS562201 Shutdown Relative to EN

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9 Power Supply Recommendations

The TPS562201 and TPS562208 are designed to operate from input supply voltage in the range of 4.5 V to 17

V. Buck converters require the input voltage to be higher than the output voltage for proper operation. The

maximum recommended operating duty cycle is 75%. Using that criteria, the minimum recommended input

voltage is V_O/ 0.75.

10 Layout

10.1 Layout Guidelines

1. VIN and GND traces should be as wide as possible to reduce trace impedance. The wide areas are also of

advantage from the view point of heat dissipation.

2. The input capacitor and output capacitor should be placed as close to the device as possible to minimize

trace impedance.

3. Provide sufficient vias for the input capacitor and output capacitor.

4. Keep the SW trace as physically short and wide as practical to minimize radiated emissions.

5. Do not allow switching current to flow under the device.

6. A separate VOUT path should be connected to the upper feedback resistor.

7. Make a Kelvin connection to the GND pin for the feedback path.

8. Voltage feedback loop should be placed away from the high-voltage switching trace, and preferably has

ground shield.

9. The trace of the VFB node should be as small as possible to avoid noise coupling.

10.The GND trace between the output capacitor and the GND pin should be as wide as possible to minimize its

trace impedance.

10.2 Layout Example

VOUT

GND

Additional

Vias to the

GND plane

Vias to the

internal SW

node copper

OUTPUT

CAPACITOR

BOOST

CAPACITOR

OUTPUT

INDUCTOR

GND

VBST

FEEDBACK

RESISTORS

TO ENABLE

CONTROL

VFB

Vias to the

internal SW

node copper

VIN

INPUT BYPAS

CAPACITOR

SW node copper

pour area on internal

or bottom layer

图 10-1. TPS562201 and TPS562208 Layout

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11 Device and Documentation Support

11.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on

Subscribe to updates to register and receive a weekly digest of any product information that has changed. For

change details, review the revision history included in any revised document.

11.2 Support Resources

TI E2E^™support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

11.3 Trademarks

蓝光^™is a trademark of Blu-ray Disc Association.

Eco-mode^™and TI E2E^™are trademarks of Texas Instruments.

WEBENCH^®is a registered trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

11.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

11.5 Glossary

TI Glossary

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS562201DDCR

TPS562201DDCT

TPS562208DDCR

TPS562208DDCT

ACTIVE SOT-23-THIN

DDC

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

250 RoHS & Green

Call TI | SN

Level-1-260C-UNLIM

-40 to 125

2201

2208

Call TI | SN

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Jan-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS562201DDCR

TPS562201DDCT

TPS562208DDCR

TPS562208DDCT

SOT-

23-THIN

DDC

3000

250

180.0

8.4

3.2

1.4

4.0

8.0

SOT-

23-THIN

SOT-

23-THIN

3000

250

SOT-

23-THIN

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Jan-2022

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS562201DDCR

TPS562201DDCT

TPS562208DDCR

TPS562208DDCT

SOT-23-THIN

DDC

3000

250

210.0

185.0

35.0

3000

250

Pack Materials-Page 2

PACKAGE OUTLINE

DDC0006A

SOT-23 - 1.1 max height

SMALL OUTLINE TRANSISTOR

3.05

2.55

1.1

0.7

1.75

1.45

0.1 C

PIN 1

INDEX AREA

4X 0.95

1.9

3.05

2.75

0.5

0.3

0.1

TYP

0.0

0.2

C A B

0 -8 TYP

0.25

GAGE PLANE

SEATING PLANE

0.20

0.12

TYP

0.6

0.3

TYP

4214841/C 04/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Reference JEDEC MO-193.

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EXAMPLE BOARD LAYOUT

DDC0006A

SOT-23 - 1.1 max height

SMALL OUTLINE TRANSISTOR

SYMM

6X (1.1)

6X (0.6)

SYMM

4X (0.95)

(R0.05) TYP

(2.7)

LAND PATTERN EXAMPLE

EXPLOSED METAL SHOWN

SCALE:15X

METAL UNDER

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

SOLDERMASK DETAILS

4214841/C 04/2022

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

DDC0006A

SOT-23 - 1.1 max height

SMALL OUTLINE TRANSISTOR

SYMM

6X (1.1)

6X (0.6)

SYMM

4X(0.95)

(R0.05) TYP

(2.7)

SOLDER PASTE EXAMPLE

BASED ON 0.125 THICK STENCIL

SCALE:15X

4214841/C 04/2022

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

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TPS562208DDCR产品参数

型号:	TPS562208DDCR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
包装说明：	TSSOP,
Reach Compliance Code：	compliant
ECCN代码：	EAR99
Factory Lead Time：	6 weeks
风险等级：	1.69
其他特性：	ALSO OPERATES IN ADJUSTABLE MODE FROM 0.76 TO 7V
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	17 V
最小输入电压：	4.5 V
标称输入电压：	12 V
JESD-30 代码：	R-PDSO-G6
JESD-609代码：	e3
长度：	2.9 mm
湿度敏感等级：	1
功能数量：	1
端子数量：	6
最高工作温度：	125 °C
最低工作温度：	-40 °C
最大输出电流：	2 A
最大输出电压：	7 V
最小输出电压：	0.76 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
座面最大高度：	1.1 mm
表面贴装：	YES
切换器配置：	BUCK
最大切换频率：	580 kHz
温度等级：	AUTOMOTIVE
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子节距：	0.95 mm
端子位置：	DUAL
宽度：	1.6 mm
Base Number Matches：	1

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