TPS61240DRVR全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

TPS61240, TPS61241

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3.5-MHz High Efficiency Step-Up Converter

1

FEATURES

DESCRIPTION

•

Efficiency > 90% at Nominal Operating

Conditions

The TPS6124x device is a high efficient synchronous

step up DC-DC converter optimized for products

powered by either a three-cell alkaline, NiCd or

NiMH, or one-cell Li-Ion or Li-Polymer battery. The

TPS6124x supports output currents up to 450mA.

The TPS61240 has an input valley current limit of

500mA, and the TPS61241 has an input valley

current of 600mA.

•

Total DC Output Voltage Accuracy 5.0V±2%

Typical 30 µA Quiescent Current

Best in Class Line and Load Transient

Wide V_INRange From 2.3V to 5.5V

Output current up to 450mA

Automatic PFM/PWM Mode transition

With an input voltage range of 2.3V to 5.5V the

device supports batteries with extended voltage

range and are ideal to power portable applications

like mobile phones and other portable equipment.

The TPS6124x boost converter is based on a

quasi-constant on-time valley current mode control

scheme.

Low Ripple Power Save Mode for Improved

Efficiency at Light Loads

•

Internal Softstart, 250µs typical Start-Up time

3.5MHz Typical Operating Frequency

Load Disconnect During Shutdown

Current Overload and Thermal Shutdown

Protection

The TPS6124x presents a high impedance at the

V_OUTpin when shut down. This allows for use in

applications that require the regulated output bus to

be driven by another supply while the TPS6124x is

shut down.

•

Three Surface-Mount External Components

Required (One MLCC Inductor, Two Ceramic

Capacitors)

Total Solution Size <13 mm²

•

During light loads the device will automatically pulse

skip allowing maximum efficiency at lowest quiescent

currents. In the shutdown mode, the current

consumption is reduced to less than 1µA.

Available in a 6-pin WCSP and 2×2-SON

Package

APPLICATIONS

TPS6124x allows the use of small inductors and

capacitors to achieve a small solution size. During

shutdown, the load is completely disconnected from

the battery. The TPS6124x is available in a 6-pin

WCSP and 2×2 SON package.

•

USB-OTG Applications

Portable HDMI Applications

Cell Phones, Smart-Phones

PDAs, Pocket PCs

Portable Media Players

Digital Cameras

TPS61240

V

1 mH

V

5 V

L

V

OUT

C

4.7 mF

OUT

V

IN

FB

C

EN

2.2 mF

IN

GND

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS61240, TPS61241

SLVS806A–APRIL 2009–REVISED MAY 2009 .............................................................................................................................................................. www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

T_A

OUTPUT

VOLTAGE⁽²⁾

PACKAGE

DESIGNATOR⁽¹⁾⁽³⁾

PACKAGE

MARKING

PART NUMBER⁽¹⁾

PACKAGE

ORDERING

6-WCSP

6-QFN

YFF

DRV

YFF

TPS61240YFF

TPS61240DRV

TPS61241YFF

GM

OCJ

NF

TPS61240

TPS61241

–40°C to 85°C

5V Fixed

6-WCSP

(1) The YFF package is available in tape on reel. Add R suffix (TPS61240YFFR) to order quantities of 3000 parts per reel. Add a T suffix

(TPS61240YFFT) to order quantities of 250 parts.

(2) Contact TI for other fixed output voltage options.

(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

VALUE

–0.3 to 7

–2.0 to 7

–2.0 to 14

Internally limited

4

UNIT

V_I

Input voltage range on V_IN, L, EN

Voltage on V_OUT

V

A

Voltage on FB

Peak output current

Human Body Model

kV

ESD rating⁽³⁾

CDM Charged Device Model

Machine Model

500

200

V

T_J

Maximum operating junction temperature

Storage temperature range

–40 to 125

–65 to 150

°C

T_stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF

capacitor discharged directly into each pin.

DISSIPATION RATINGS TABLE⁽¹⁾

POWER RATING

_A≤ 25°C

DERATING FACTOR ABOVE

T_A= 25°C

PACKAGE

R_θJA

T

DRV

YFF

76°C/W

1300mW

800mW

13mW/°C

8mW/°C

125°C/W

(1) Maximum power dissipation is a function of T_J(max), θ_JAand T_A. The maximum allowable power dissipation at

any allowable ambient temperature is P_D= [T_J(max)-T_A] / θ_JA.

(2) This thermal data is measured with high-K board (4 layer board according to JESD51-7 JEDEC standard).

RECOMMENDED OPERATING CONDITIONS

MIN NOM MAX UNIT

Supply voltage at V_IN

2.3

–40

5.5

85

V

T_A

T_J

Operating ambient temperature

Operating junction temperature

°C

125

2

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ELECTRICAL CHARACTERISTICS

Over full operating ambient temperature range, typical values are at T_A= 25°C. Unless otherwise noted, specifications apply

for condition V_IN= EN = 3.6V. External components C_IN= 2.2µF, C_OUT= 4.7µF 0603, L = 1µH, refer to PARAMETER

MEASUREMENT INFORMATION.

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNIT

DC/DC STAGE

V_IN

Input voltage range

2.3

4.9

5.5

5.1

V

V_OUT

Fixed output voltage range

Ripple voltage, PWM mode

Output current

2.3 V ≤ V_IN≤ 5.5 V, 0 mA ≤ I_OUT≤ 200 mA

I_LOAD= 150 mA

5.0

V_{O_Ripple}

20 mVpp

mA

V_IN2.3 V to 5.5 V

200

V_OUT= V_GS= 5.0 V (TPS61240)

V_OUT= V_GS= 5.0 V (TPS61241)

V_OUT= V_GS= 5.0 V

500 600

600 700

200 350

290

Switch valley current limit

Short circuit current

mA

mApk

mΩ

High side MOSFET on-resistance⁽¹⁾V_IN= V_GS= 5.0V, T_A= 25°C⁽¹⁾

(1)

Low Side MOSFET on-resistance⁽¹⁾V_IN= V_GS= 5.0 V, T_A= 25°C

250

mΩ

Operating quiescent current

Shutdown current

I_OUT= 0 mA, Power save mode

EN = GND

30

40

1.5

2.5

µA

I_SW

Reverse leakage current V_OUT

EN = 0, V_OUT= 5 V

Leakage current from battery to

V_OUT

EN = GND

2.5

µA

V_IN600 mVp-p AC square wave, 200Hz,

12.5% DC at 50/200mA load

Line transient response

±25 ±50 mVpk

0–50 mA, 50–0 mA V_IN= 3.6V T_Rise= T_Fall= 0.1µs

50

Load transient response

Input bias current, EN

mVpk

150

50–200 mA, 200–50 mA, V_IN= 3.6 V, T_Rise= T_Fall= 0.1µs

I_IN

EN = GND or V_IN

Falling

0.01

2.0

1.0

2.1

2.2

µA

V

V_UVLO

Undervoltage lockout threshold

Rising

2.1

V

CONTROL STAGE

V_IH

V_IL

High level input voltage, EN

2.3 V ≤ V_IN≤ 5.5 V

Falling

1.0

V

Low level input voltage, EN

0.4

5.9

6.0

OVC

t_Start

Input over-voltage threshold

V

Rising

Time from active EN to start switching, no-load until V_OUT

is stable 5V

Start-up time

300

µs

DC/DC STAGE

Freq

See Figure 7 (Frequency Dependancy vs I_OUT

Increasing junction temperature

)

3.5

140

20

MHz

°C

Thermal shutdown

Thermal shutdown hysteresis

T_SD

Decreasing junction temperature

°C

(1) DRV package has an increased R_DSonof about 40mΩ due to bond wire resistance.

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PIN ASSIGNMENTS

WCSP PACKAGE

View From Underside

View From Topside

A2

B2

C2

A1

B1

C1

0,4 mm pitch

Bump dia: 0,25 0,05 mm

0,6 0,025 mm hiꢀh

B2

C2

B1

C1

QFN PACKAGE (TOP VIEW)

1

2

3

6

5

4

PIN FUNCTIONS

PIN NO.

WCSP

PIN NAME FUNCTION

REMARKS

QFN

2

6

5

4

3

1

B2

A1

B1

C1

C2

A2

V_OUT

V_IN

L

Output

Connected to load

Supply voltage

Supply from battery

Boost and rectifying switch input

Inductor connection to FETs

Positive polarity. Low = IC shutdown.

Feedback for regulation.

Power ground and IC ground

EN

FB

Enable

Feedback input

Ground

GND

4

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FUNCTIONAL BLOCK DIAGRAM

L

V

OUT

V

IN

FB

Current

Sense

R

1

Int.

Resistor

Network

-

R

2

Softstart

+

Thermal

Shutdown

+

_

EN

V

REF

Control

Logic

GND

Undervoltage

Lockout

GND

PARAMETER MEASUREMENT INFORMATION

TPS61240

1 mH

V

5 V

L

V

OUT

C

4.7 mF

OUT

V

IN

FB

GND

C

EN

2.2 mF

IN

List of Components

COMPONENT

REFERENCE

PART NUMBER

MANUFACTURER

VALUE

C_IN

C_OUT

L

JMK105BJ225MV

JDK105BJ475MV

MDT2012-CH1R0AN

Taiyo Yuden

TOKO

2.2 µF, X5R, 6.3 V, 0402

4.7 µF, X5R, 6.3 V, 0402

1.0 µH, 900mA, 0805

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TYPICAL CHARACTERISTICS

Table of Graphs

Figure

Maximum Output Current

Efficiency

vs Input Voltage

1

2

vs Output Current, Vout = 5V, Vin = [2.3V; 3.0V; 3.6V; 4.2V]

vs Input Voltage, Vout = 5V, Iout = [100uA; 1mA; 10mA; 100mA; 200mA]

at No Output Load, Device Disabled

3

Input Current

4

vs Output Current, Vout = 5V, Vin = [2.3V; 3.0V; 3.6V; 4.2V]

vs Input Voltage

5

Output Voltage

Frequency

6

vs Output Load, Vout = 5V, Vin = [3.0V; 4.0V; 5.0V]

Output Voltage Ripple, PFM Mode, Iout = 10mA

Output Voltage Ripple, PWM Mode, Iout = 150mA

Load Transient Response, Vin = 3.6V, 0 - 50mA

Load Transient Response, Vin = 3.6V, 50 - 200mA

Line Transient Response, Vin = 3.6V - 4.2V, Iout = 50mA

Line Transient Response, Vin = 3.6V - 4.2V, Iout = 200mA

Startup after Enable, Vin = 3.6V, Vout = 5V, Load = 5KΩ

Startup after Enable, Vin = 3.6V, Vout = 5V, Load = 16.5Ω

Startup and Shutdown, Vin = 3.6V, Vout = 5V, Load = 16.5Ω

7

8

9

10

11

12

13

14

15

16

Waveforms

100

0.8

0.7

0.6

0.5

V = 4.2 V

I

V = 3.6 V

I

90

80

70

V = 3 V

I

V = 2.3 V

I

60

50

40

30

20

10

0.4

25°C

-40°C

0.3

0.2

0.1

0

85°C

0

0.00001 0.0001

0.001

0.01

0.1

1

2

2.5

3

3.5

4

4.5

5

5.5

6

I

- Output Current - A

V - Input Voltage - V

O

I

Figure 1. Maximum Output Current vs Input Voltage

Figure 2. Efficiency vs Output Current

6

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100

90

80

70

60

50

40

30

20

0.070

0.060

0.050

I

= 200 mA

O

-40°C

85°C

25°C

I

= 100 mA

O

0.040

0.030

0.020

0.010

0

I

= 10 mA

O

I

= 1 mA

O

I

= 100 mA

O

10

0

2

2.5

3

3.5

4

4.5

5

5.5

6

2.8

3.3

3.8

4.3

- Input Voltage - V

2.3

4.8

5.3

V - Input Voltage - V

V

I

IN

Figure 3. Efficiency vs Input Voltage

Figure 4. Input at No Output Load

5.10

5.05

5.10

5.08

V = 4.2 V

I

I_O= 100 mA

I_O= 1 mA

5.06

5.04

5.02

5

I_O= 10 mA

5

V = 3.6 V

I

I_O= 100 mA

4.98

4.96

4.94

I_O= 200 mA

V = 3 V

I

V = 2.3 V

I

4.95

4.90

4.92

4.90

0.01

0.1

1

10

- Output Current - mA

100

1000

2.3

2.8

3.3

3.8

4.3

V - Input Voltage - V

4.8

5.3

I

O

I

Figure 5. Output Voltage vs Output Current

Figure 6. Output Voltage vs Input Voltage

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5.5

V

= 3.6 V, V

OUT

= 5 V, I = 10 mA

OUT

IN

V

= 20 mV/div

OUT

5

4.5

4

SW = 5 V/div

5 V

I

= 200 mA/div

4 V

COIL

3 V

3.5

3

t - Time Base - 1 ms/div

100 150 200

I

250 300 350 400 450 500

- Output Current - mA

O

Figure 7. Frequency vs Output Load

Figure 8. Output Voltage Ripple – PFM Mode

V

= 3.6 V, V

= 5 V, I

= 150 mA

IN

OUT

V

= 10 mV/div

OUT

V

= 100 mV/dIV

OUT

V

= 3.6 V

SW = 5 V/div

IN

V

I

= 5 V

OUT

= 0 - 50 mA

OUT

I

= 100 mA/dIV

COIL

I

= 200 mA/div

COIL

50 mA

0 mA

I

= 100 mA/div

OUT

t - Time Base - 20 ms/div

Figure 9. Output Voltage Ripple – PWM Mode

t - Time Base - 20 ms/div

Figure 10. Load Transient Response 0mA–50mA and

50mA–0mA

8

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V

= 1 V/div

IN

V

OUT

= 200 mV/div

V

= 50 mv/div

OUT

V

I

= 3.6 V

= 5 V

IN

V

I

= 3.6 V - 4.2 V

= 5 V

OUT

IN

= 50 - 200 mA

I

COIL

= 200 mA/div

OUT

= 50 mA

OUT

I

= 200 mA/div

COIL

200 mA

50 mA

I

= 200 mA/div

OUT

t - Time Base - 100 ms/div

t - Time Base - 20 ms/div

Figure 11. Load Transient Response 0mA–200mA and

200mA–0mA

Figure 12. Line Transient Response 3.6V–4.2V at 50mA

Load

EN = 5 V/div

V

= 1 V/div

IN

V

= 1 V/div

OUT

V

= 50 mv/div

OUT

V

I

= 3.6 V - 4.2 V

= 5 V

IN

OUT

I

= 200 mA/div

V

I

= 3.6 V

= 5 V

= 200 mA

COIL

IN

OUT

= 10 mA

OUT

I

= 200 mA/div

COIL

t - Time Base - 50 ms/div

t - Time Base - 100 ms/div

Figure 13. Line Transient Response 3.6V–4.2V at 200mA

Load

Figure 14. Startup After Enable – No Load

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EN = 5 V/div

V

= 1 V/div

OUT

V

I

= 3.6 V

= 5 V

IN

V

= 2 V/div

OUT

V

I

= 3.6 V

= 5 V

IN

= 150 mA

OUT

V

= 1 V/div

= 150 mA

IN

OUT

I

= 200 mA/div

I

= 200 mA/div

COIL

t - Time Base - 100 ms/div

t - Time Base - 200 ms/div

Figure 15. Startup After Enable – With Load

Figure 16. Startup and Shutdown

DETAILED DESCRIPTION

OPERATION

The TPS6124x Boost Converter operates with typically 3.5MHz fixed frequency pulse width modulation (PWM) at

moderate to heavy load currents. At light load currents the converter will automatically enter Power Save Mode

and operates then in PFM (Pulse Frequency Modulation) mode. During PWM operation the converter uses a

unique fast response quasi-constant on-time valley current mode controller scheme which allows “Best in Class”

line and load regulation allowing the use of small ceramic input and output capacitors.

Based on the V_IN/V_OUTratio, a simple circuit predicts the required on-time. At the beginning of the switching

cycle, the low-side N-MOS switch is turned-on and the inductor current ramps up to a defined peak current. In

the second phase, once the peak current is reached, the current comparator trips, the on-timer is reset turning off

the switch, and the current through the inductor then decays to an internally set valley current limit. Once this

occurs, the on-timer is set to turn the boost switch back on again and the cycle is repeated.

CURRENT LIMIT OPERATION

The current limit circuit employs a valley current sensing scheme. Current limit detection occurs during the off

time through sensing of the voltage drop across the synchronous rectifier.

The output voltage is reduced as the power stage of the device operates in a constant current mode. The

maximum continuous output current (I_OUT(CL)), before entering current limit operation, can be defined by

Equation 1 as shown.

1

2

V

D

f

V

- V

OUT IN

IN

I

= (1 - D) ´ (I

+

DI ) with DI =

L

´

and D »

OUT(CL)

VALLEY

L

V

OUT

(1)

Figure 17 illustrates the inductor and rectifier current waveforms during current limit operation. The output

current, I_OUT, is the average of the rectifier ripple current waveform. When the load current is increased such that

the lower peak is above the current limit threshold, the off time is lengthened to allow the current to decrease to

this threshold before the next on-time begins (so called frequency fold-back mechanism).

10

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I

PEAK

I

L

Current Limit

Threshold

I

= I

LIM

VALLEY

Rectifier

Current

I

DI

OUT(CL)

L

I

OUT(DC)

Increased

Load Current

I

IN(DC)

f

Inductorr

Current

I

IN(DC)

DI

L

V

D

f

IN

ΔI

=

×

L

Figure 17. Inductor/Rectifier Currents in Current Limit Operation

POWER-SAVE MODE

The TPS6124x family of devices integrates a power save mode to improve efficiency at light load. In power save

mode the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the

output voltage with several pulses and goes into power save mode once the output voltage exceeds the set

threshold voltage.

Output

Voltage

PFM mode at light load

PFM ripple about 0.015 x V

OUT

1.006 x V

OUT NOM.

V

OUT NOM.

PWM mode at heavy load

The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM

mode.

UNDER-VOLTAGE LOCKOUT

The under voltage lockout circuit prevents the device from malfunctioning at low input voltages and from

excessive discharge of the battery. It disables the output stage of the converter once the falling V_INtrips the

under-voltage lockout threshold V_UVLO. The under-voltage lockout threshold V_UVLOfor falling V_INis typically 2.0V.

The device starts operation once the rising VIN trips under-voltage lockout threshold V_UVLOagain at typ. 2.1V.

INPUT OVER-VOLTAGE PROTECTION

In the event of an overvoltage condition appearing on the input rail, the output voltage will also experience the

overvoltage due to being in dropout condition. A input overvoltage protection feature has been implemented into

the TPS6124x which has an input overvoltage threshold of 6.0V. Once this level is triggered, the device will go

into a shutdown mode to protect itself. If the voltage drops to 5.9V or below, the device will startup once more

into normal operation.

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ENABLE

The device is enabled setting EN pin to high. At first, the internal reference is activated and the internal analog

circuits are settled. Afterwards, the soft start is activated and the output voltage is ramped up. The output

voltages reaches its nominal value in typically 250 µs after the device has been enabled.

The EN input can be used to control power sequencing in a system with various DC/DC converters. The EN pin

can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply

rails. With EN = GND, the device enters shutdown mode.

SOFT START

The TPS6124x has an internal soft start circuit that controls the ramp up of the output voltage. The output

voltages reaches its nominal value within t_Startof typically 250µs after EN pin has been pulled to high level. The

output voltage ramps up from 5% to its nominal value within t_RAMPof typ. 300µs.

This limits the inrush current in the converter during start up and prevents possible input voltage drops when a

battery or high impedance power source is used.

During soft start, the switch current limit is reduced to 300mA until the output voltage reaches V_IN. Once the

output voltage trips this threshold, the device operates with its nominal current limit I_LIMF

.

LOAD DISCONNECT

Load disconnect electrically removes the output from the input of the power supply when the supply is disabled.

This is especially important during shutdown. In shutdown of a boost converter, the load is still connected to the

input through the inductor and catch diode. Since the input voltage is still connected to the output, a small current

continues to flow, even when the supply is disabled. Even small leakage currents significantly reduce battery life

during extended periods of off time.

The benefit of this implemented feature for the system design engineer is that the battery is not depleted during

shutdown of the converter. No additional components must be added to the design to make sure that the battery

is disconnected from the output of the converter.

THERMAL SHUTDOWN

As soon as the junction temperature, T_J, exceeds 140°C (typical) the device goes into thermal shutdown. In this

mode, the High Side and Low Side MOSFETs are turned-off. When the junction temperature falls below the

thermal shutdown hysteresis, the device continuous operation.

12

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APPLICATION INFORMATION

TPS61240

1 mH

V

5 V

L

V

OUT

C

4.7 mF

OUT

V

IN

FB

C

EN

2.2 mF

IN

GND

Figure 18. TPS61240 Fixed 5.0V for HDMI / USB-OTG Applications

TPS61240

1 mH

V

5 V

OUT

L

V

OUT

C

4.7 mF

OUT

V

IN

FB

EN

C

2.2 mF

GND

IN

Figure 19. TPS61240 Fixed 5.0V With Schottky Diode for Output Overvoltage Protection

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DESIGN PROCEDURE

PROGRAMMING THE OUTPUT VOLTAGE

The output voltage is set by a resistor divider internally. The FB pin is used to sense the output voltage. To

configure the output properly, the FB pin needs to be connected directly as shown in Figure 18 and Figure 19.

INDUCTOR SELECTION

To make sure that the TPS6124x devices can operate, an inductor must be connected between pin V_INand pin

L. A boost converter normally requires two main passive components for storing energy during the conversion. A

boost inductor and a storage capacitor at the output are required. To select the boost inductor, it is

recommended to keep the possible peak inductor current below the current limit threshold of the power switch in

the chosen configuration. The highest peak current through the inductor and the switch depends on the output

load, the input (V_IN), and the output voltage (V_OUT). Estimation of the maximum average inductor current can be

done using Equation 2.

V_OUT

I_{L_MAX}» I_OUT

´

η ´ V

IN

(2)

For example, for an output current of 200mA at 5.0V V_OUT, at least 540mA of average current flows through the

inductor at a minimum input voltage of 2.3V.

The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is

advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the

magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,

regulation time at load changes rises. In addition, a larger inductor increases the total system size and cost. With

these parameters, it is possible to calculate the value of the minimum inductance by using Equation 3.

V

´

V

- V

OUT IN

(

DI_L´ f ´ V_OUT

)

IN

L_MIN

»

(3)

Parameter f is the switching frequency and ΔI_Lis the ripple current in the inductor, i.e., 20% x I_L. In this example,

the desired inductor has the value of 1.7 µH. With this calculated value and the calculated currents, it is possible

to choose a suitable inductor. In typical applications a 1.0 µH inductance is recommended. The device has been

optimized to operate with inductance values between 1.0 µH and 2.2 µH. It is recommended that inductance

values of at least 1.0 µH is used, even if Equation 3 yields something lower. Care has to be taken that load

transients and losses in the circuit can lead to higher currents as estimated in Equation 3. Also, the losses in the

inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit

efficiency.,

With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated.

Equation 4 shows how to calculate the peak current I.

V

´ D

I

V

- V

OUT IN

IN

OUT

I

=

+

with D =

L(peak)

2 ´ f ´ L

(1 - D) ´ η

V

OUT

(4)

This would be the critical value for the current rating for selecting the inductor. It also needs to be taken into

account that load transients and error conditions may cause higher inductor currents.

Table 1. List of Inductors

Manufacturer

Series

Dimensions

TOKO

MDT2012-CH1R0AN

KSLI-201210AG-1R0

KSLI-201610AG-1R0

LQM21PN1R0MC0

MIPS2012D1R0-X2

2.0 x 1.2 x 1.0 max. height

2.0 x 1.6 x 1.0 max. height

2.0 x 1.2 x 0.55 max. height

2.0 x 1.2 x 1.0 max. height

Hitachi Metals

Murata

FDK

14

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www.ti.com .............................................................................................................................................................. SLVS806A–APRIL 2009–REVISED MAY 2009

INPUT CAPACITOR

At least 2.2µF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior

of the total power supply circuit. It is recommended to place a ceramic capacitor as close as possible to the VIN

and GND pins

OUTPUT CAPACITOR

For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the

V_OUTand GND pins of the IC. If, for any reason, the application requires the use of large capacitors which can

not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is recommended.

This small capacitor should be placed as close as possible to the V_OUTand GND pins of the IC. To get an

estimate of the recommended minimum output capacitance, Equation 5 can be used.

I_OUT´ V

- V

IN

(

f ´ DV ´ V_OUT

)

OUT

C_min

=

(5)

Parameter f is the switching frequency and ΔV is the maximum allowed ripple.

With a chosen ripple voltage of 10 mV, a minimum effective capacitance of 2.7 µF is needed. The total ripple is

larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using

ΔV_ESR= I_OUTx R_ESR

A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain

control loop stability. There are no additional requirements regarding minimum ESR. There is no upper limit for

the output capacitance value. Larger capacitors cause lower output voltage ripple as well as lower output voltage

drop during load transients.

Note that ceramic capacitors have a DC Bias effect, which will have a strong influence on the final effective

capacitance needed. Therefore the right capacitor value has to be chosen very carefully. Package size and

voltage rating in combination with material are responsible for differences between the rated capacitor value and

the effective capacitance.

CHECKING LOOP STABILITY

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:

•

Switching node, SW

Inductor current, I_L

Output ripple voltage, V_O(AC)

These are the basic signals that need to be measured when evaluating a switching converter. When the

switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the

regulation loop may be unstable. This is often a result of board layout and/or L-C combination.

As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between

the application of the load transient and the turn on of the P-channel MOSFET, the output capacitor must supply

all of the current required by the load. V_Oimmediately shifts by an amount equal to ΔI_(LOAD)× ESR, where ESR is

the effective series resistance of C_O. ΔI_(LOAD)begins to charge or discharge C_Ogenerating a feedback error

signal used by the regulator to return V_Oto its steady-state value. The results are most easily interpreted when

the device operates in PWM mode. During this recovery time, V_Ocan be monitored for settling time, overshoot or

ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase

margin. Because the damping factor of the circuitry is directly related to several resistive parameters (e.g.,

MOSFET r_DS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage

range, load current range, and temperature range.

LAYOUT CONSIDERATIONS

As for all switching power supplies, the layout is an important step in the design, especially at high peak currents

and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as

well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground

tracks. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC.

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Use a common ground node for power ground and a different one for control ground to minimize the effects of

ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback

divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it

is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift

problems, which can occur due to superimposition of power ground current and control ground current.

16

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www.ti.com .............................................................................................................................................................. SLVS806A–APRIL 2009–REVISED MAY 2009

LAYOUT GUIDELINES

V_IN

GND

C_I

L

C_O

EN

Figure 20. Suggested Layout (Top)

THERMAL INFORMATION

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires

special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added

heat sinks, and convection surfaces, and the presence of other heat-generating components, affect the

power-dissipation limits of a given component.

Three basic approaches for enhancing thermal performance are listed below:

•

Improving the power dissipation capability of the PCB design

Improving the thermal coupling of the component to the PCB

Introducing airflow into the system

The maximum recommended junction temperature (T_J) of the TPS6124x devices is 105°C. The thermal

resistance of the 6-pin CSP package (YFF-6) is R_θJA= 125°C/W. Regulator operation is specified to a maximum

steady-state ambient temperature T_Aof 85°C. Therefore, the maximum power dissipation is about 160 mW.

P_D(Max)= [T_J(max)-T_A] / θ_JA= [105°C - 85°C] / 125°C/W = 160mW

CHIP SCALE PACKAGE DIMENSIONS

The TPS6124x device is available in a 6-bump chip scale package (YFF, NanoFree^TM). The package dimensions

are given as:

•

D = 1.30 ±0.03 mm

E = 0.926 ±0.03 mm

Chip Scale Package

(Bottom View)

Chip Scale Package

(Top View)

A2

B2

C2

A1

B1

C1

YMSCC

LLLL

A1

D

Code:

• YM - Year Month date code

• S - Assembly site code

• CC - Chip Code

E

• LLLL - Lot trace code

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PACKAGE OPTION ADDENDUM

www.ti.com

18-May-2009

PACKAGING INFORMATION

Orderable Device

TPS61240DRVR

TPS61240DRVT

TPS61240YFFR

TPS61240YFFT

TPS61241YFFR

TPS61241YFFT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SON

DRV

6

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

DRV

YFF

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

DSBGA

3000 Green (RoHS &

no Sb/Br)

SNAGCU

Level-1-260C-UNLIM

250 Green (RoHS &

no Sb/Br)

3000 Green (RoHS &

no Sb/Br)

250 Green (RoHS &

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

22-May-2009

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) W1 (mm)

(mm) (mm) Quadrant

TPS61240DRVR

TPS61240DRVT

SON

DRV

6

3000

250

179.0

8.4

2.2

1.2

4.0

8.0

Q2

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

22-May-2009

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS61240DRVR

TPS61240DRVT

SON

DRV

6

3000

250

195.0

200.0

45.0

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

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Products

Amplifiers

Applications

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Medical

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Clocks and Timers

Interface

www.ti.com/automotive

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

型号:	TPS61240DRVR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	SON
包装说明：	SON-6
针数：	6
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	6 weeks
风险等级：	0.85
Is Samacsys：	N
其他特性：	ALSO HAS PFM CONTROL TECHNIQUE
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	5.5 V
最小输入电压：	2.3 V
标称输入电压：	3.6 V
JESD-30 代码：	S-PDSO-N6
JESD-609代码：	e4
长度：	2 mm
湿度敏感等级：	1
功能数量：	1
端子数量：	6
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	0.45 A
最大输出电压：	5 V
最小输出电压：	5 V
标称输出电压：	5 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	HVSON
封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified
座面最大高度：	0.8 mm
表面贴装：	YES
切换器配置：	BOOST
最大切换频率：	3500 kHz
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	2 mm
Base Number Matches：	1

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