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产品型号TPS62125DSGR的概述

芯片概述 TPS62125DSGR是一款由德州仪器（Texas Instruments）公司开发的高效降压转换器。这款芯片专为便携式和小型电子设备设计，具备极佳的转换效率与超低待机功耗，广泛应用于移动设备、电池供电的系统、工业电子及汽车应用等领域。TPS62125DSGR采用了集成的电源管理设计理念，可以高效地将更高电压的电源转换为较低的电压，满足各种数字电路和模拟电路的需求。详细参数在了解 TPS62125DSGR 的功能特性之前，首先需要关注其关键的电气参数： - 输入电压范围：TPS62125支持的输入电压范围为 4.5V 到 17V，能够适应多种电源环境。 - 输出电压范围：输出电压可调，范围为 0.8V 到 6V；此特性极为重要，可以依据负载需求调整输出电压。 - 输出电流：最大输出电流可达到 3A，使其能够支持相对高功耗的设备。 - 转换效率：在典型应...

产品型号TPS62125DSGR的Datasheet PDF文件预览

TPS62125

www.ti.com

SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

3V-17V, 300mA Step Down Converter With Adjustable Enable Threshold And Hysteresis

Check for Samples: TPS62125

FEATURES

DESCRIPTION

The TPS62125 is a high efficiency synchronous step

down converter optimized for low and ultra low power

applications providing up to 300mA output current.

The wide input voltage range of 3V to 17V supports

four cell alkaline and 1 to 4 cell Li-Ion batteries in

series configuration as well as 9V to 15V powered

applications. The device includes a precise low power

enable comparator which can be used as an input

supply voltage supervisor (SVS) to address system

specific power up and down requirements. The

enable comparator consumes only 6µA quiescent

current and features an accurate threshold of 1.2V

typical as well as an adjustable hysteresis. With this

feature, the converter can generate a power supply

rail by extracting energy from a storage capacitor fed

•

Wide Input Voltage Range 3V to 17V

Input SVS (Supply Voltage Supervisor) with

Adjustable Threshold / Hysteresis Consuming

typ. 6µA Quiescent Current

•

Wide Output Voltage Range 1.2V to 10V

Typ. 13 µA Quiescent Current

350nA typ. Shutdown Current

Seamless Power Save Mode Transition

DCS-Control^TMScheme

Low Output Ripple Voltage

Up to 1MHz Switching Frequency

Highest Efficiency over Wide V_INand V_OUT

Range

from high impedance sources such as solar panels or

current loops. With its DCS - Control

scheme the

•

Pin to Pin Compatible with TPS62160/70

100% Duty Cycle Mode

converter provides power save mode operation to

maintain highest efficiency over the entire load

current range. At light loads the converter operates in

PFM mode (pulse frequency modulation) and

transitions seamlessly and automatically in PWM

(pulse width modulation) mode at higher load

currents. The DCS - Control^TMscheme is optimized

for low output ripple voltage in PFM mode in order to

reduce output noise to a minimum and features

excellent AC load regulation. An open drain power

good output indicates once the output voltage is in

regulation.

Power Good Open Drain Output

Output Discharge Function

Small 2x2mm²SON 8 pin Package

APPLICATIONS

•

Embedded processing

4 cell alkaline, 1-4 cell Li-Ion battery powered

applications

•

9V - 15V standby power supply

Energy harvesting

Inverter (negative VOUT)

10mA

100mA

V_OUT= 3.3V

up to 300mA

TPS62125

250mA

V_IN= 4V to 17V

L 15µH

VIN

1.0mA

R₁

1.8M

C_OUT

10µF

VOS

C_IN

10µF

R₂

0.25mA

576k

EN_hys

GND

V_OUT= 3.3V

L = 15mH VLF302515

C_OUT= 10mF

R_pullup

0.1mA

PWR GOOD

10 11 12 13 14 15 16 17

Input Voltage V_IN(V)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS62125

SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PART NUMBER⁽¹⁾

V_OUT

adjustable

1.8V

PACKAGE MARKING

TPS62125

TPS62126⁽²⁾

SAQ

TBD

–40°C to 85°C

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com

(2) samples available, contact TI for further information

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

MIN

- 0.3

– 0.3

- 0.3

– 0.3

MAX

VIN

V_IN+0.3V

(2)

Pin voltage range

3.6

VOS, PG

EN_hys

I_PG

Power Good sink

current

EN_hys sink current

I_{EN_hys}

HBM Human body model

CDM Charge device model

Machine model

ESD rating⁽³⁾

100

125

150

Maximum operating junction temperature, T_J

Storage temperature range, T_stg

–40

–65

°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal GND.

(3) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF

capacitor discharged directly into each pin.

THERMAL INFORMATION

TPS62125

THERMAL METRIC⁽¹⁾

DSG

8 PINS

65.2

93.3

30.1

0.5

UNITS

θ_JA

Junction-to-ambient thermal resistance

θ_JC(top)

θ_JB

Junction-to-case(top) thermal resistance

Junction-to-board thermal resistance

°C/W

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case(bottom) thermal resistance

ψ_JB

47.4

7.2

θ_JC(bottom)

(1) For more information about traditional and new thermal metrics, see the IC PackageThermal Metrics application report, SPRA953

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

RECOMMENDED OPERATING CONDITIONS

MIN NOM

MAX UNIT

Supply voltage V_IN

200

300

3V ≤ V_IN< 6V

Output current capability

6V ≤ V_IN≤ 17V

Operating ambient temperature T_A⁽¹⁾, (Unless Otherwise Noted)

–40

°C

Operating junction temperature range, T_J

125

(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

have to be derated. Maximum ambient temperature (T_A(max)) is dependent on the maximum operating junction temperature (T_J(max)) and

the maximum power dissipation of the device in the application (P_D(max)). see the IC Package Thermal Metrics application report,

SPRA953.

ELECTRICAL CHARACTERISTICS

T_A= –40°C to 85°C, typical values are at T_A= 25°C (unless otherwise noted), V_IN= 12V

PARAMETER

TEST CONDITIONS

MIN

TYP MAX UNIT

SUPPLY

V_IN

Input voltage range⁽¹⁾

Output voltage range

3.0

1.2

V_OUT

I_OUT= 0mA, Device not switching, EN = V_IN

regulator sleeps

µA

I_OUT= 0mA, Device switching, V_IN= 7.2V,

V_OUT= 1.2V, L = 22µH

I_Q

Quiescent current

µA

V_IN= 5V, EN = 1.1V, enable comparator active,

device DC/DC converter off

V_IN= 5 V = V_OUT, T_A= 25°C, high-side MOSFET

switch fully turned on (100% Mode)

I_Active

I_SD

Active mode current consumption

Shutdown current⁽²⁾

230 275

0.35 2.4

µA

Enable comparator off, EN < 0.4V,

V_OUT= SW = 0 V, V_IN= 5V

Falling V_IN

Rising V_IN

2.8 2.85

2.9 2.95

V_UVLO

Undervoltage lockout threshold

ENABLE COMPARATOR THRESHOLD AND HYSTERESIS (EN, EN_hys)

V_{TH EN ON}

V_{TH EN OFF}

V_{TH EN Hys}

I_{IN EN}

EN pin threshold rising edge

EN pin threshold falling edge

EN pin hysteresis

1.16

1.12

1.20 1.24

1.15 1.19

3.0 V ≤ V_IN≤ 17V

Input bias current into EN pin

EN_hys pin output low

EN = 1.3V

0.4

V_{EN_hyst}

I_{EN_hyst}= 1mA, EN = 1.1V

EN_hyst = 1.3V

I_{IN EN_hyst}

Input bias current into EN_hyst pin

POWER SWITCH

V_IN= 3 V, I = 100mA

V_IN= 12V, I = 100mA

V_IN= 3V, I = 100mA

V_IN= 12V, I = 100mA

2.4

1.5

2.6

1.3

high-side MOSFET on-resistance

R_DS(ON)

Ω

0.75

0.6

low-side MOSFET on-resistance

Switch current limit high-side

MOSFET

I_LIMF

T_SD

V_IN= 12V

600

750 900

Thermal shutdown

Increasing junction temperature

Decreasing junction temperature

150

°C

Thermal shutdown hysteresis

OUTPUT

t_ONmin

Minimum ON time

Minimum OFF time

V_IN= 5V, V_OUT= 2.5 V

V_IN= 5 V

500

t_OFFmin

(1) The part is functional down to the falling UVLO (Under Voltage Lockout) threshold

(2) Current into VIN pin

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ELECTRICAL CHARACTERISTICS (continued)

T_A= –40°C to 85°C, typical values are at T_A= 25°C (unless otherwise noted), V_IN= 12V

PARAMETER

TEST CONDITIONS

MIN

TYP MAX UNIT

Internal reference voltage of error

amplifier

V_{REF_FB}

0.808

Feedback voltage accuracy

Referred to internal reference (V_{REF_FB}

)

–2.5

-0.05

-0.004

2.5

%/V

%/mA

(3)

V_FB

Feedback voltage line regulation

Feedback voltage load regulation

Input bias current into FB pin

I_OUT= 100mA, 5V ≤ V_IN≤ 17V, V_OUT= 3.3V

(3)

V_OUT= 3.3V; I_OUT= 1mA to 300mA, V_IN= 12V

V_FB= 0.8 V

I_{IN_FB}

t_Start

Time from EN high to device starts switching,

V_IN= 5V

Regulator start-up time

µs

t_Ramp

Output voltage ramp time

Leakage current into SW pin⁽⁴⁾

Bias current into VOS pin

Time to ramp up V_OUT= 1.8V, no load

200

I_{LK_SW}

I_{IN_VOS}

1.8 2.85

µA

VOS = V_IN= V_SW= 1.8 V, EN = GND, device in

shutdown mode.

POWER GOOD OUTPUT (PG)

Rising V_FBfeedback voltage

V_{TH_PG}

Power Good threshold voltage

Falling V_FBfeedback voltage

V_OL

PG pin Output low voltage

PG pin Output high voltage

Bias current into PG pin

Current into PG pin I_PG= 0.4mA

Open drain output, external pull up resistor

V_(PG)= 3V, EN = 1.3V, FB = 0.85 V

0.3

V_OH

I_{IN_PG}

(3) VOUT = 3.3V, L = 15µH, C_OUT= 10µF

(4) An internal resistor divider network with typ. 1MΩ total resistance is connected between SW pin and GND.

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

DEVICE INFORMATION

PIN ASSIGNMENTS

DSG PACKAGE

(TOP VIEW)

GND

VIN

VOS

EN_hys

PIN FUNCTIONS

I/O

DESCRIPTION

NAME

GND

VIN

NO.

PWR

GND supply pin.

V_INpower supply pin.

Input pin for the enable comparator. Pulling this pin to GND turns the device into shutdown mode.

The DC/DC converter is enabled once the rising voltage on this pin trips the enable comparator

threshold, V_{TH EN ON}of typ. 1.2V. The DC/DC converter is turned off once a falling voltage on this

pin trips the threshold, V_{TH EN OFF}of typ. 1.15V. The comparator threshold can be increased by

connecting an external resistor to pin EN_hys. See also application section. This pin must be

terminated.

EN_hys

OUT

Enable Hysteresis Open-Drain Output. This pin is pulled to GND when the voltage on the EN pin is

below the comparator threshold V_{TH EN ON}of typ. 1.2V and the comparator has not yet tripped. The

pin is high impedance once the enable comparator has tripped and the voltage at the pin EN is

above the threshold V_{TH EN ON}. The pin is pulled to GND once the falling voltage on the EN pin

trips the threshold V_{TH EN OFF}(1.15V typ.). This pin can be used to increase the hysteresis of the

enable comparator. If not used, tie this pin to GND, or leave it open.

This is the feedback pin for the regulator. An external resistor divider network connected to this pin

sets the output voltage. In case of fixed output voltage option, the resistor divider is integrated and

the pin need to be connected directly to the output voltage.

VOS

This is the output voltage sense pin for the DCS - Control^TMcircuitry. This pin must be connected

to the output voltage of the DC/DC converter.

OUT

This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to

this pin. Do not tie this pin to VIN, VOUT or GND.

Open drain power good output. This pin is internally pulled to GND when the device is disabled or

the output voltage is below the PG threshold. The pin is floating when the output voltage is in

regulation and above the PG threshold. For Power Good indication, the pin van be connected via

a pull up resistor to a voltage rail up to 10V. The pin can sink a current up to 0.4mA and maintain

the specified high / low voltage levels. It can be used to discharge the output capacitor with up to

10mA. In this case the current into the pin must be limited with an appropriate pull up resistor.

More details can be found in the application section. If not used, leave the pin open, or connect to

GND.

Exposed

Exposed Thermal Pad. This pad must be connected to GND.

Thermal PAD

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FUNCTIONAL BLOCK DIAGRAM

ON/

V_REF

V_{REF_FB}

0.808V

Softstart

1.2V

PG Comparator

V_{TH_PG}

UVLO

Comparator

V_REF

VIN

V_UVLO

EN_comp

Comparator

EN_hys

DC-DC

ON/OFF

Peak Current

Limit Comparator

GND

Limit

High Side

VIN

Timer

Control

Logic

DCS

Control

VIN

PMOS

Min. On

VOS

Min. OFF

VOS

Direct Control

& Compensation

Gate Driver

Anti

Shoot-Through

V_{REF_FB}

NMOS

Comparator

Error

amplifier

GND

fixed

VOUT

Thermal

Shutdown

Zero Current

Comparator

PARAMETER MEASUREMENT INFORMATION

TPS62125

V_OUT

V_IN

VIN

R₁

C_OUT

10µF (V_OUT< 3.3V)

C_IN

10µF

2x 10µF (3.3V< V_OUT< 6.7V)

10µF+ 22µF ( V_OUT> 6.7V)

R₂

EN_hys

GND

VOS

R_pullup

PWR GOOD

L: LPS3314 10mH, 15mH, LPS4018 22mH, VLF302515 15mH

C_IN/ C_OUT: 10mF 0805/25V GRM21BR61E106

22mF GRM31CR61 16V X5R, 10mF GRM21B 16V X5R

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

TYPICAL CHARACTERISTICS

Table 1. Table Of Graphs

PARAMETER

FIGURE

vs. Output Current V_OUT= 1.8V, V_OUT= 3.3V, V_OUT= 5V, V_OUT= 6.8V, V_OUT= 8V ,

V_OUT= 10V

Figure 1, Figure 3, Figure 5, Figure 7,

Figure 9, Figure 11

Efficiency

vs. Input Voltage, V_OUT= 1.8V, vs. Input voltage, V_OUT= 3.3V, V_OUT= 5V, V_OUT= 6.8V, Figure 2, Figure 4, Figure 6, Figure 8,

V_OUT= 8V, V_OUT= 10V

Figure 10, Figure 12

vs. Output Current, V_OUT= 3.3V

vs. Input Voltage, V_OUT= 3.3V

vs. Output current, V_OUT= 5.0V

vs. Input Voltage, V_OUT= 5V

vs. Output current, V_OUT= 6.7V

vs. Input Voltage, V_OUT= 6.7V

vs. Output current, V_OUT= 8V

vs. Input Voltage, V_OUT= 8V

Figure 13

Figure 14

Figure 15

Figure 16

Output Voltage V_OUT

Figure 17

Figure 18

Figure 19

Figure 20

peak to peak Output Ripple

Voltage V_OUTpp

vs. Output Current, V_OUT= 3.3V

Figure 21

vs. Output Current, V_OUT= 3.3V

vs. Output Current, V_OUT5.0V

vs. Output Current, V_OUT= 8V

vs. Input Voltage

Figure 22

Figure 23

Figure 24

Figure 25

Figure 26

Figure 27

Figure 28

Figure 29

Figure 30

Figure 31

Figure 32

Figure 33

Figure 34

Figure 35

Figure 36

Figure 37

Figure 38

Figure 39

Figure 40

Figure 41

Switching frequency f_SW

Shutdown current

vs. Input Voltage

Quiescent Current

vs. EN Voltage, rising VEN

vs. EN Voltage, falling VEN

EN Comparator Thresholds vs. Input Voltage

High Side Switch

R_DSON

Low Side Switch

Power Save Mode V_OUT=3.3V, I_OUT= 1mA

PWM Mode V_OUT= 3.3V, I_OUT= 100mA

Load Transient 5mA to 200mA, V_OUT= 3.3V

AC Load Regulation 5mA to 200mA 10kHz, V_OUT= 3.3V

Load Transient 1mA to 50mA, V_OUT= 5V

Load Transient 10mA to 200mA, V_OUT= 5V

AC Load Regulation V_OUT= 5V

Typical Operation

Line transient response

Hotplug

V_IN= 9V to 12V, I_OUT= 100mA

V_INovershoot exceeding Abs Max ratings

V_INovershoot reduction with additional tantalum polymer capacitor

Short circuit and overcurrent

protection

Figure 42

Input SVS Operation

V_OUT= 5.0V

Figure 43

Figure 44

No Input SVS Operation

V_OUT= 5.0V, V_INtracks V_OUT

Operation from a 0.5mA

current source

V_OUT3.3V, 20mA pulse load

Figure 45

1.8V V_OUT

3.3V V_OUT

5V V_OUT

Figure 46

Figure 47

Figure 48

Figure 49

Figure 50

Figure 51

Figure 52

Startup

8V V_OUT

EN On/Off

Output Discharge

using PG pin, triggered by EN Comparator

V_OUTramp down with falling VIN

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10mA

100mA

250mA

1.0mA

VIN = 3V

VIN = 5V

VIN = 7.5V

VIN = 9V

VIN = 12V

VIN = 15V

V_OUT= 1.8V

L = 15mH LPS3314

C_OUT= 10mF

0.25mA

V_OUT= 1.8V

L = 15mH LPS3314

C_OUT= 10mF

0.1mA

0.01

0.1

100

1000

9 10 11 12 13 14 15 16 17

Input Voltage V_IN(V)

Output Current I_OUT(mA)

Figure 1. Efficiency vs. Output Current V_OUT= 1.8V

Figure 2. Efficiency vs. Input Voltage, V_OUT= 1.8V

100

10mA

100mA

250mA

1.0mA

VIN = 4.0V

VIN = 5V

VIN = 7.5V

VIN = 9V

0.25mA

VIN = 12V

VIN = 15V

V_OUT= 3.3V

L = 15mH VLF302515

C_OUT= 10mF

V_OUT= 3.3V

L = 15mH VLF302515

C_OUT= 10mF

0.1mA

0.01

0.1

100

1000

10 11 12 13 14 15 16 17

Output Current (mA)

Input Voltage V_IN(V)

Figure 3. Efficiency vs. Output current, V_OUT= 3.3V

Figure 4. Efficiency vs. Input voltage, V_OUT= 3.3V

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100

100mA

10mA

250mA

1.0mA

V_IN= 6.0V

V_IN= 7.5V

V_IN= 9.0V

V_IN= 12V

V_IN= 15V

0.25mA

V_OUT= 5V

L = 10mH LPS3314

C_OUT= 2x10mF

V_OUT= 5V

L = 10mH LPS3314

C_OUT= 2x10mF

0.1mA

10 11 12 13 14 15 16 17

Input Voltage V_IN(V)

0.01

0.1

100

1000

Output Current I_OUT(mA)

Figure 5. Efficiency vs. Output Current, V_OUT= 5V

Figure 6. Efficiency vs. Input Voltage, V_OUT= 5V

100

10mA

100mA

250mA

1.0mA

VIN = 7.5V

VIN = 9V

VIN = 12V

VIN = 15V

0.25mA

V_OUT= 6.7V

L = 10mH LPS3314

C_OUT= 2x10mF

L = 10mH LPS3314

C_OUT= 2x10mF

0.1mA

0.01

0.1

100

1000

11 13

Input Voltage V_IN(V)

Output Currernt I_OUT(mA)

Figure 7. Efficiency vs. Output current, V_OUT= 6.8V

Figure 8. Efficiency vs. Input Voltage, V_OUT= 6.8V

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100

100mA

10mA

250mA

1.0mA

VIN = 9.0V

VIN = 12V

VIN = 15V

0.25mA

V_OUT= 8V

L = 10mH LPS3314

C_OUT= 10mF+22mF

V_OUT= 8V

0.1mA

L = 10mH LPS3314

C_OUT= 10mF + 22mF

0.01

0.1

100

1000

Output Current I_OUT(mA)

Input Voltage V_IN(V)

Figure 9. Efficiency vs. Output Current, V_OUT= 8V

Figure 10. Efficiency vs. Input Voltage, V_OUT= 8V

100

10mA

100mA

250mA

1.0mA

VIN = 12V

VIN = 15V

0.25mA

V_OUT= 10V

L = 10mH LPS3314

C_OUT= 10mF + 22mF

0.1mA

V_OUT= 10V

L = 10mH LPS3314

C_OUT= 10mF+22mF

0.01

0.1

Output Currernt I_OUT(mA)

100

1000

14 15

Input Voltage V_IN(V)

Figure 11. Efficiency vs. Output Current, V_OUT= 10V

Figure 12. Efficiency vs. Input Voltage, V_OUT= 10V

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3.4

3.35

3.3

3.432

V_OUT3.3V

L = 15mH,

C_OUT= 10mF

3.399

3.366

3.333

3.300

3.267

3.234

L = 15mH,

C_OUT= 10mF

V_IN= 5V, T_A= -40°C

V_IN= 7.5V, T_A= -40°C

V_IN= 12V, T_A= -40°C

I_OUT= 1mA

V_IN= 5V, T_A= 25°C

I_OUT= 25mA

I_OUT= 100mA

I_OUT= 150mA

V_IN= 7.5V, T_A= 25°C

V_IN= 12V, T_A= 25°C

V_IN= 5V, T_A= 85°C

V_IN= 7.5V, T_A= 85°

V_IN= 12V, T_A= 85°

3.25

3.2

10 11 12 13 14 15 16 17

Input Voltage (V)

0.01

0.1

100

1000

Output Current [mA]

Figure 13. Output Voltage vs. Output Current, V_OUT= 3.3V

Figure 14. Output Voltage vs. Input Voltage, V_OUT= 3.3V

5.15

5.20

V_OUT5.0V

V_IN= 7.5V, T_A= 25°C

L = 10mH,

C_OUT= 2x10mF

5.1

5.15

5.10

5.05

5.00

4.95

4.90

L = 10mH,

C_OUT= 2x10mF

V_IN= 12V, T_A= 25°C

V_IN= 7.5V, T_A= -40°C

V_IN= 12V, T_A= -40°C

V_IN= 7.5V, T_A= 85°

V_IN= 12V, T_A= 85°

5.05

I_OUT= 1mA

I_OUT= 25mA

4.95

I_OUT= 100mA

I_OUT= 250mA

4.9

4.85

0.01

0.1

100

1000

Output Current [mA]

Input Voltage (V)

Figure 15. Output Voltage vs. Output current, V_OUT= 5.0V

Figure 16. Output Voltage vs. Input Voltage, V_OUT= 5V

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6.968

6.901

6.9

6.85

6.8

V_OUT6.7V

L = 10mH,

C_OUT= 2x10mF

V_IN= 12V, T_A= 25°C

V_IN= 12V, T_A= -40°C

V_IN= 9V, T_A= -40°C

V_IN= 9V, T_A= 25°C

6.834

6.767

6.700

6.633

6.566

6.75

6.7

6.65

6.6

V_IN= 9V, T_A= 85°

V_IN= 12V, T_A= 85°

I_OUT= 1mA

I_OUT= 25mA

I_OUT= 100mA

I_OUT= 250mA

V_OUT6.7V

L = 10mH,

C_OUT= 2x10mF

6.55

6.5

0.01

0.1

100

1000

12 13

Input Voltage [V]

Output Current [mA]

Figure 17. Output Voltage vs. Output Current, V_OUT= 6.7V

Figure 18. Output voltage vs. Input voltage, V_OUT= 6.7V

8.24

8.32

V_OUT8.0V

L = 10mH,

C_OUT= 10mF + 22mF

V_OUT8.0V

8.16

8.08

8.24

8.16

8.08

8.00

7.92

7.84

L = 10mH,

C_OUT= 10mF + 22mF

V_IN= 15V, T_A= -40°C

V_IN= 15V, T_A= 25°C

V_IN= 12V, T_A= -40°C

7.92

7.84

7.76

I_OUT= 1mA

V_IN= 12V, T_A= 25°C

V_IN= 12V, T_A= 85°

V_IN= 15V, T_A= 85°

I_OUT= 25mA

I_OUT= 100mA

I_OUT= 250mA

0.01

0.1

100

1000

Output Current [mA]

Input Voltage [V]

Figure 19. Output Voltage vs. Output Current, V_OUT= 8V

Figure 20. Output Voltage vs. Input Voltage, V_OUT= 8V

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1000

900

800

700

600

500

400

300

200

100

V_IN= 12V

V_OUT= 3.3V

L = 15mH

C_OUT= 10mF

V_IN= 15V

V_IN= 7.5V

V_IN= 5V

V_IN= 5.0V

V_IN= 7.5V

V_IN= 12V

V_IN= 15V

V_OUT= 3.3V

L = 15mH

C_OUT= 10mF

100

150

200

250

300

100

150

200

250

300

Output Current (mA)

Figure 21. Output Ripple Voltage vs. Output Current, V_OUT

= 3.3V

Figure 22. Switch Frequency vs. Output Current, V_OUT

3.3V

1200

V_IN= 15V

1100

1000

900

800

700

600

500

400

300

200

100

1100

V_IN= 15V

V_IN= 12V

1000

V_IN= 7.5V

900

800

700

600

500

400

V_IN= 10V

V_OUT= 5.0V

300

V_OUT= 8.0V

L = 10mH

C_OUT= 2x10mF

L = 10mH

C_OUT= 10mF + 22mF

200

100

150

200

250

300

100

150

Output Current (mA)

200

250

300

Output Current (mA)

Figure 23. Switch Frequency vs. Output Current, V_OUT5.0V

Figure 24. Switch Frequency vs. Output Current, V_OUT

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1.5

1.4

1.3

1.2

1.1

1.0

0.9

T_A= 85°C

T_A= 60°C

I_Qno switching: T_A= 85°C

I_Qno switching: T_A= 60°C

T_A= 25°C

T_A= 0°C

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

I_Qno switching: T_A= 25°C

I_Qno switching: T_A= -40°C

T_A= -40°C

I_Qdevice switching: T_A= 25°C,

V_OUT= 1.8V, I_OUT= 0mA no load,

EN = V_IN

10 11 12 13 14 15 16 17

Input Voltage (V)

Input Voltage - V_IN[V]

Figure 25. Shutdown Current vs. Input Voltage

Figure 26. Quiescent Current vs. Input Voltage

1000

V_IN= 6V T_A= 85°C

100

V_IN= 12V T_A= 85°C

V_IN= 6V T_A= 25°C

V_IN= 12V T_A= 25°C

V_IN= 6V T_A= 25°C

V_IN= 6V T_A= 85°C

V_IN= 6V T_A= -40°C

V_IN= 12V T_A= 25°C

V_IN= 12V T_A= 85°C

V_IN= 12V T_A= −40°C

V_IN= 6V T_A= -40°C

V_IN= 12V T_A= −40°C

0.1

200

400

600

800

1000

1200

1400

200

400

600

800

1000

1200

1400

Voltage V_EN(mV)

Figure 27. Quiescent Current vs. EN Voltage, rising V_EN

Figure 28. Quiescent Current vs. V_ENVoltage, falling V_EN

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2.8

2.6

2.4

2.2

1.25

1.245

1.24

1.235

1.23

V_{TH EN ON}T_A= 25°C

1.225

1.22

T_A= 85°C

T_A= 60°C

V_{TH EN ON}T_A= -40°C

V_{TH EN ON}T_A= 85°C

1.215

1.21

1.8

1.6

1.4

1.2

1.205

1.2

1.195

1.19

1.185

1.18

T_A= 25°C

T_A= 0°C

V_{TH EN OFF}T_A= 25°C

V_{TH EN OFF}T_A= -40°C

T_A= -40°C

0.8

0.6

0.4

0.2

1.175

1.17

V_{TH EN OFF}T_A= 85°C

1.165

1.16

1.155

1.15

10 11 12 13 14 15 16 17

Input Voltage V_IN[V]

10 11 12 13 14 15 16 17

Input Voltage V_IN(V)

Figure 29. EN Comparator Thresholds vs. Input Voltage

Figure 30. R_DSONHigh Side Switch

1.25

1.245

1.24

V_IN= 12V

V_OUT= 3.3 V

3.3V offset, 50mV/Div

I_Load= 1mA

L = 15 mH

C_OUT= 10 mF

1.235

1.23

V_{TH EN ON}T_A= 25°C

1.225

1.22

V_{TH EN ON}T_A= -40°C

V_{TH EN ON}T_A= 85°C

1.215

1.21

1.205

1.2

SW pin 10V/Div

1.195

1.19

1.185

1.18

V_{TH EN OFF}T_A= 25°C

Inductor current 200mA/Div

1.175

1.17

V_{TH EN OFF}T_A= -40°C

V_{TH EN OFF}T_A= 85°C

1.165

1.16

1.155

1.15

10 11 12 13 14 15 16 17

Input Voltage V_IN(V)

Figure 31. R_DSONLow Side Switch (Rectifier)

Figure 32. Power Save Mode V_OUT=3.3V, I_OUT= 1mA

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V_IN= 12V

V_OUT= 3.3 V

3.3V offset, 50mV/Div

I_Load= 100mA

L = 15 mH

C_OUT= 10 mF

V_IN= 12V

V_OUT= 3.3 V

3.3V offset, 50mV/Div

L = 15 mH

C_OUT= 10 mF

SW pin 10V/Div

I_OUT

SW pin 10V/Div

5mA to 200mA

200mA/Div

Inductor current

200mA/Div

Inductor current 200mA/Div

Figure 33. PWM Mode V_OUT= 3.3V, I_OUT= 100mA

Figure 34. Load Transient 5mA to 200mA, V_OUT= 3.3V

V_IN= 12V

V_OUT= 3.3 V

3.3V offset, 50mV/Div

L = 15 mH

C_OUT= 10 mF

V_IN= 12V

L = 10 mH

V_OUT= 5.0 V

C_OUT= 2x 10 mF

5V offset, 50mV/Div

SW pin 10V/Div

I_OUT

AC 10kHz

Inductor current 200mA/Div

5mA to 200mA

200mA/Div

Inductor current

200mA/Div

I_Load= 1mA to 50mA

50mA / Div

Figure 35. AC Load Regulation, V_OUT= 3.3V

Figure 36. Load Transient 1mA to 50mA, V_OUT= 5V

V_IN= 12V

L = 10 mH

V_OUT= 5.0 V

C_OUT= 2x 10 mF

5V offset, 50mV/Div

Inductor current 200mA/Div

I_Load= 10mA to 200mA

200mA / Div

I_Load= AC 5kHz 1mA to 250mA

200mA / Div

Figure 37. Load Transient 10mA to 200mA, V_OUT= 5V

Figure 38. AC Load Regulation V_OUT= 5V

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V_IN= 12V, Hotplug

V_INovershoot 25V

V_IN= 9V to 12V

I_OUT= 100mA

L = 15 mH

C_IN= 10mF ceramic capacitor

C_OUT= 10 mF

V_OUT

= 3.3 V, 50mV/Div

Current into

input capacitor 20A/div

I_IN

Figure 39. Line transient response V_IN= 9V to 12V

Figure 40. V_INHotplug overshoot

V_OUT= 5.0 V

2V/Div

V_IN= 12V, Hotplug

V_IN= 12V

C_IN= 10uF ceramic

+ 22uF Poscap

C_IN= 10mF

V_INovershoot reduction

to 15V

additional 22mF

tantalum-polymer input capacitor

type Poscap 20TQC22MYFB

V_OUT

Startup

L = 10 mH

C_OUT= 2x 10 mF

I_IN

200mA/Div

Current into C_IN

1A/Div

Current into

input capacitors 20A/div

I_IN

Short

I_OUT= 10mA

I_OUT

1A/Div

Figure 41. V_INHotplug overshoot reduction with Poscap

Figure 42. Short circuit and overcurrent protection

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V_IN: ramped up/down

0V to 12V, 175mV/ms

2.5V/Div

V_IN: ramped up/down

0V to 12V, 175mV/ms

2.5V/Div

V_OUT= 5.0 V

L = 10 mH

V_OUT= 5.0 V

L = 10 mH

C_OUT= 2x10 mF

Load = 100W

V_{IN_Start}= 10V

C_OUT= 2x10 mF

Load = 100W

EN = V_IN

R_EN1= 820kW

R_EN2= 110kW

R_EN2= 82kW

V_{IN_Stop}= 6V

V_INtracks V_OUT

UVLO

V_OUT

2.5V/Div

V_OUT

2.5V/Div

5V/Div

I_IN

200mA/Div

I_IN

200mA/Div

Figure 43. Input supply voltage supervisor (SVS), V_OUT

5.0V

Figure 44. Operation with EN = V_IN, V_INtracks V_OUT

V_IN: 0.5mA current source

2.5V/Div

R_EN1= 680kW

CIN = 10mF ceramic + 22mF Poscap

V_IN=12V

V_OUT= 1.8 V

L = 15 mH

R_EN2= 110kW

R_EN2= 120kW

V_{IN_startup}= 6.82V

V_{IN_stop}= 4.55V

C_OUT= 10 mF

Load = 180W

V_OUT= 3.3 V

L = 15 mH, C_OUT= 10 mF

7ms/20mA Pulse Load

V_OUT

2.0V/Div

Startup in 20mA Load

I_OUT

20mA/Div

0.5mA Source Current

I_IN: 0.5mA/Div

Figure 45. 0.5mA current source, 20mA pulse load

Figure 46. Startup 1.8V V_OUT

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V_IN=12V

V_OUT= 3.3 V

L = 15 mH

V_OUT= 5.0 V

L = 10 mH

C_OUT= 10 mF

Load = 330W

C_OUT= 2x10 mF

Load = 500W

Figure 47. Startup 3.3V V_OUT

Figure 48. Startup 5.0V V_OUT

V_IN= 12V

V_OUT= 3.3 V

C_OUT= 10uF

V_IN=12V

V_OUT= 8.0 V

L = 10 mH

L = 15mH

R_Load= 100 W

R_{Pullup PG}= 100kW to V_OUT

C_OUT= 2x10 mF

Load = 800W

1V/Div

2V/Div

1V/Div

Figure 49. Startup 8V V_OUT

Figure 50. V_OUTRamp up/down with EN on/off

V_IN= 12V to 0V

V_OUT= 3.3 V

C_OUT= 10uF

V_IN= 12V to 0V

V_OUT= 3.3 V

C_OUT= 10uF

V_{IN_stop}= 4.55V

R_EN1= 680kW

R_EN2= 110kW

R_{EN_hys}= 120kW

V_{IN_stop}= 4.55V

R_EN1= 680kW

R_EN2= 110kW

R_{EN_hys}= 120kW

V_IN

2V/Div

V_IN

1V/Div

L = 15mH

I_OUT= 0mA

L = 15mH

I_OUT= 0mA

R_{Pullup PG}= 0W to V_OUT

R_{Pullup PG}= 100kW to V_OUT

V_OUT

1V/Div

V_OUT

1V/Div

Figure 51. Output discharge using PG pin, triggered by EN

Comparator

Figure 52. V_OUTramp down with falling V_IN, schematic

Figure Figure 60

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DETAILED DESCRIPTION

DCS - Control^TM

The TPS62125 high efficiency synchronous switch mode buck converter includes TI's DCS - Control™ (Direct

Control with Seamless Transition into Power Save Mode), an advanced regulation topology, which combines the

advantages of hysteretic and voltage mode control. Characteristics of DCS - Control^TMare excellent AC load

regulation and transient response, low output ripple voltage and a seamless transition between PFM and PWM

mode operation.

DCS - Control^TMincludes an AC loop which senses the output voltage (VOS pin) and directly feeds the

information to a fast comparator stage. This comparator sets the switching frequency, which is constant for

steady state operating conditions, and provides immediate response to dynamic load changes. In order to

achieve accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation

network achieves fast and stable operation with small external components and low ESR capacitors. The DCS -

Control^TMtopology supports PWM (Pulse Width Modulation) mode for medium and high load conditions and a

Power Save Mode at light loads. During PWM mode, it operates in continuous conduction. The switch frequency

is up to 1MHz with a controlled frequency variation depending on the input voltage. If the load current decreases,

the converter seamless enters Power Save Mode to maintain high efficiency down to very light loads. In Power

Save Mode the switching frequency varies linearly with the load current. Since DCS - Control^TMsupports both

operation modes within one single building block, the transition from PWM to Power Save Mode is seamless

without effects on the output voltage. The TPS62125 offers both excellent DC voltage and superior load transient

regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.

At high load currents the converter operates in quasi fixed frequency PWM mode operation and at light loads in

PFM (Pulse Frequency Modulation) mode to maintain highest efficiency over the full load current range. In PFM

Mode, the device generates a single switching pulse to ramp up the inductor current and recharge the output

capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve a quiescent

current of typically 13µA. During this time, the load current is supported by the output capacitor. The duration of

the sleep period depends on the load current and the inductor peak current.

Pulse Width Modulation (PWM) Operation

The TPS62125 operates with pulse width modulation in continuous conduction mode (CCM) with a nominal

switching frequency of about 1MHz. The frequency variation in PWM mode is controlled and depends on VIN,

VOUT and the inductance. The device operates in PWM mode as long the output current is higher than half the

inductor's ripple current. To maintain high efficiency at light loads, the device enters Power Save Mode at the

boundary to discontinuous conduction mode (DCM). This happens if the output current becomes smaller than

half the inductor's ripple current.

Power Save Mode

With decreasing load current, the TPS62125 transitions seamlessly from PWM Mode to Power Save Mode once

the inductor current becomes discontinuous. This ensures a high efficiency at light loads. In Power Save Mode

the converter operates in Pulse Frequency Modulation (PFM Mode) and the switching frequency decreases

linearly with the load current. DCS - Control^TMfeatures a small and predictable output voltage ripple in Power

Save Mode. The transition between PWM Mode and Power Save Mode occurs seamlessly in both directions.

The minimum On Time T_ONminfor a single pulse can be estimated by:

V_OUT

T_ON

´1ms

V_IN

(1)

(2)

Therefore the peak inductor current in PFM mode is approximately:

- V_OUT

(

)

I_LPFMpeak

´ T_ON

The transition from PFM mode to PWM mode operation and back occurs at a load current of approximately ½

I_LPFMpeak

With:

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T_ON: high-side MOSFET switch on time [µs]

V_IN: Input voltage [V]

V_OUT: Output voltage [V]

L : Inductance [µH]

I_LPFMpeak: PFM inductor peak current [mA]

The maximum switching frequency can be estimated by:

f_{SW max}

= 1MHz

1ms

(3)

100% DUTY CYCLE LOW DROPOUT OPERATION

The device increases the On Time of the high-side MOSFET switch as the input voltage comes close to the

output voltage in order to keep the output voltage in regulation. This reduces the switching frequency.

With further decreasing input voltage VIN, the high-side MOSFET switch is turned on completely. In this case,

the converter provides a low input-to-output voltage difference. This is particularly useful in applications with a

widely variable supply voltage to achieve longest operation time by taking full advantage of the whole supply

voltage span.

The minimum input voltage to maintain output voltage regulation depends on the load current and output voltage,

and can be calculated as:

V_Imin= V_{OUT min}+ I_OUT´ (R_{DSON max}+ R_L)

(4)

With:

I_OUT= output current

R_DS(ON)max= maximum high side switch R_DS(ON)

R_L= DC resistance of the inductor

V_OUTmin= minimum output voltage the load can accept

UNDER-VOLTAGE LOCKOUT

In addition to the EN Comparator, the device includes an under-voltage lockout circuit which prevents the device

from misoperation at low input voltages. Both circuits are fed to an AND gate and prevents the converter from

turning on the high-side MOSFET switch or low-side MOSFET under undefined conditions. The UVLO threshold

is set to 2.9V typical for rising V_INand 2.8V typical for falling V_IN. The hysteresis between rising and falling UVLO

threshold ensures proper start up. Fully functional operation is permitted for an input voltage down to the falling

UVLO threshold level. The converter starts operation again once the input voltage trips the rising UVLO threshold

level and the voltage at the EN pin trips V_{TH_EN_ON}

SOFT START

The TPS62125 has an internal soft-start circuit which controls the ramp up of the output voltage and limits the

inrush current during start-up. This limits input voltage drop.

The soft-start system generates a monotonic ramp up of the output voltage and reaches an output voltage of

1.8V typ. within 240µs after the EN pin was pulled high. For higher output voltages, the ramp up time of the

output voltage can be estimated with a ramp up slew rate of about 12mV/us. TPS62125 is able to start into a pre

biased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to its

nominal value. In case the output voltage is higher than the nominal value, the device starts switching once the

output has been discharged by an external load or leakage current to its nominal output voltage value.

During start up the device can provide an output current of half of the high-side MOSFET switch current limit

I_LIMF. Large output capacitors and high load currents may exceed the current capability of the device during start

up. In this case the start up ramp of the output voltage will be slower.

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ENABLE COMPARATOR (EN / EN_hys)

The EN pin is connected to an On/Shutdown detector (ON/SD) and an input of the Enable Comparator. With a

voltage level of 0.4V or less at the EN pin, the ON/SD detector turns the device into Shutdown mode and the

quiescent current is reduced to typically 350nA. In this mode the EN comparator as well the entire internal-control

circuitry are switched off. A voltage level of typ. 900mV (rising) at the EN pin triggers the ON/Shutdown detector

and activates the internal reference VREF (Typ.1.2V), the EN comparator and the UVLO comparator. In

applications with slow rising voltage levels at the EN pin, the quiescent current profile before this trip point needs

to be considered, see Figure 27. Once the ON/SD detector has tripped, the quiescent current consumption of the

device is typ. 6µA. The TPS62125 starts regulation once the voltage at the EN pin trips the threshold V_{EN_TH ON}

(typ. 1.2V) and the input voltage is above the UVLO threshold. It enters softstart and ramps up the output

voltage. For proper operation, the EN pin must be terminated and must not be left floating. The quiescent current

consumption of the TPS62125 is typ. 13µA under no load condition (not switching). See Figure 25. The DC/DC

regulator stops operation once the voltage on the EN pin falls below the threshold V_{EN_TH OFF}(typ. 1.15V) or the

input voltage falls below UVLO threshold. The enable comparator features a built in hysteresis of typ. 50mV. This

hysteresis can be increased with an external resistor connected to pin EN_hys. See more details in application

information section.

POWER GOOD OUTPUT / OUTPUT DISCHARGE (PG)

The Power Good Output (PG pin) is an open drain output. The circuit is active once the device is enabled. It is

driven by an internal comparator connected to the FB pin voltage and an internal reference. The PG output

provides a high level (open drain high impedance) once the feedback voltage exceeds typical 95% of its nominal

value. The PG output is driven to low level once the FB pin voltage falls below typ. 90% of its nominal value

V_{REF_FB}. The PG output goes high (high impedance) with a delay of typically 2µs. A pull up resistor is needed to

generate a high level. The PG pin can be connected via a pull up resistors to a voltage up to 10V. This pin can

also be used to discharge the output capacitor. See section Application Information for more details.

The PG output is pulled low if the voltage on the EN pin falls below the threshold V_{EN_TH OFF}or the input voltage

is below the undervoltage lockout threshold UVLO.

SHORT-CIRCUIT PROTECTION

The TPS62125 integrates a high-side MOSFET switch current limit, I_LIMF, to protect the device against a short

circuit. The current in the high-side MOSFET switch is monitored by a current limit comparator and once the

current reaches the limit of I_LIMF, the high-side MOSFET switch is turned off and the low-side MOSFET switch is

turned on to ramp down the inductor current. The high-side MOSFET switch is turned on again once the zero

current comparator trips and the inductor current has become zero. In this case, the output current is limited to

half of the high-side MOSFET switch current limit, ½ I_LIMF, typ. 300mA.

THERMAL SHUTDOWN

As soon as the junction temperature, T_J, exceeds 150°C (typical) the device goes into thermal shutdown. In this

mode, the high-side and low-side MOSFETs are turned-off. The device continues its operation when the junction

temperature falls below the thermal shutdown hysteresis.

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APPLICATION INFORMATION

OUTPUT VOLTAGE SETTING

The output voltage can be calculated by:

R₁

R₂

V_OUT= V_{REF _ FB}´ 1+

R₁

R₂

V_OUT= 0.8V ´ 1+

OUT

R = R ´

-1

0.8V

(5)

The internal reference voltage for the error amplifier,V_{REF_FB}, is nominal 0.808V. However for the feedback

resistor divider selection, it is recommended to use the value 0.800V as the reference. Using this value, the

output voltage sets 1% higher and provides more headroom for load transients as well for line and load

regulation. The current through the feedback resistors R₁and R₂should be higher than 1µA. In applications

operating over full temperature range or in noisy environments, this current may be increased for robust

operation. However, higher currents through the feedback resistors impact the light load efficiency of the

converter.

Table 2 shows a selection of suggested values for the feedback divider network for most common output

voltages.

Table 2. Suggested Values for Feedback Divider Network

Output Voltage

R1 [kΩ]

1.2V

180

360

1.8V

300

240

3.3V

1800

576

1100

210

6.7V

1475

200

1800

200

R2 [kΩ]

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ENABLE THRESHOLD AND HYSTERESIS SETTING

ON/SD

V_REF

1.2V

VIN

V_IN

R_EN1

Comparator

V_{TH_EN}

R_EN2

EN_hys

R_{EN HYS}

GND

Figure 53. Using the Enable Comparator Threshold and Hysteresis for an input SVS (supply voltage

supervisor)

The enable comparator can be used as an adjustable input supply voltage supervisor (SVS) to start and stop the

DC/DC converter depending on the input voltage level. The input voltage level, V_{IN_startup}, at which the device

starts up is set by the resistors R_EN1and R_EN2and can be calculated by :

R_EN1

R_{EN 2}

R_EN1

R_{EN 2}

V_{IN _ startup}= V_{EN _TH _ ON}´ 1+

= 1.2V ´ 1+

(6)

(7)

(8)

The resistor values R_EN1and R_EN2can be calculated by:

V_{IN _ startup}

IN _ startup

R_{EN 1}= R_{EN 2}

- 1 = R_{EN 2}

- 1

V_{EN _ TH _ ON}

1.2V

R_{EN 1}

R_{EN 2}

V_{IN _ startup}

IN _ startup

-1

1.2V

V_{EN _ TH _ ON}

The input voltage level V_{IN_stop}at which the device will stop operation is set by R_EN1, R_EN2and R_{EN HYS}and can

be calculated by:

R_{EN 1}

V_{IN _ stop}= V_{EN _ TH _ OFF}´ 1 +

= 1.15V ´ 1 +

R_{EN 2}+ R_{EN _ hys}

(9)

The resistor value R_{EN_hys}can be calculated according to:

R_EN1

V_{IN _ stop}

R_EN1

R_{EN _ hys}

- R_{EN 2}

IN _ stop

-1

1.15V

V_{EN _ TH _ OFF}

(10)

The current through the resistors R_EN1, R_EN2and R_{EN HYS}should be higher than 1µA. In applications operating

over the full temperature range and in noisy environments, the resistor values can be reduced to smaller values.

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

VIN

DC/DC start

V_{IN_startup}

Hysteresis

V_{IN_stop}

DC/DC stop

VOUT

Proper V_OUTramp up

Figure 54. Using the EN comparator as input SVS for proper V_OUTramp up

POWER GOOD (PG) PULL UP / OUTPUT DISCHARGE RESISTOR

The Power Good open collector output needs an external pull up resistor to indicate a high level. The pull up

resistor can be connected to a voltage level up to 10V. The output can sink current up to 0.4mA with specifed

output low level of less than 0.3V. The lowest value for the pull up resistor can be calculated by:

V_OUT- 0.3V

R_{Pullup min}

0.0004A

(11)

V_OUT

TPS62125

C_OUT

R_Pullup

R_IPG

PG Comparator

V_PG

max 10V

V_{TH_PG}

Power Good

Figure 55. PG open collector output

The PG pin can be used to discharge the output capacitor. The PG output has an internal resistance R_IPGof

typical 600Ω and minimum 400Ω. The maximum sink current into the PG pin is 10mA. In order to limit the

discharge current to the maximum allowable sink current into the PG pin, the external pull up resistor R_{Pull up}can

be calculated to:

V_OUT

R_{Pullup min}

- R_{IPG _ min}

- 400W

I_{PG _ max}

0.01A

(12)

In case a negative value is calculated, the external pull up resistor can be removed and the PG pin can be

directly connected to the output.

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OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)

The external components have to fulfill the needs of the application, but also the stability criteria of the devices

control loop. The TPS62125 is optimized to work within a range of L and C combinations. The LC output filter

inductance and capacitance have to be considered together, creating a double pole, responsible for the corner

frequency of the converter. Table 3 can be used to simplify the output filter component selection.

Table 3. Recommended LC Output Filter Combinations

Output Capacitor Value [µF]⁽²⁾

Inductor Value

[µH]⁽¹⁾

10µF

2 x 10µF

22µF

47µF

V_OUT1.2V - 1.8V

√

(3)

√

VOUT 1.8V - 3.3V

(3)

√

(3)

√

VOUT 3.3V - 5V

√

(3)

√

VOUT 5V - 10V

(3)

√

(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and -30%.

(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by 20% and -50%.

(3) This LC combination is the standard value and recommended for most applications.

More detailed information on further LC combinations can be found in application note SLVA515.

INDUCTOR SELECTION

The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage

ripple and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The

inductor ripple current (ΔI_L) decreases with higher inductance and increases with higher V_INor V_OUTand can be

estimated according to Equation 13.

Equation 14 calculates the maximum inductor current under static load conditions. The saturation current of the

inductor should be rated higher than the maximum inductor current as calculated with Equation 14. This is

recommended because during heavy load transient the inductor current will rise above the calculated value. A

more conservative way is to select the inductor saturation current according to the high-side MOSFET switch

current limit I_LIMF

- V_OUT

(

)

DI_L=

´ T_ON

(13)

(14)

ΔI

= I

outmax

Lmax

With:

T_ON= see equation (3)

L = Inductance

ΔI_L= Peak to Peak inductor ripple current

I_Lmax= Maximum Inductor current

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

In DC/DC converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e. quality

factor) and by the inductor DCR value. To achieve high efficiency operation, care should be taken in selecting

inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces

lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance

usually results in an inductor with lower saturation current.

The total losses of the coil consist of both the losses in the DC resistance (R_DC) and the following frequency-

dependent components:

•

The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)

Additional losses in the conductor from the skin effect (current displacement at high frequencies)

Magnetic field losses of the neighboring windings (proximity effect)

Radiation losses

The following inductor series from different suppliers have been used with the TPS62125.

Table 4. List of Inductors

INDUCTANCE

[µH]

DIMENSIONS

[mm³]

INDUCTOR

TYPE

DCR [Ω]

SUPPLIER

10 / 15

0.33 max / 0.44 max

0.36 max

3.3 x 3.3 x 1.4

3.9 x 3.9 x 1.8

3.0 x 2.5 x 1.5

3.0 x 3.0 x 1.5

3.2 × 2.5 × 1.7

LPS3314

LPS4018

VLF302515

LPS3015

LQH32PN

Coilcraft

TDK

0.33 max

10/15

0.44 max / 0.7 max

0.38 typ.

Coilcraft

Murata

OUTPUT CAPACITOR SELECTION

Ceramic capacitors with low ESR values provide the lowest output voltage ripple and are recommended. The

output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their

wide variation in capacitance over temperature, become resistive at high frequencies.

At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on

the output capacitor value and the PFM peak inductor current. Higher output capacitor values minimize the

voltage ripple in PFM Mode and tighten DC output accuracy in PFM Mode. In order to achieve specified

regulation performance and low output voltage ripple, the DC-bias characteristic of ceramic capacitors must be

considered. The effective capacitance of ceramic capacitors drops with increasing DC - bias Voltage. Due to this

effect, it is recommended for output voltages above 3.3V to use at least 1 x 22µF or 2 x 10µF ceramic capacitors

on the output.

INPUT CAPACITOR SELECTION

Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is

required for best input voltage filtering and minimizing the interference with other circuits caused by high input

voltage spikes. For most applications, a 10µF ceramic capacitor is recommended. The voltage rating and DC

bias characteristic of ceramic capacitors need to be considered. The input capacitor can be increased without

any limit for better input voltage filtering.

For applications powered from high impedance sources, a tantalum polymer capacitor should be used to buffer

the input voltage for the TPS62125. Tantalum polymer capacitors provide a constant capacitance vs. DC bias

characteristic compared to ceramic capacitors. In this case, a 10µF ceramic capacitor should be used in parallel

to the tantalum polymer capacitor to provide low ESR.

Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the

power is being supplied through long wires, such as from a wall adapter, a load step at the output or V_INstep on

the input can induce large ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop

instability or could even damage the part by exceeding the maximum ratings. In case the power is supplied via a

connector e.g. from a wall adapter, a hot-plug event can cause voltage overshoots on the VIN pin exceeding the

absolute maximum ratings and can damage the device, too. In this case a tantalum polymer capacitor or

overvoltage protection circuit reduces the voltage overshoot, see Figure 41.

Table 5 shows a list of input/output capacitors.

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Table 5. List of Capacitor

CAPACITANCE

[µF]

SIZE

CAPACITOR TYPE

USAGE

SUPPLIER

0805

1206

GRM21B 25V X5R

GRM21B 16V X5R

C_IN/C_OUT

C_OUT

Murata

Sanyo

GRM31CR61 16V X5R

C_OUT

B2 (3.5x2.8x1.9)

20TQC22MYFB

C_IN/ input

protection

LAYOUT CONSIDERATIONS

As for all switching power supplies, the layout is an important step in the design. Proper function of the device

demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If

the layout is not carefully done, the regulator could show frequency variations, poor line and/or load regulation,

stability issues as well as EMI problems. It is critical to provide a low inductance, low impedance ground path.

Therefore, use wide and short traces for the paths conducting AC current of the DC/DC converter. The area of

the AC current loop (input capacitor - TPS62125 - inductor - output capacitor) should be routed as small as

possible to avoid magnetic field radiation. Therefore the input capacitor should be placed as close as possible to

the IC pins as well as the inductor and output capacitor. Use a common Power GND node and a different node

for the signal GND to minimize the effects of ground noise. Keep the common path to the GND pin, which returns

both the small signal components and the high current of the output capacitors as short as possible to avoid

ground noise. A well proven practice is to merge small signal GND and power GND path at the exposed thermal

pad. The FB divider network and the FB line should be routed away from the inductor and the SW node to avoid

noise coupling. The VOS line should be connected as short as possible to the output, ideally to the VOUT

terminal of the inductor. Keep the area of the loop VOS node - inductor - SW node small. The Exposed Thermal

Pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation.

Approximate circuit area

= 51mm²(0.079in²)

V_OUT

GND

V_IN

GND

C_IN

R_EN1

R_EN2

R_{EN_hys}

Figure 56. EVM board Layout

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SLVSAQ5A –MARCH 2012–REVISED APRIL 2012

TYPACAL APPLICATIONS

V_OUT= 3.3V

up to 300mA

TPS62125

L 15µH

V_IN= 4V to 17V

VIN

R₁

1.8M

C_OUT

10µF

VOS

C_IN

10µF

R₂

576k

EN_hys

GND

R_pullup

PWR GOOD

Figure 57. TPS62125 3.3V Output Voltage Configuration

V_OUT= 5V

TPS62125

V_IN= 6V to 17V

L 10µH

up to 300mA

VIN

R₁

1.1M

C_OUT

2 x 10µF

or 1 x 22µF

VOS

C_IN

10µF

R₂

210k

EN_hys

GND

R_pullup

PWR GOOD

Figure 58. TPS62125 5.0V Output Voltage Configuration

V_{IN_Start}= 10V

V_{IN_Stop}= 6V

V_OUT= 5V

TPS62125

L 10µH

up to 300mA

VIN

R_EN1

820k

R₁

1.1M

C_OUT

2 x 10µF

or 1 x 22µF

VOS

C_IN

10µF

R₂

R_EN2

110k

210k

EN_hys

R_{EN_hys}

82k

R_pullup

GND

PWR GOOD

Figure 59. TPS62125 5V VOUT, Start up voltage V_{IN_Start = 10V}, Stop voltage V_{IN_Stop}= 6V, see Figure 43

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V_{IN_Start}= 6.82V

V_{IN_Stop}= 4.55V

V_OUT= 3.3V

up to 300mA

TPS62125

L 15µH

VIN

R_EN1

610k

R₁

1.8M

C_OUT

10µF

VOS

Current

Source

0.5mA

C_IN

10µF

C_IN

22µF

Poscap

R₂

R_EN2

110k

10V max

576k

EN_hys

R_{EN_hys}

120k

R_pullup

100k

GND

PWR Good

Figure 60. TPS62125 operation from a storage capacitor charged from a 0.5mA current source, V_OUT

3.3V, see Figure 45

C_IN

10µF

TPS62125

V_IN= 5V

L 10µH

GND

C_OUT

2 x 10µF

VIN

R₁

1.1M

VOS

C_bypass

10µF

or 1 x 22µF

R₂

210k

EN_hys

GND

V_OUT= -5V

up to 150mA

Figure 61. 5V to -5V inverter configuration, see SLVA514

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PACKAGE OPTION ADDENDUM

www.ti.com

9-May-2012

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

TPS62125DSGR

TPS62125DSGT

ACTIVE

WSON

DSG

3000

250

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

9-May-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS62125DSGR

TPS62125DSGT

WSON

DSG

3000

250

180.0

8.4

2.3

1.15

4.0

8.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

9-May-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS62125DSGR

TPS62125DSGT

WSON

DSG

3000

250

210.0

185.0

35.0

Pack Materials-Page 2

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

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TPS62125DSGR产品参数

型号:	TPS62125DSGR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
包装说明：	WSON-8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	8 weeks
风险等级：	1.69
Samacsys Confidence：	3
Samacsys Status：	Released
Samacsys PartID：	342642
Samacsys Pin Count：	9
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	Small Outline No-lead
Samacsys Footprint Name：	DSG0008A
Samacsys Released Date：	2019-02-22 12:46:37
Is Samacsys：	N
其他特性：	ALSO HAS PFM CONTROL TECHNIQUE; ALSO AVAILABLE IN ADJUSTABLE MODE FROM 1.2V TO 10V
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	17 V
最小输入电压：	3 V
标称输入电压：	12 V
JESD-30 代码：	S-PDSO-N8
JESD-609代码：	e4
长度：	2 mm
湿度敏感等级：	2
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	0.9 A
最大输出电压：	10 V
最小输出电压：	1.2 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	HVSON
封装等效代码：	SOLCC8,.08,20
封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified
座面最大高度：	0.8 mm
子类别：	Switching Regulator or Controllers
标称供电电压 (Vsup)：	12 V
表面贴装：	YES
切换器配置：	BUCK
最大切换频率：	1000 kHz
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	2 mm
Base Number Matches：	1

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