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产品型号TPS62290DRVR的概述

TPS62290DRVR芯片的概述 TPS62290DRVR是一款由德州仪器（Texas Instruments）设计和制造的高效降压型稳压器，属于其广泛应用的DC-DC转换器系列。此芯片尤其适用于电池供电的便携式电子设备，如智能手机、平板电脑、可穿戴设备和物联网（IoT）设备等。其出色的功耗管理能力和紧凑的封装设计，使得TPS62290DRVR在现代电源管理领域具有广泛的应用前景。 TPS62290芯片的核心功能是将上游电源（如电池或适配器）提供的电压转换为所需的较低电压，提供稳定的输出。该芯片能够动态调整输出电压，以满足负载变化带来的需求，保持高效的能量利用率，从而延长设备的工作时间。在降压转换过程中，TPS62290采用了固定频率的电流模式PWM（Pulse Width Modulation）控制技术。此技术使得转换器能够实时响应输出电流的变化，实现快速的负载瞬态响应，确保设备在...

产品型号TPS62290DRVR的Datasheet PDF文件预览

TPS62290

www.ti.com

SLVS764–JUNE 2007

1-A Step Down Converter in 2 x 2 SON Package

FEATURES

DESCRIPTION

•

High Efficiency Step Down Converter

The TPS62290 device is a high efficient synchronous

step down dc-dc converter optimized for battery

powered portable applications. It provides up to

1000-mA output current from a single Li-Ion cell.

Output Current up to 1000 mA

V_INRange From 2.3 V to 6 V

2.25 MHz Fixed Frequency Operation

Power Save Mode at Light Load Currents

Output Voltage Accuracy in PWM mode ±1.5%

Typ. 15-µA Quiescent Current

With an input voltage range of 2.3 V to 6 V, the

device supports batteries with extended voltage

range and are ideal to power portable applications

like mobile phones and other portable equipment.

100% Duty Cycle for Lowest Dropout

Voltage Positioning at Light Loads

Available in a 2 × 2 × 0,8 mm SON Package

The TPS62290 operates at 2.25-MHz fixed switching

frequency and enters Power Save Mode operation at

light load currents to maintain high efficiency over

the entire load current range.

The Power Save Mode is optimized for low output

voltage ripple. For low noise applications, the device

can be forced into fixed frequency PWM mode by

pulling the MODE pin high. In the shutdown mode,

the current consumption is reduced to less than

1 µA. TPS62290 allows the use of small inductors

and capacitors to achieve a small solution size.

APPLICATIONS

•

Cell Phones, Smart-phones

WLAN

PDAs, Pocket PCs

Low Power DSP Supply

Portable Media Players

POL

The TPS62290 is available in a 2 mm × 2 mm 6 pin

SON package.

1.8 V,

100

2.2 mH

OUT

1000 mA

TPS62290DRV

2.7 V to 6 V

V_IN= 4.2 V

22 pF

V_IN= 3.8 V

OUT

360 kW

10 mF

V_IN= 5 V

GND

MODE

180 kW

V_IN= 4.5 V

V_OUT= 3.3 V,

MODE = GND,

L = 2.2 mH

0.00001 0.0001 0.001

0.01

0.1

I_O- Output Current - A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS62290

www.ti.com

SLVS764–JUNE 2007

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be

more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

ORDERING INFORMATION

PART

OUTPUT

PACKAGE

DESIGNATOR

PACKAGE

MARKING

T_A

PACKAGE⁽³⁾

ORDERING

NUMBER⁽¹⁾

VOLTAGE⁽²⁾

–40°C to 85°C

TPS62290

adjustable

SON 2 x 2

DRV

TPS62290DRV

BYN

(1) The DRV package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel.

(2) Contact TI for other fixed output voltage options

(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

VALUE

–0.3 to 7

–0.3 to V_IN+0.3, ≤ 7

–0.3 to 7

Internally limited

UNIT

V_I

Input voltage range⁽²⁾

Voltage range at EN, MODE

Voltage on SW

Peak output current

HBM Human body model

CDM Charge device model

Machine model

ESD rating⁽³⁾

200

T_J

Maximum operating junction temperature

Storage temperature range

–40 to 125

–65 to 150

°C

T_stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF

capacitor discharged directly into each pin.

DISSIPATION RATINGS

PACKAGE

R_θJA

POWER RATING FOR T_A≤ 25°C

DERATING FACTOR ABOVE T_A= 25°C

13 mW/°C

DRV

76°C/W

1300 mW

RECOMMENDED OPERATING CONDITIONS

MIN

NOM

MAX

UNIT

V_IN

Supply voltage

Output voltage range for adjustable voltage

Operating ambient temperature

Operating junction temperature

0.6

–40

VIN

T_A

T_J

°C

125

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SLVS764–JUNE 2007

ELECTRICAL CHARACTERISTICS

Over full operating ambient temperature range, typical values are at T_A= 25°C. Unless otherwise noted, specifications apply

for condition V_IN= EN = 3.6V. External components C_IN= 4.7µF 0603, C_OUT= 10µF 0603, L = 2.2µH, refer to parameter

measurement information.

PARAMETER

Input voltage range

Output current

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

V_I

2.3

1000

600

V_IN2.7 V to 6 V

I_O

V_IN2.5 V to 2.7 V

V_IN2.3 V to 2.5 V

300

I_O= 0 mA, PFM mode enabled

(MODE = GND) device not switching,

See

µA

(1)

I_Q

Operating quiescent current

I_O= 0 mA, switching with no load

(MODE = V_IN) PWM operation,

V_O= 1.8 V, V_IN= 3V

3.8

I_SD

Shutdown current

EN = GND

Falling

0.1

1.85

1.95

µA

UVLO

Undervoltage lockout threshold

Rising

ENABLE, MODE

High level input voltage, EN,

MODE

2.3 V ≤ V_IN≤ 6 V

V_IN

0.4

V_IH

Low level input voltage, EN,

MODE

2.3 V ≤ V_IN≤ 6 V

V_IL

I_I

Input bias current, EN, MODE

EN, MODE = GND or V_IN

0.01

µA

POWER SWITCH

High side MOSFET on-resistance

240

185

480

380

R_DS(on)

V_IN= V_GS= 3.6 V, T_A= 25°C

mΩ

Low side MOSFET on-resistance

Forward current limit MOSFET

high-side and low side

I_LIMF

V_IN= V_GS= 3.6 V

1.19

1.4

1.68

Thermal shutdown

Increasing junction temperature

Decreasing junction temperature

140

T_SD

°C

Thermal shutdown hysteresis

OSCILLATOR

f_SW

Oscillator frequency

2.3 V ≤ V_IN≤ 6 V

2.0

0.6

2.25

2.5

V_I

MHz

OUTPUT

V_O

Adjustable output voltage range

Reference voltage

V_ref

600

MODE = V_IN, PWM operation,

2.3 V ≤ V_IN≤ 6 V, See

V_FB(PWM)

V_FB(PFM)

Feedback voltage

–1.5%

1.5%

(2)

MODE = GND, device in PFM mode,

+1% voltage positioning active, See

Feedback voltage PFM mode

Load regulation

(1)

- 0.5

500

%/A

µs

Time from active EN to reach 95% of

V_O

t_{Start Up}

t_Ramp

I_lkg

Start-up time

V_Oramp-up time

Time to ramp from 5% to 95% of V_O

V_I= 3.6 V, V_I= V_O= V_SW, EN = GND,

250

0.1

µs

Leakage current into SW pin

µA

(3)

See

(1) In PFM mode, the internal reference voltage is set to typ. 1.01 × V_ref. See the parameter measurement information.

(2) For V_IN= V_O+ 1.0 V

(3) In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.

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SLVS764–JUNE 2007

PIN ASSIGNMENTS

DRV PACKAGE

(TOP VIEW)

MODE

GND

VIN

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

V_IN

NO.

PWR VIN power supply pin.

PWR GND supply pin

GND

This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode.

Pulling this pin to high enables the device. This pin must be terminated.

This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor

between this terminal and the output capacitor.

OUT

Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of

fixed output voltage option, connect this pin directly to the output capacitor

MODE pin = high forces the device to operate in fixed-frequency PWM mode. Mode pin = low enables

the Power Save Mode with automatic transition from PFM mode to fixed-frequency PWM mode.

MODE

FUNCTIONAL BLOCK DIAGRAM

VIN

Current

Limit Comparator

VIN

Undervoltage

Lockout 1.8 V

Thermal

Shutdown

Limit

High Side

PFM Comp .

Reference

0.6 V VREF

+1% Voltage positioning

VREF + 1%

Gate Driver

Anti

Mode

Control

Stage

MODE

Shoot-Through

Error Amp

Softstart

VOUT RAMP

CONTROL

SW1

VREF

Integrator

PWM

Zero-Pole

AMP.

Comp .

Limit

RI1

GND

Low Side

RI..N

Current

Sawtooth

2.25 MHz

Oscillator

Limit Comparator

Generator

Int. Resistor

Network

GND

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SLVS764–JUNE 2007

PARAMETER MEASUREMENT INFORMATION

TPS62290DRV

OUT

2.2

22 pF

OUT

GND

MODE

L: LPS3015 2.2 mH, 110 mW

GRM188R60J106M 10 mF Murata 0603 size

: GRM188R60J106M 10 mF Murata 0603 size

OUT

TYPICAL CHARACTERISTICS

Table 1. Table Of Graphs

FIGURE

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Efficiency

vs V_O1.8 V Power Save Mode

vs V_O1.8 V Forced Save Mode

vs V_O3.3 V Power Save Mode

vs V_O3.3 V Forced Save Mode

Efficiency

V_OACCURACY

PFM LOAD TRANSIENT

PFM LINE TRANSIENT

PWM LOAD TRANSIENT

PWM LINE TRANSIENT

TYPICAL OPERATION PFM

MODE

TYPICAL OPERATION PWM

MODE

Figure 11

Shutdown Current Into VIN

Quiescent Current

vs Input Voltage, (T_A= 85°C, T_A= 25°C, T_A= -40°C)

Figure 12

Figure 13

Figure 14

Figure 15

Static Drain-Source On-State

Resistance

vs Input Voltage, (T_A= 85°C, T_A= 25°C, T_A= -40°C)

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SLVS764–JUNE 2007

EFFICIENCY (Power Save Mode)

EFFICIENCY (Forced PWM Mode)

OUTPUT CURRENT

100

= 1.8 V,

OUT

MODE = V

= 2.7 V

L = 2.2 mH

= 3.3 V

= 3.6 V

= 3.3 V

= 4.5 V

= 5 V

= 2.7 V

= 5 V

= 4.5 V

= 3.6 V

= 1.8 V,

OUT

MODE = GND,

L = 2.2 mH

100

1000

100

1000

0.01

0.1

- Output Current - mA

Figure 1.

Figure 2.

EFFICIENCY (Power Save Mode)

EFFICIENCY (Forced PWM Mode)

OUTPUT CURRENT

100

= 4.2 V

= 3.8 V

= 5 V

= 4.5 V

= 3.3 V,

OUT

MODE = GND,

L = 2.2 mH

OUT

MODE = V

L = 2.2 mH

100

1000

100

1000

0.01

0.1

- Output Current - mA

Figure 3.

Figure 4.

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SLVS764–JUNE 2007

OUTPUT VOLTAGE ACCURACY

OUTPUT CURRENT

PFM LOAD TRANSIENT

1.854

SW 2V/Div

MODE = V

L = 2.2 mH

1.836

1.818

1.8

= 2.7 V, T = -40°C

50 mV/Div

= 3.6 V, T = -40°C

OUT

= 4.5 V, T = -40°C

3.6 V,

1.8 V,

50 mA to 250 mA,

OUT

250 mA

MODE = GND

= 2.7 V,

= 25°C

= 4.5 V,

= 85°C

200 mA/Div

1.782

1.764

1.746

OUT

50 mA

= 3.6 V,

= 25°C

= 3.6 V,

= 85°C

= 4.5 V,

= 25°C

= 2.7 V,

= 85°C

500 mA/Div

coil

0.01

0.1

100

1000

Time Base - 20 ms/Div

- Output Current - mA

Figure 5.

Figure 6.

PFM LINE TRANSIENT

PWM LOAD TRANSIENT

3.6 V to 4.2 V

3.6 V,

500 mV/Div

1.8 V,

OUT

300 mA to 800 mA,

OUT

MODE = GND

100 mV/Div

OUT

500 mA/Div

OUT

800 mA

300 mA

= 1.8 V,

OUT

50 mV/Div,

= 50 mA,

500 mA/Div

coil

OUT

MODE = GND

Time Base - 100 ms/Div

Time Base - 20 ms/Div

Figure 7.

Figure 8.

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SLVS764–JUNE 2007

TYPICAL OPERATION

PWM LINE TRANSIENT

PFM MODE

3.6 V to 4.2 V,

20 mV/Div

500 mV/Div

OUT

3.6 V,

1.8 V, I

OUT

10 mA,

OUT

L 2.2 mH, C

10 mF 0603

OUT

SW 2 V/Div

= 1.8 V,

OUT

50 mV/Div,

= 250 mA,

OUT

MODE = GND

200 mA/Div

coil

Time Base - 100 ms/Div

Time Base - 10 ms/Div

Figure 9.

Figure 10.

TYPICAL OPERATION

SHUTDOWN CURRENT INTO VIN

PWM MODE

INPUT VOLTAGE

0.8

3.6 V,

EN = GND

1.8 V, I

150 mA,

10 mF 0603

OUT

0.7

0.6

10 mV/Div

L 2.2 mH, C

OUT

= 85^oC

SW 2 V/Div

0.5

0.4

0.3

0.2

200 mA/Div

coil

= 25^oC

= -40^oC

0.1

2.5

3.5

4.5

5.5

Time Base - 10 ms/Div

− Input Voltage − V

Figure 11.

Figure 12.

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SLVS764–JUNE 2007

QUIESCENT CURRENT

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

INPUT VOLTAGE

0.8

0.7

0.6

0.5

MODE = GND,

EN = VIN,

Devise Not Switching

High Side Switching

= 85^oC

= 25^oC

0.4

0.3

0.2

0.1

= -40^oC

2.5

3.5

4.5

5.5

2.5

3.5

4.5

− Input Voltage − V

Figure 13.

Figure 14.

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

INPUT VOLTAGE

0.4

Low Side Switching

0.35

0.3

= 85^oC

0.25

= 25^oC

0.2

0.15

0.1

0.05

= -40^oC

2.5

3.5

4.5

− Input Voltage − V

Figure 15.

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SLVS764–JUNE 2007

DETAILED DESCRIPTION

OPERATION

The TPS62290 step down converter operates with typically 2.25-MHz fixed frequency pulse width modulation

(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power

Save Mode and operates then in PFM mode.

During PWM operation, the converter use a unique fast response voltage mode controller scheme with input

voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output

capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is

turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the

inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator

trips and the control logic turns off the switch. The current limit comparator also turns off the switch if the current

limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low

Side MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the

inductor to the output capacitor and to the load. It returns to the inductor through the Low Side MOSFET

rectifier.

The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the

on the High Side MOSFET switch.

POWER SAVE MODE

The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the

converter will enter Power Save Mode operation automatically. During Power Save Mode the converter skips

switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain

high efficiency. The converter will position the output voltage typically +1% above the nominal output

voltage. This voltage positioning feature minimizes voltage drops caused by a sudden load step.

The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET

switch becomes zero, which indicates discontinuous conduction mode.

During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage

falls below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. For

this the High Side MOSFET switch will turn on and the inductor current ramps up. After the On-time expires,

the switch is turned off and the Low Side MOSFET switch is turned on until the inductor current becomes

zero.

The converter effectively delivers a current to the output capacitor and the load. If the load is below the

delivered current, the output voltage will rise. If the output voltage is equal or higher than the PFM

comparator threshold, the device stops switching and enters a sleep mode with typical 15µA current

consumption.

If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses

are generated until the PFM comparator threshold is reached. The converter starts switching again once the

output voltage drops below the PFM comparator threshold.

With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept

small. The PFM Pulse is time controlled, which allows to modify the charge transferred to the output

capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend

in first order on the size of the output capacitor and the inductor value. Increasing output capacitor values

and inductor values will minimize the output ripple. The PFM frequency decreases with smaller inductor

values and increases with larger values.

The PFM mode is left and PWM mode entered in case the output current can not longer be supported in

PFM mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will

then operate in fixed frequency PWM mode.

Dynamic Voltage Positioning

This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is

active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides

more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.

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DETAILED DESCRIPTION (continued)

Output voltage

Vout +1%

PFM Comparator

threshold

Voltage Positioning

Light load

PFM Mode

Vout (PWM)

moderate to heavy load

PWM Mode

Figure 16. Power Save Mode Operation

100% Duty Cycle Low Dropout Operation

The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output

voltage. To maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more

cycles.

With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case, the converter

offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to

achieve longest operation time by taking full advantage of the whole battery voltage range.

The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be

calculated as:

V_INmin = V_Omax + I_Omax × (R_DS(on)max + R_L)

With:

I_Omax = maximum output current plus inductor ripple current

R_DS(on)max = maximum P-channel switch R_DS(on)

R_L= DC resistance of the inductor

V_Omax = nominal output voltage plus maximum output voltage tolerance

Undervoltage Lockout

The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from

excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout

threshold is typically 1.85V with falling V_IN.

MODE SELECTION

The MODE pin allows mode selection between forced PWM mode and Power Save Mode.

Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM

mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light

load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this

mode, the efficiency is lower compared to the power save mode during light loads.

The condition of the MODE pin can be changed during operation and allows efficient power management by

adjusting the operation mode of the converter to the specific system requirements.

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DETAILED DESCRIPTION (continued)

ENABLE

The device is enabled setting EN pin to high. During the start up time t_{Start Up}the internal circuits are settled.

Afterwards, the device activates the soft start circuit. The EN input can be used to control power sequencing in a

system with various dc/dc converters. The EN pin can be connected to the output of another converter, to drive

the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In

this mode, all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is

disconnected from FB pin.

SOFT START

The TPS62290 has an internal soft start circuit that controls the ramp up of the output voltage. The output

voltage ramps up from 5% to 95% of its nominal value within typical 250µs. This limits the inrush current in the

converter during ramp up and prevents possible input voltage drops when a battery or high impedance power

source is used. The soft start circuit is enabled within the start up time t_{Start Up}

SHORT-CIRCUIT PROTECTION

The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = I_LIMF

The current in the switches is monitored by current limit comparators. Once the current in the High Side

MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET

switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side

MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below

the threshold of its current limit comparator.

THERMAL SHUTDOWN

As soon as the junction temperature, T_J, exceeds 140°C (typical) the device goes into thermal shutdown. In this

mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the

junction temperature falls below the thermal shutdown hysteresis.

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APPLICATION INFORMATION

TPS62290DRV

2.7 V to 6 V

2.2 mH

1.8 V,

OUT

1000 mA

22 pF

360 kW

10 mF

OUT

10 mF

GND

MODE

180 kW

Figure 17. TPS62290DRV Adjustable 1.8 V

TPS62290DRV

3.7 V to 6 V

2.2 mH

3.3 V,

OUT

1000 mA

10 mF

22 pF

820 kW

OUT

10 mF

GND

MODE

182 kW

Figure 18. TPS62290DRV Adjustable 3.3 V

OUTPUT VOLTAGE SETTING

The output voltage can be calculated to:

ǒ_{1 )}Ǔ

+ V

OUT

REF

with an internal reference voltage V_REFtypical 0.6V.

To minimize the current through the feedback divider network, R₂should be 180 kΩ or 360 kΩ. The sum of R₁

and R₂should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor

C₁is required for optimum load transient response. The value of C₁should be in the range between 22pF and

33pF.

Route the FB line away from noise sources, such as the inductor or the SW line.

OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)

The TPS62260 is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors

in the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output

capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific

operation conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective

inductance and 3.5µF effective capacitance.

Inductor Selection

The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc

resistance and saturation current. The inductor ripple current (∆I_L) decreases with higher inductance and

increases with higher V_Ior V_O.

The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will

lead to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output

voltage ripple but lower PFM frequency.

Submit Documentation Feedback

TPS62290

www.ti.com

SLVS764–JUNE 2007

APPLICATION INFORMATION (continued)

Equation 1 calculates the maximum inductor current under static load conditions. The saturation current of the

inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is

recommended because during heavy load transient the inductor current will rise above the calculated value.

Vout

Vin

1 *

DI + Vout

L ƒ

(1)

+ I

)

outmax

Lmax

(2)

With:

f = Switching Frequency (2.25MHz typical)

L = Inductor Value

∆I_L= Peak to Peak inductor ripple current

I_Lmax= Maximum Inductor current

A more conservative approach is to select the inductor current rating just for the maximum switch current of the

corresponding converter.

Accepting larger values of ripple current allows the use of low inductance values, but results in higher output

voltage ripple, greater core losses, and lower output current capability.

The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the

losses in the dc resistance (R_(DC)) and the following frequency-dependent components:

•

The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)

Additional losses in the conductor from the skin effect (current displacement at high frequencies)

Magnetic field losses of the neighboring windings (proximity effect)

Radiation losses

Table 2. List of Inductors

DIMENSIONS [mm³]

INDUCTOR TYPE

SUPPLIER

3 × 3 × 1.5

LPS3015

Coilcraft

Output Capacitor Selection

The advanced fast-response voltage mode control scheme of the TPS62290 allows the use of tiny ceramic

capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are

recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric

capacitors, aside from their wide variation in capacitance over temperature, become resistive at high

frequencies.

At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:

Vout

Vin

L ƒ

1 *

+ Vout

RMSCout

2 3

(3)

At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of

the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and

discharging the output capacitor:

Vout

Vin

L ƒ

1 *

_) ESRǓ

DVout + Vout

8 Cout ƒ

(4)

At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on

the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple

in PFM mode and tighten dc output accuracy in PFM mode.

Submit Documentation Feedback

TPS62290

www.ti.com

SLVS764–JUNE 2007

Input Capacitor Selection

The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for

best input voltage filtering and minimizing the interference with other circuits caused by high input voltage

spikes. For most applications, a 10-µF ceramic capacitor is recommended. The input capacitor can be increased

without any limit for better input voltage filtering.

Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and

the power is being supplied through long wires, such as from a wall adapter, a load step at the output or V_INstep

on the input can induce ringing at the V_INpin. The ringing can couple to the output and be mistaken as loop

instability or could even damage the part by exceeding the maximum ratings.

Table 3. List of Capacitor

CAPACITANCE

TYPE

SIZE

SUPPLIER

10µF

GRM188R60J106M69D

0603 1.6x0.8x0.8mm3

Murata

LAYOUT CONSIDERATIONS

As for all switching power supplies, the layout is an important step in the design. Proper function of the device

demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If

the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well

as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and

short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins

as well as the inductor and output capacitor.

Connect the GND Pin of the device to the Power Pad of the PCB and use this Pad as a star point. Use a

common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.

Connect these ground nodes together to the Power Pad (star point) underneath the IC. Keep the common path

to the GND PIN, which returns the small signal components and the high current of the output capacitors as

short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and

routed away from noisy components and traces (e.g., SW line).

Submit Documentation Feedback

TPS62290

www.ti.com

SLVS764–JUNE 2007

V_OUT

GND

V_IN

OUT

Figure 19. Layout

Submit Documentation Feedback

PACKAGE OPTION ADDENDUM

www.ti.com

23-Jul-2007

PACKAGING INFORMATION

Orderable Device

TPS62290DRVR

TPS62290DRVRG4

TPS62290DRVT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SON

DRV

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SON

DRV

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS62290DRVTG4

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

27-Jun-2007

TAPE AND REEL INFORMATION

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

27-Jun-2007

Device

Package Pins

Site

Reel

A0 (mm)

B0 (mm)

K0 (mm)

Pin1

Diameter Width

(mm) (mm) Quadrant

(mm)

179

(mm)

TPS62290DRVR

TPS62290DRVT

DRV

NSE

2.2

1.2

179

TAPE AND REEL BOX INFORMATION

Device

Package

Pins

Site

Length (mm) Width (mm) Height (mm)

TPS62290DRVR

TPS62290DRVT

DRV

NSE

195.0

200.0

45.0

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,

improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.

Customers should obtain the latest relevant information before placing orders and should verify that such information is current and

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s

standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask

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Applications

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amplifier.ti.com

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TPS62290DRVR产品参数

型号:	TPS62290DRVR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	SON
包装说明：	SON-6
针数：	6
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	1 week
风险等级：	0.8
Is Samacsys：	N
其他特性：	ALSO OPERATES IN ADJUSTABLE MODE FROM 0.6V TO 6V; PFM CONTROL TECHNIQUE ALSO AVAILABLE
模拟集成电路 - 其他类型：	SWITCHING REGULATOR
控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	6 V
最小输入电压：	2.3 V
标称输入电压：	3.6 V
JESD-30 代码：	S-PDSO-N6
JESD-609代码：	e4
长度：	2 mm
湿度敏感等级：	1
功能数量：	1
端子数量：	6
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	1 A
最大输出电压：	6 V
最小输出电压：	0.6 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	HVSON
封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified
座面最大高度：	0.8 mm
表面贴装：	YES
切换器配置：	BUCK
最大切换频率：	2500 kHz
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	2 mm
Base Number Matches：	1

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