TPS74201
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SBVS064F–DECEMBER 2005–REVISED OCTOBER 2007
The maximum recommended soft-start capacitor is
0.015μF. Larger soft-start capacitors can be used and
will not damage the device; however, the soft-start
capacitor discharge circuit may not be able to fully
discharge the soft-start capacitor when enabled.
Soft-start capacitors larger than 0.015μF could be a
problem in applications where the user needs to
rapidly pulse the enable pin and still requires the
device to soft-start from ground. CSS must be
low-leakage; X7R, X5R, or C0G dielectric materials
are preferred. Refer to Table 2 for suggested
soft-start capacitor values.
OUTPUT NOISE
The TPS74201 provides low output noise when a
soft-start capacitor is used. When the device reaches
the end of the soft-start cycle, the soft-start capacitor
serves as a filter for the internal reference. By using a
0.001μF soft-start capacitor, the output noise is
reduced by half and is typically 30μVRMS for a 1.2V
output (10Hz to 100kHz). Because most of the output
noise is generated by the internal reference, the
noise is a function of the set output voltage. The RMS
noise with a 0.001μF soft-start capacitor is given in
Equation 3.
mVRMS
V
SEQUENCING REQUIREMENTS
ǒ
Ǔ
+ 25ǒ Ǔ
( )
VOUT
VN mVRMS
V
The device can have VIN, VBIAS, and VEN sequenced
in any order without causing damage to the device.
However, for the soft-start function to work as
intended, certain sequencing rules must be applied.
Enabling the device after VIN and VBIAS are present is
preferred, and can be accomplished using a digital
output from a processor or supply supervisor. An
analog signal from an external RC circuit, as shown
in Figure 29, can also be used as long as the delay
time is long enough for VIN and VBIAS to be present.
(3)
The low output noise of the TPS74201 makes it a
good choice for powering transceivers, PLLs, or other
noise-sensitive circuitry.
ENABLE/SHUTDOWN
The enable (EN) pin is active high and is compatible
with standard digital signaling levels. VEN below 0.4V
turns the regulator off, while VEN above 1.1V turns the
regulator on. Unlike many regulators, the enable
circuitry has hysteresis and deglitching for use with
relatively slow-ramping analog signals. This
configuration allows the TPS74201 to be enabled by
connecting the output of another supply to the EN
pin. The enable circuitry typically has 50mV of
hysteresis and a deglitch circuit to help avoid on-off
cycling because of small glitches in the VEN signal.
VIN
VOUT
IN
OUT
FB
CIN
R1
R2
1mF
BIAS
TPS74201
R
VBIAS
CBIAS
EN
SS
GND
1mF
CSS
C
The enable threshold is typically 0.8V and varies with
temperature and process variations. Temperature
variation is approximately –1mV/°C; therefore,
process variation accounts for most of the variation in
the enable threshold. If precise turn-on timing is
required, a fast rise-time signal should be used to
enable the TPS74201.
Figure 29. Soft-Start Delay Using an RC Circuit on
Enable
If a signal is not available to enable the device after
IN and BIAS, simply connecting EN to IN is
acceptable for most applications as long as VIN is
greater than 1.1V and the ramp rate of VIN and VBIAS
is faster the set soft-start ramp rate. If the ramp rate
of the input sources is slower than the set soft-start
time, the output will track the slower supply minus the
dropout voltage until it reaches the set output voltage.
If EN is connected to BIAS, the device will soft-start
as programmed provided that VIN is present before
VBIAS. If VBIAS and VEN are present before VIN is
applied and the set soft-start time has expired then
VOUT will track VIN.
If not used, EN can be connected to either IN or
BIAS. If EN is connected to IN, it should be
connected as close as possible to the largest
capacitance on the input to prevent voltage droops on
that line from triggering the enable circuit.
POWER-GOOD (QFN Package Only)
The power-good (PG) pin is an open-drain output and
can be connected to any 5.5V or lower rail through an
external pull-up resistor. This pin requires at least
1.1V on VBIAS in order to have a valid output. The PG
output is high-impedance when VOUT is greater than
VIT + VHYS. If VOUT drops below VIT or if VBIAS drops
below 1.9V, the open-drain output turns on and pulls
the PG output low. The PG pin also asserts when the
device is disabled. The recommended operating
NOTE: When VBIAS and VEN are present and VIN is
not supplied, this device outputs approximately 50μA
of current from OUT. Although this condition will not
cause any damage to the device, the output current
may charge up the OUT node if total resistance
between OUT and GND (including external feedback
resistors) is less than 10kΩ.
12
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