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产品型号TPS7B6950QDCYRQ1的概述

TPS7B6950QDCYRQ1芯片概述 TPS7B6950QDCYRQ1是一款由德州仪器（Texas Instruments，TI）研发的高性能低压差线性稳压器（LDO，Low Dropout Regulator）。该芯片专门设计用于为高精度模拟电路提供干净、稳定的电源。在精密电子设备中，电源的稳定性及低噪声特性至关重要，TPS7B6950的低输出噪声特性使其成为包括传感器、电源分配和信号处理等众多应用的理想选择。 TPS7B6950的关键特性包括极低的输出噪声、宽输入电压范围和出色的负载与线路调整性能。此芯片的输入电压范围为2.5V至20V，输出电压可调至1.2V至15V，具备优良的负载瞬态响应。其典型静态电流低于1mA，满足低功耗设计的需求。同时，它的保护功能包括过流保护和热关断，能够确保产品在不同工作环境下的安全性和可靠性。 TPS7B6950QDCYRQ1详细参数 - 输入电...

产品型号TPS7B6950QDCYRQ1的Datasheet PDF文件预览

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TPS7B6925-Q1, TPS7B6933-Q1, TPS7B6950-Q1

SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

TPS7B69xx-Q1 High-Voltage Ultra-Low I_QLow-Dropout Regulator

1 Features

2 Applications

•

Qualified for Automotive Applications

•

Automotive

AEC-Q100 Qualified With the Following Results:

Infotainment Systems With Sleep Mode

Always-On Battery Applications

–

Device Temperature Grade 1: –40°C to 125°C

Ambient Operating Temperature Range

–

Door Modules

–

Device HBM ESD Classification Level 2

Device CDM ESD Classification Level C4B

Remote Keyless-Entry Systems

Immobilizers

•

4 to 40-V Wide V_IInput Voltage Range With up to

45-V Transient

3 Description

The TPS7B69xx-Q1 device is a low-dropout linear

regulator designed for up to 40-V V_Ioperations. With

only 15-µA (typical) quiescent current at light load,

the device is suitable for standby microcontrol-unit

systems especially in automotive applications.

•

Maximum Output Current: 150 mA

Low Quiescent Current (I_Q):

–

15 µA Typical at Light Loads

25 µA Maximum Under Full Temperature

•

450-mV Typical Low Dropout Voltage at 100 mA

Load Current

The devices feature an integrated short-circuit and

overcurrent protection. The TPS7B69xx-Q1 device

operates over a –40°C to 125°C temperature range.

Because of these features, the TPS7B6925-Q1,

TPS7B6933-Q1, and TPS7B6950-Q1 devices are

well suited in power supplies for various automotive

applications.

Stable With Low ESR Ceramic Output Capacitor

(2.2 to 100 µF)

Fixed 2.5-V, 3.3-V, and 5-V Output Voltage

Options

Integrated Fault Protection:

Device Information⁽¹⁾

–

Thermal Shutdown

PART NUMBER

PACKAGE

BODY SIZE (NOM)

Short-Circuit Protection

TPS7B6925-Q1

TPS7B6933-Q1

TPS7B6950-Q1

SOT-223 (4)

6.50 mm × 3.50 mm

•

Packages:

SOT-23 (5)

2.90 mm × 1.60 mm

–

4-Pin SOT-223 Package

5-Pin SOT-23 Package

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

4 Typical Application Schematic

TPS7B69xx-Q1

OUT

bat

reg

10 µF

4.7 µF

GND

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPS7B6925-Q1, TPS7B6933-Q1, TPS7B6950-Q1

SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

www.ti.com

Table of Contents

8.3 Feature Description................................................. 10

8.4 Device Functional Modes........................................ 11

Application and Implementation ........................ 12

9.1 Application Information............................................ 12

9.2 Typical Application .................................................. 12

Features.................................................................. 1

Applications ........................................................... 1

Description ............................................................. 1

Typical Application Schematic............................. 1

Revision History..................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 4

7.1 Absolute Maximum Ratings ...................................... 4

7.2 ESD Ratings.............................................................. 4

7.3 Recommended Operating Conditions....................... 4

7.4 Thermal Information.................................................. 4

7.5 Electrical Characteristics........................................... 5

7.6 Typical Characteristics.............................................. 6

Detailed Description ............................................ 10

8.1 Overview ................................................................. 10

8.2 Functional Block Diagram ....................................... 10

10 Power Supply Recommendations ..................... 14

11 Layout................................................................... 14

11.1 Layout Guidelines ................................................. 14

11.2 Layout Example .................................................... 14

12 Device and Documentation Support ................. 15

12.1 Documentation Support ........................................ 15

12.2 Related Links ........................................................ 15

12.3 Trademarks........................................................... 15

12.4 Electrostatic Discharge Caution............................ 15

12.5 Glossary................................................................ 15

13 Mechanical, Packaging, and Orderable

Information ........................................................... 15

5 Revision History

Changes from Revision A (December 2014) to Revision B

Page

•

Changed the TPS7B6933-Q1 device status from Product Preview to Production Data ....................................................... 1

Added the TPS7B6933-Q1 device test results to the Typical Characteristics section .......................................................... 6

Changes from Original (November 2014) to Revision A

Page

•

Changed the device status from Product Preview to Production Data ................................................................................. 1

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

6 Pin Configuration and Functions

DCY Package

4-Pin SOT-223

Top View

DBV Package

5-Pin SOT-23

Top View

GND

OUT

GND

NC - No internal connection

GND

OUT

Pin Functions

NO.

SOT-23

TYPE

DESCRIPTION

NAME

SOT-223

GND

Ground reference

—

Input power-supply voltage

Not connected pin

Output voltage

OUT

—

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.3

–40

–65

MAX

UNIT

Unregulated input voltage

IN^(2)(3)(4)

OUT⁽²⁾⁽³⁾

Regulated output voltage

Operating junction temperature range, T_J

Storage temperature, T_stg

150

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to the GND terminal.

(3) Absolute negative voltage on these pins must not to go below –0.3 V.

(4) Absolute maximum voltage, withstands 45 V for 200 ms.

7.2 ESD Ratings

VALUE

±2000

±500

UNIT

Human body model (HBM), per AEC Q100-002⁽¹⁾

Electrostatic

discharge

Other pins

V_(ESD)

Charged device model (CDM), per

Corner pins (4 pin: 1, 3, and 4;

5 pin: 1, 3, 4, and 5)

AEC Q100-011

±750

(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

V_I

Unregulated input voltage

Output voltage

V_O

5.5

100

C_O

Output capacitor requirements⁽¹⁾

Output ESR requirements⁽²⁾

Operating junction temperature range

2.2

µF

ESR_CO

T_J

0.001

–40

150

°C

(1) The output capacitance range specified in this table is the effective value.

(2) Relevant ESR value at ƒ = 10 kHz.

7.4 Thermal Information

DCY

4 PINS

64.2

DBV

THERMAL METRIC⁽¹⁾⁽²⁾

UNIT

5 PINS

210.4

126.1

38.4

R_θJA

R_θJC(top)

R_θJB

ψ_JT

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

46.8

13.3

°C/W

Junction-to-top characterization parameter

Junction-to-board characterization parameter

6.3

ψ_JB

13.2

37.5

(1) The thermal data is based on the JEDEC standard high-K profile, JESD 51-7, 2s2p four layer board with 2-oz copper. The copper pad is

soldered to the thermal land pattern. Also correct attachment procedure must be incorporated.

(2) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

7.5 Electrical Characteristics

V_IN= 14 V, 1 mΩ < ESR < 2 Ω, T_J= –40°C to 150 °C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

SUPPLY VOLTAGE AND CURRENT (IN)

Fixed 2.5-V output, I_O= 1 mA

V_I

Input voltage

Fixed 3.3-V output, I_O= 1 mA

Fixed 5-V output, I_O= 1 mA

5.5

Fixed 2.5-V and 3.3-V version, V_I= 4 to 40 V,

Fixed 5-V version, V_I= 5.5 to 40 V, I_O= 0.2 mA

I_Q

Quiescent current

µA

Ramp V_Iup until the output turns on

3.65

V_IN(UVLO)

IN undervoltage detection

Ramp V_Idown until the output turns OFF

REGULATED OUTPUT (OUT)

Fixed 2.5-V version, V_I= 4 to 40 V, I_O= 1 to 150 mA

Fixed 3.3-V version, V_I= 5 to 40 V, I_O= 1 to 150 mA

Fixed 5-V version, V_I= 6.5 to 40 V, I_O= 1 to 150 mA

V_I= 6 to 40 V, ∆V_O, I_O= 10 mA

–3%

V_O

Regulated output

ΔV_O(ΔVI)

ΔV_O(ΔIL)

Line regulation

Load regulation

I_O= 1 to 150 mA, ∆V_O

Fixed 2.5-V version, V_I– V_O, I_O= 50 mA

Fixed 2.5-V version, V_I– V_O, I_O= 100 mA

Fixed 3.3-V version, V_I– V_O, I_O= 50 mA

Fixed 3.3-V version, V_I– V_O, I_O= 100 mA

Fixed 5-V version, V_I– V_O, I_O= 50 mA

Fixed 5-V version, V_I– V_O, I_O= 100 mA

V_Oin regulation

1.575

799

800

400

800

150

500

V_DROP

Dropout voltage

220

450

I_O

Output current

I_OCL

Output current-limit

OUT short to ground

150

Power supply ripple

rejection⁽¹⁾

PSRR

V_rip= 0.5 V_pp, Load = 10 mA, ƒ = 100 Hz, C_O= 2.2 µF

OPERATING TEMPERATURE RANGE

Junction shutdown

temperature

T_sd

175

°C

Hysteresis of thermal

shutdown

T_hys

(1) Design Information—Not tested, ensured by characterization.

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

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7.6 Typical Characteristics

3.8

3.7

3.6

3.5

3.4

3.3

3.2

3.1

I_O= 1 mA

I_O= 80 mA

I_O= 1 mA

I_O= 80 mA

5.8

5.6

5.4

5.2

4.8

4.6

4.4

4.2

2.9

2.8

-55

-25

125

-55

-25

125

Junction Temperature (qC)

D001

D011

V_I= 14 V

Figure 1. 5-V Output Voltage vs Junction Temperature

Figure 2. 3.3-V Output Voltage vs Junction Temperature

I_O= 1 mA

I_O= 80 mA

2.9

2.8

2.7

2.6

2.5

2.4

2.3

2.2

2.1

-55

-25

125

Junction Temperature (qC)

Supply Voltage (V)

D008

D002

V_I= 14 V

I_O= 0 mA

Figure 3. 2.5-V Output Voltage vs Junction Temperature

Figure 4. 5-V Output Voltage vs Supply Voltage

3.5

2.5

1.5

0.5

Supply Voltage (V)

D012

D009

I_O= 0 mA

Figure 5. 3.3-V Output Voltage vs Supply Voltage

Figure 6. 2.5-V Output Voltage vs Supply Voltage

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

Typical Characteristics (continued)

160

140

120

100

ꢀ40qC

25qC

125qC

ꢀ40qC

25qC

125qC

120

150

Output Current (mA)

Supply Voltage (V)

D003

D010

I_O= 0.2 mA

Figure 7. Quiescent Current vs Output Current

Figure 8. Quiescent Current vs Supply Voltage

1100

1000

900

800

700

600

500

400

300

200

100

ꢀ40qC

25qC

125qC

120

150

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7 5E+7

Output Current (mA)

Frequency (Hz)

D004

D005

I_O= 100 mA

C_O= 2.2 µF

V_I= 14 V

T_A= 25°C

Figure 9. Dropout Voltage vs Output Current

Figure 10. Power Supply Rejection Ratio

100

Stable Region

2.2

1E+1

1E+2

1E+3

1E+4

Frequency (Hz)

1E+5

1E+6

1E+7 5E+7

0.001

0.5

ESR of Output Capacitance (Ω)

1.5

D006

D007

I_O= 10 mA

C_O= 2.2 µF

V_I= 14 V

T_A= 25°C

Figure 11. Power Supply Rejection Ratio

Figure 12. ESR Stability vs Output Capacitance

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

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Typical Characteristics (continued)

V_O(AC)

100 mV/div

V_O(AC)

100 mV/div

I_O(DC)

50 mA/div

I_O(DC)

50 mA/div

V_I= 14 V

V_O= 5 V

C_O= 2.2 µF

1 ms/div

V_I= 14 V

C_O= 2.2 µF

1 ms/div

V_O= 3.3 V

Figure 13. Load Transient (1 to 100 mA, 5 V)

Figure 14. Load Transient (1 to 100 mA, 3.3 V)

V_O(AC)

100 mV/div

I_O(DC)

50 mA/div

I_O(DC)

50 mA/div

V_I= 14 V

V_O= 5 V

C_O= 2.2 µF

1 ms/div

V_I= 14 V

C_O= 2.2 µF

1 ms/div

V_O= 2.5 V

Figure 16. Load Transient (1 to 150 mA, 5 V)

Figure 15. Load Transient (1 to 100 mA, 2.5 V)

V_O(AC)

100 mV/div

V_O(AC)

100 mV/div

I_O(DC)

50 mA/div

I_O(DC)

50 mA/div

V_I= 14 V

C_O= 2.2 µF

1 ms/div

V_I= 14 V

C_O= 2.2 µF

1 ms/div

V_O= 3.3 V

V_O= 2.5 V

Figure 17. Load Transient (1 to 150 mA, 3.3 V)

Figure 18. Load Transient (1 to 150 mA, 2.5 V)

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

Typical Characteristics (continued)

V_O

20 mV/div

V_I

5 V/div

V_I= 9 to 16 V

I_O= 10 mA

C_O= 2.2 µF

1 ms/div

V_I= 9 to 16 V

I_O= 10 mA

C_O= 2.2 µF

1 ms/div

Figure 20. Line Transient (V_O= 3.3 V)

Figure 19. Line Transient (V_O= 5 V)

V_O

20 mV/div

V_I

5 V/div

V_I

5 V/div

V_O

2 V/div

V_I= 9 to 16 V

I_O= 10 mA

C_O= 2.2 µF

1 ms/div

C_O= 2.2 µF, 400 µs/div

Figure 21. Line Transient (V_O= 2.5 V)

Figure 22. 5-V Power Up

V_I

5 V/div

V_O

1 V/div

C_O= 2.2 µF, 400 µs/div

Figure 24. 2.5-V Power Up

Figure 23. 3.3-V Power Up

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

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8 Detailed Description

8.1 Overview

The TPS7B69xx-Q1 high-voltage linear regulator operates over a 4-V to 40-V input voltage range. The device

has an output current capability of 150 mA and offers fixed output voltages of 2.5 V (TPS7B6925-Q1), 3.3 V

(TPS7B6933-Q1) or 5 V (TPS7B6950-Q1). The device features a thermal shutdown and short-circuit protection

to prevent damage during over-temperature and overcurrent conditions.

8.2 Functional Block Diagram

OUT

Overcurrent

detection

UVLO

Thermal

shutdown

Regulator

control

Band gap

ref

GND

8.3 Feature Description

8.3.1 Input (IN)

The IN pin is a high-voltage-tolerant pin. A capacitor with a value higher than 0.1 µF is recommended to be

connected close to this pin to better the transient performance.

8.3.2 Output (OUT)

The OUT pin is the regulated output based on the required voltage. The output has current limitation. During the

initial power up, the regulator has a soft start incorporated to control the initial current through the pass element

and the output capacitor.

In the event that the regulator drops out of regulation, the output tracks the input minus a drop based on the load

current. When the input voltage drops below the UVLO threshold, the regulator shuts down until the input voltage

recovers above the minimum startup level.

8.3.3 Output Capacitor Selection

For stable operation over the full temperature range and with load currents up to 150 mA, use a capacitor with an

effective value between 2.2 µF and 100 µF and ESR smaller than 2 Ω. To better the load transient performance,

an output capacitor, such as a ceramic capacitor with low ESR, is recommended.

8.3.4 Low-Voltage Tracking

At low input voltages, the regulator drops out of regulation and the output voltage tracks input minus a voltage

based on the load current (I_L) and switch resistor. This tracking allows for a smaller input capacitor and can

possibly eliminate the need for a boost converter during cold-crank conditions.

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

Feature Description (continued)

8.3.5 Thermal Shutdown

The TPS7B69xx-Q1 family of devices incorporates a thermal-shutdown (TSD) circuit as a protection from

overheating. For continuous normal operation, the junction temperature should not exceed the TSD trip point. If

the junction temperature exceeds the TSD trip point, the output turns off. When the junction temperature falls

below the TSD trip point minus the hysteresis of TSD, the output turns on again. This cycling limits the

dissipation of the regulator, protecting it from damage as a result of overheating.

The purpose of the design of the internal protection circuitry of the TPS7B69xx-Q1 family of devices is for

protection against overload conditions, not as a replacement for proper heat-sinking. Continuously running the

TPS7B69xx-Q1 family of devices into thermal shutdown degrades device reliability.

8.4 Device Functional Modes

8.4.1 Operation With V_ILess Than 4 V

The TPS7B69xx-Q1 family of devices operates with input voltages above 4 V. The maximum UVLO voltage is 3

V and the device operates at an input voltage above 4 V. The device can also operate at lower input voltages; no

minimum UVLO voltage is specified. At input voltages below the actual UVLO, the device shuts down.

8.4.2 Operation With V_IGreater Than 4 V

When V_Iis greater than 4 V, if the input voltage is higher than V_Oplus the dropout voltage, the output voltage is

equal to the set value. Otherwise, the output voltage is equal to V_Iminus the dropout voltage.

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS7B69xx-Q1 family of devices is a 150-mA low-dropout linear regulator designed for up to 40-V V_I

operation with only 15-µA quiescent current at light loads. Use the PSpice transient model to evaluate the base

function of the device. To download the PSpice transient model, go to the device product folder on www.TI.com.

In addition to this model, specific evaluation modules (EVM) are available for these devices. For the EVM and

the EVM user guide, go to the device product folder.

9.2 Typical Application

Figure 25 shows the typical application circuit for the TPS7B69xx-Q1 family of devices. Based on the end-

application, different values of external components can be used. An application can require a larger output

capacitor during fast load steps to achieve better load transient response. TI recommends a low-ESR ceramic

capacitor with a dielectric of type X5R or X7R for better load transient response.

TPS7B69xx-Q1

OUT

bat

reg

10 µF

4.7 µF

GND

Figure 25. Typical Application Schematic for TPS7B69xx-Q1

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 1.

Table 1. Design Parameters

DESIGN PARAMETER

Input voltage range

EXAMPLE VALUES

4 to 40 V

Output voltage

2.5 V, 3.3 V, 5 V

150 mA

Output current rating

Output capacitor range

Output capacitor ESR range

2.2 to 100 µF

1 mΩ to 2 Ω

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

•

Input voltage range

Output Voltage

Output current rating

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SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

9.2.2.1 Input Capacitor

The device requires an input decoupling capacitor, the value of which depends on the application. The typical

recommend value for the decoupling capacitor is higher than 0.1 µF. The voltage rating must be greater than the

maximum input voltage.

9.2.2.2 Output Capacitor

The device requires an output capacitor to stabilize the output voltage. The output capacitor value should be

between 2.2 µF and 100 µF. The ESR value range should be between 1 mΩ and 2 Ω. TI recommends a ceramic

capacitor with low ESR to improve the load transient response.

9.2.2.3 Power Dissipation and Thermal Considerations

Use Equation 1 to calculate the power dissipated in the device.

P_D= I_O× (V_I– V_O) + I_Q× V_I

where

•

P_D= continuous power dissipation

I_O= output current

V_I= input voltage

V_O= output voltage

(1)

Because I_Q« I_O, the term I_Q× V_Iin Equation 1 can be ignored.

For a device under operation at a given ambient air temperature (T_A), use Equation 2 to calculate the junction

temperature (T_J).

T_J= T_A+ (Z_θJA× P_D)

where

•

_θJA= junction-to-ambient air thermal impedance

(2)

(3)

Use Equation 3 to calculate the rise in junction temperature because of power dissipation.

ΔT = T_J– T_A= (Z_θJA× P_D)

For a given maximum junction temperature (T_Jmax), use Equation 4 to calculate the maximum ambient air

temperature (T_Amax) at which the device can operate.

T_Amax= T_Jmax– (Z_θJA× P_D)

(4)

9.2.3 Application Curve

V_I

5 V/div

V_O

2 V/div

C_O= 2.2 µF, 400 µs/div

Figure 26. Power Up (5 V)

Submit Documentation Feedback

Product Folder Links: TPS7B6925-Q1 TPS7B6933-Q1 TPS7B6950-Q1

TPS7B6925-Q1, TPS7B6933-Q1, TPS7B6950-Q1

SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

www.ti.com

10 Power Supply Recommendations

The device is designed to operate from an input-voltage supply range between 4 V and 40 V. This input supply

must be well regulated. If the input supply is located more than a few inches from the TPS7B69xx-Q1 device, TI

recommends adding an electrolytic capacitor with a value of 10 µF and a ceramic bypass capacitor at the input.

11 Layout

11.1 Layout Guidelines

For the layout of TPS7B69xx-Q1 family of devices, place the input and output capacitors close to the devices as

shown in Figure 27 and Figure 28. To enhance the thermal performance, TI recommends surrounding the device

with some vias.

Minimize equivalent series inductance (ESL) and ESR to maximize performance and ensure stability. Place

every capacitor as close as possible to the device and on the same side of the PCB as the regulator.

Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. TI

strongly discourages the use of long traces because they can impact system performance negatively and even

cause instability.

If possible, and to ensure the maximum performance specified in this product data sheet, use the same layout

pattern used for the TPS7B69xx-Q1 evaluation board.

11.2 Layout Example

GND

OUT

Figure 27. Layout Example for SOT-223 Package

Submit Documentation Feedback

Product Folder Links: TPS7B6925-Q1 TPS7B6933-Q1 TPS7B6950-Q1

TPS7B6925-Q1, TPS7B6933-Q1, TPS7B6950-Q1

www.ti.com

SLVSCJ8B –NOVEMBER 2014–REVISED JANUARY 2015

Layout Example (continued)

OUT

GND

Figure 28. Layout Example for SOT-23 Package

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

For related documentation see the following:

TPS7B6950EVM User's Guide, SLVUAC0.

12.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

TECHNICAL

DOCUMENTS

TOOLS &

SOFTWARE

SUPPORT &

COMMUNITY

PARTS

PRODUCT FOLDER

SAMPLE & BUY

TPS7B6925-Q1

TPS7B6933-Q1

TPS7B6950-Q1

Click here

12.3 Trademarks

All trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Submit Documentation Feedback

Product Folder Links: TPS7B6925-Q1 TPS7B6933-Q1 TPS7B6950-Q1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS7B6925QDBVRQ1

TPS7B6925QDCYRQ1

TPS7B6933QDBVRQ1

TPS7B6933QDCYRQ1

TPS7B6950QDBVRQ1

TPS7B6950QDCYRQ1

ACTIVE

SOT-23

SOT-223

SOT-23

SOT-223

SOT-23

SOT-223

DBV

DCY

DBV

DCY

DBV

DCY

3000 RoHS & Green

2500 RoHS & Green

3000 RoHS & Green

2500 RoHS & Green

3000 RoHS & Green

2500 RoHS & Green

Level-2-260C-1 YEAR

Level-3-260C-168 HR

Level-2-260C-1 YEAR

Level-3-260C-168 HR

Level-2-260C-1 YEAR

Level-3-260C-168 HR

-40 to 125

ZBE2

7B6925

ZBF2

7B6933

ZAZ2

7B6950

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TPS7B69-Q1 :

Catalog: TPS7B69

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

24-Apr-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS7B6925QDBVRQ1 SOT-23

TPS7B6925QDCYRQ1 SOT-223

TPS7B6933QDBVRQ1 SOT-23

TPS7B6933QDCYRQ1 SOT-223

TPS7B6950QDBVRQ1 SOT-23

TPS7B6950QDCYRQ1 SOT-223

DBV

DCY

DBV

DCY

DBV

DCY

3000

2500

3000

2500

3000

2500

178.0

330.0

178.0

330.0

178.0

330.0

9.0

12.4

9.0

3.3

7.05

3.3

3.2

7.4

3.2

7.4

3.2

7.4

1.4

1.9

1.4

1.9

1.4

1.9

4.0

8.0

4.0

8.0

4.0

8.0

12.0

8.0

12.4

9.0

7.05

3.3

12.0

8.0

12.4

7.05

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

24-Apr-2020

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS7B6925QDBVRQ1

TPS7B6925QDCYRQ1

TPS7B6933QDBVRQ1

TPS7B6933QDCYRQ1

TPS7B6950QDBVRQ1

TPS7B6950QDCYRQ1

SOT-23

SOT-223

SOT-23

SOT-223

SOT-23

SOT-223

DBV

DCY

DBV

DCY

DBV

DCY

3000

2500

3000

2500

3000

2500

190.0

340.0

190.0

340.0

180.0

340.0

190.0

340.0

190.0

340.0

180.0

340.0

30.0

38.0

30.0

38.0

18.0

38.0

Pack Materials-Page 2

MECHANICAL DATA

MPDS094A – APRIL 2001 – REVISED JUNE 2002

DCY (R-PDSO-G4)

PLASTIC SMALL-OUTLINE

6,70 (0.264)

6,30 (0.248)

3,10 (0.122)

2,90 (0.114)

0,10 (0.004)

3,70 (0.146)

3,30 (0.130)

7,30 (0.287)

6,70 (0.264)

Gauge Plane

0,25 (0.010)

0,84 (0.033)

0,66 (0.026)

0°–10°

2,30 (0.091)

0,10 (0.004)

4,60 (0.181)

0,75 (0.030) MIN

1,70 (0.067)

1,50 (0.059)

1,80 (0.071) MAX

0,35 (0.014)

0,23 (0.009)

Seating Plane

0,08 (0.003)

0,10 (0.0040)

0,02 (0.0008)

4202506/B 06/2002

NOTES: A. All linear dimensions are in millimeters (inches).

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion.

D. Falls within JEDEC TO-261 Variation AA.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OUTLINE

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

3.0

2.6

0.1 C

1.75

1.45

0.90

PIN 1

INDEX AREA

(0.1)

2X 0.95

1.9

3.05

2.75

1.9

(0.15)

0.5

0.3

0.15

0.00

(1.1)

TYP

0.2

C A B

NOTE 5

0.25

GAGE PLANE

0.22

0.08

TYP

0.6

0.3

TYP

SEATING PLANE

4214839/G 03/2023

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.25 mm per side.

5. Support pin may differ or may not be present.

www.ti.com

EXAMPLE BOARD LAYOUT

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

5X (1.1)

5X (0.6)

SYMM

(1.9)

2X (0.95)

(R0.05) TYP

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4214839/G 03/2023

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

5X (1.1)

5X (0.6)

SYMM

(1.9)

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4214839/G 03/2023

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

www.ti.com

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, regulatory or other requirements.

These resources are subject to change without notice. TI grants you permission to use these resources only for development of an

application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license

is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you

will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these

resources.

TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with

such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for

TI products.

TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

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TPS7B6950QDCYRQ1产品参数

型号:	TPS7B6950QDCYRQ1
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
零件包装代码：	SOT-223
包装说明：	SOP,
针数：	4
Reach Compliance Code：	compliant
ECCN代码：	EAR99
Factory Lead Time：	6 weeks
风险等级：	1.62
可调性：	FIXED
最大回动电压 1：	0.8 V
标称回动电压 1：	0.7 V
最大输入电压：	40 V
最小输入电压：	5.5 V
JESD-30 代码：	R-PDSO-G4
JESD-609代码：	e3
长度：	6.5 mm
湿度敏感等级：	3
功能数量：	1
输出次数：	1
端子数量：	4
工作温度TJ-Max：	150 °C
工作温度TJ-Min：	-40 °C
最大输出电流 1：	0.15 A
最大输出电压 1：	5.15 V
最小输出电压 1：	4.85 V
标称输出电压 1：	5 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
调节器类型：	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
筛选级别：	AEC-Q100
座面最大高度：	1.8 mm
表面贴装：	YES
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子节距：	2.3 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.5 mm
Base Number Matches：	1

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