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  • 北京元坤伟业科技有限公司

         该会员已使用本站17年以上

  • TPSM82480MOP
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  • 深圳市高捷芯城科技有限公司

     该会员已使用本站11年以上
  • TPSM82480MOPT 现货库存
  • 数量5239 
  • 厂家TI(德州仪器) 
  • 封装QFM-24 
  • 批号23+ 
  • 百分百原装正品,可原型号开票
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  • 0755-83062789 QQ:3007977934QQ:3007947087
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  • 集好芯城

     该会员已使用本站13年以上
  • TPSM82480MOP 现货库存
  • 数量19502 
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  • 封装 
  • 批号22+ 
  • 原装原厂现货
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  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • TPSM82480MOPR 现货库存
  • 数量18500 
  • 厂家TI(德州仪器) 
  • 封装QFM-24 
  • 批号23+ 
  • ★★全网低价,原装原包★★
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  • 深圳市创德丰电子有限公司

     该会员已使用本站15年以上
  • TPSM82480MOPR 现货库存
  • 数量100 
  • 厂家TI 
  • 封装QFN24 
  • 批号2021+ 
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  • 86-755-83226910, QQ:2851807192QQ:2851807191
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  • 深圳市宗天技术开发有限公司

     该会员已使用本站10年以上
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
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  • 数量500 
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  • 封装22+ 
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • TPSM82480MOPR 现货库存
  • 数量3000 
  • 厂家TI 
  • 封装QFM (MOP) 
  • 批号新批次 
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     该会员已使用本站15年以上
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  • 数量85000 
  • 厂家TI/德州仪器 
  • 封装QFM 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
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  • 0755-23605827 QQ:2881495753
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  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • TPSM82480MOPR
  • 数量13880 
  • 厂家TI/德州仪器 
  • 封装QFM-24 
  • 批号21+ 
  • 公司只售原装 支持实单
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  • 深圳市旺能芯科技有限公司

     该会员已使用本站4年以上
  • TPSM82480MOPT
  • 数量15000 
  • 厂家TI/德州仪器 
  • 封装QFM 
  • 批号22+ 
  • 深圳全新原装库存现货
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  • 13602549709 QQ:2881495751
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  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • TPSM82480MOPR
  • 数量8735 
  • 厂家TI(德州仪器) 
  • 封装NA/ 
  • 批号23+ 
  • 原厂直销,现货供应,账期支持!
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  • 集好芯城

     该会员已使用本站13年以上
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  • 数量11457 
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  • 封装 
  • 批号22+ 
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  • 深圳市拓亿芯电子有限公司

     该会员已使用本站12年以上
  • TPSM82480MOPR
  • 数量55000 
  • 厂家TI/德州仪器 
  • 封装24-SMD 
  • 批号23+ 
  • 只做原装正品假一罚十
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     该会员已使用本站11年以上
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  • 数量7398 
  • 厂家TI(德州仪器) 
  • 封装QFM-24 
  • 批号23+ 
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
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  • 数量12500 
  • 厂家TI/德州仪器 
  • 封装QFM-24 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
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  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
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  • 数量13500 
  • 厂家TI/德州仪器 
  • 封装QFM-24 
  • 批号24+ 
  • 原装进口正品现货,假一罚十价格优势
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  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
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  • 数量11765 
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     该会员已使用本站11年以上
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  • 数量6328 
  • 厂家TI-德州仪器 
  • 封装QFM-24 
  • 批号▉▉:2年内 
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     该会员已使用本站2年以上
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  • 数量55000 
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  • 封装QFM-24 
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  • 深圳市创德丰电子有限公司

     该会员已使用本站15年以上
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  • 数量100 
  • 厂家TI 
  • 封装QFN24 
  • 批号2021+ 
  • 一定原装正品
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  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
  • TPSM82480MOPT
  • 数量3750 
  • 厂家TI进口 
  • 封装QFM-24 
  • 批号22+ 
  • ★只做原装★正品现货★原盒原标★
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  • 深圳市凯信扬科技有限公司

     该会员已使用本站7年以上
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  • 数量69680 
  • 厂家TI/德州仪器 
  • 封装NA 
  • 批号21+ 
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  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • TPSM82480MOPR
  • 数量660000 
  • 厂家Texas Instruments(德州仪器) 
  • 封装SOIC-8 
  • 批号23+ 
  • 支持实单/只做原装
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  • 昂富(深圳)电子科技有限公司

     该会员已使用本站4年以上
  • TPSM82480MOPR
  • 数量250 
  • 厂家TI进口 
  • 封装QFM-24 
  • 批号24+ 
  • 一站式BOM配单,短缺料找现货,怕受骗,就找昂富电子.
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  • 0755-23611557【陈妙华 QQ:GTY82dX7
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • TPSM82480MOPR
  • 数量500 
  • 厂家INFINEON 
  • 封装QFM-24 
  • 批号22+ 
  • 新到现货、一手货源、当天发货、bom配单
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  • 深圳市恒嘉威智能科技有限公司

     该会员已使用本站7年以上
  • TPSM82480MOPR
  • 数量15000 
  • 厂家TI进口 
  • 封装QFM-24 
  • 批号21+ 
  • 原装正品价格绝对优势
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  • 深圳市芯柏然科技有限公司

     该会员已使用本站7年以上
  • TPSM82480MOPR
  • 数量2680 
  • 厂家INFINEON 
  • 封装QFM-24 
  • 批号21+ 
  • 新到现货、一手货源、当天发货、价格低于市场
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  • 深圳市珩瑞科技有限公司

     该会员已使用本站2年以上
  • TPSM82480MOPR
  • 数量250 
  • 厂家TI 
  • 封装QFM24 
  • 批号21+ 
  • 只做原装正品,支持实单
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  • 深圳市诚达吉电子有限公司

     该会员已使用本站2年以上
  • TPSM82480MOPR
  • 数量8578 
  • 厂家TI 
  • 封装QFM24 
  • 批号2024+ 
  • 原装正品 一手现货 假一赔百
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  • 深圳市隆鑫创展电子有限公司

     该会员已使用本站15年以上
  • TPSM82480MOPR
  • 数量30000 
  • 厂家ST/意法 
  • 封装SOP14 
  • 批号2022+ 
  • 电子元器件一站式配套服务QQ:122350038
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  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • TPSM82480MOPT
  • 数量6500000 
  • 厂家TI(德州仪器) 
  • 封装原厂原装 
  • 批号22+ 
  • 万三科技 秉承原装 实单可议
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  • 0755-21008751 QQ:3008961396
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  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • TPSM82480MOPR
  • 数量6500000 
  • 厂家Texas Instruments(德州仪器) 
  • 封装原厂原装 
  • 批号22+ 
  • 万三科技 秉承原装 实单可议
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  • 0755-23763516 QQ:3008962483
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  • 深圳市捷立辉科技有限公司

     该会员已使用本站10年以上
  • TPSM82480MOPR
  • 数量10000 
  • 厂家TI/德州仪器 
  • 封装NA 
  • 批号21+ 
  • 专营TI原装正品现货/可开增值税发票
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  • -0755-82792948 QQ:1803576909
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • TPSM82480MOPR
  • 数量3000 
  • 厂家TI 
  • 封装QFM (MOP) 
  • 批号新批次 
  • 新到现货、一手货源、当天发货、bom配单
  • QQ:2881512844QQ:2881512844 复制
  • 075584507705 QQ:2881512844
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  • 深圳市炎凯科技有限公司

     该会员已使用本站7年以上
  • TPSM82480MOPT
  • 数量70 
  • 厂家TI 
  • 封装QFM 
  • 批号24+ 
  • 原装现货
  • QQ:354696650QQ:354696650 复制
    QQ:2850471056QQ:2850471056 复制
  • 0755-89587732 QQ:354696650QQ:2850471056

产品型号TPSM82480MOPR的Datasheet PDF文件预览

Support &  
Community  
Product  
Folder  
Order  
Now  
Tools &  
Software  
Technical  
Documents  
TPSM82480  
ZHCSHU5A JULY 2017REVISED MARCH 2018  
TPSM82480 5.5V 输入、6A 降压转换器模块  
1 选项  
3 说明  
1
超小型 7.9 x 3.6 x 1.5mm 电源模块  
TPSM82480 是一款适用于低厚度负载点电源的同步降  
压直流/直流转换器模块。2.4V 5.5V 的输入电源范  
围使其既可以通过典型的 3.3V 5V 接口电源运行,  
也可以通过低至 2.4V 的备份电路运行。  
输出电流为 6A  
反馈电压精度为 ±1%  
输入电压范围:2.4V 5.5V  
输出电压范围:0.6V 5.5V  
典型静态电流为 23µA  
输出电压选择  
输出电流最大可达 6A,由每相各为 3A 的两相电源持  
续提供,能够以异相运行,显著降低脉冲电流噪声。  
TPSM82480 可在超轻负载时自动进入省电模式,并能  
保持高效率。其中包含自动增加/减少相位功能,具体  
使用一个相位还是两个相位视实际负载情况而定。可通  
模式功能关闭省电模式。  
相移操作  
自动节能模式  
强制 PWM 模式 选项  
可调节软启动  
电源正常和温度正常输出  
欠压锁定  
器件可提供电源正常信号和可调软启动。此外,该器件  
还 具有 温度正常信号指示内部温度过高。通过 VSEL  
引脚可将输出电压更改为预选值。TPSM82480 能够以  
100% 的占空比模式运行。  
过流和短路保护  
过热保护  
工作温度范围:-40°C 125°C  
器件信息(1)  
器件型号  
封装  
QFM (24)  
封装尺寸(标称值)  
2 应用  
TPSM82480MOP  
7.90 × 3.60 x 1.55mm  
薄型负载点电源  
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附  
录。  
存储、服务器、适配卡  
工业 PC/嵌入式 PC/FPGA 电源  
无线基站  
空白  
空白  
测试和测量  
典型应用电路原理图  
空白  
效率与输出电流间的关系  
空白  
空白  
10µF  
VOUT/6A  
VIN1  
VIN2  
VOUT  
FB  
2.4 to 5.5V  
R1  
R2  
TPSM82480  
R3  
10µF  
MODE  
VSEL  
EN  
RS  
SS/TR  
AGND  
PGND  
COUT  
3.3nF  
PG  
TG  
Copyright © 2017, Texas Instruments Incorporated  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLVSDT1  
 
 
 
 
TPSM82480  
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目录  
1
2
3
4
5
6
选项.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings ............................................................ 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Electrical Characteristics........................................... 5  
6.6 Typical Characteristics.............................................. 7  
Detailed Description .............................................. 8  
7.1 Overview ................................................................... 8  
7.2 Functional Block Diagram ......................................... 8  
7.3 Feature Description................................................... 9  
7.4 Device Functional Modes........................................ 10  
8
9
Application and Implementation ........................ 12  
8.1 Application Information............................................ 12  
8.2 Typical Application ................................................. 12  
8.3 System Examples .................................................. 22  
Power Supply Recommendations...................... 22  
10 Layout................................................................... 23  
10.1 Layout Guidelines ................................................. 23  
10.2 Layout Example .................................................... 23  
11 器件和文档支持 ..................................................... 24  
11.1 文档支持 ............................................................... 24  
11.2 接收文档更新通知 ................................................. 24  
11.3 社区资源................................................................ 24  
11.4 ....................................................................... 24  
11.5 静电放电警告......................................................... 24  
11.6 Glossary................................................................ 24  
12 机械、封装和可订购信息....................................... 24  
7
4 修订历史记录  
Changes from Original (July 2017) to Revision A  
Page  
已更改 将数据表状态从预告信息更改成了生产数据....................................................................................................... 1  
2
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5 Pin Configuration and Functions  
MOP Package  
24-Pin QFM  
1
2
3
3
2
1
14  
13  
12  
11  
10  
11  
12  
13  
20  
4
21  
24  
22  
23  
24  
21  
23  
22  
4
10  
20  
14  
BOTTOMVIEW  
TOPVIEW  
PIN1 Marker  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
VOUT1  
PGND1  
VIN1  
NO.  
1
Output Voltage Node Phase 1 (master), Must be connect with VOUT2  
Power Ground Phase 1 (master)  
2, 3, 20,21  
4, 24  
Supply voltage Phase 1 (master)  
EN  
5
Enable input (High=Enabled, Low = Disabled)  
Power Good (open drain, requires pull-up resistor)  
PG  
6
VSEL  
TG  
7
Output Voltage Select (High = VOUT2, Low=VOUT1) , VOUT1 < VOUT2  
Thermal Good (open drain, requires pull-up resistor)  
8
9
MODE  
VIN2  
Operating mode selection (Low=Automatic PWM/PSM, High = Forced PWM)  
Supply voltage Phase 2  
10, 23  
PGND2  
VOUT2  
11,12, 14, 22  
13  
Power Ground Phase 2  
Output Voltage Node Phase 2, Must be connected with VOUT1  
Soft-Start / Tracking. An external capacitor connected to this pin sets the output voltage rise  
time.  
SS/TR  
AGND  
FB  
15  
16  
17  
Analog Ground  
Output voltage feedback for the adjustable version. Connect resistive voltage divider to this  
pin.  
Resistor Select. Connect resistor that sets the level for the second output voltage here  
(activated by VSEL= High)  
RS  
VO  
18  
19  
VOUT detection (connect to VOUT, output discharge is internally connected to this pin)  
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3
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6 Specifications  
6.1 Absolute Maximum Ratings  
MIN  
-0.3  
-0.3  
-0.3  
MAX  
6
UNIT  
V
VIN  
Pin Voltage Range(1)  
EN, VSEL, MODE, SS/TR, PG, TG  
6
V
FB, RS  
PG, TG  
3
V
Power Good / Thermal Good Sink Current  
Operating Junction Temperature Range, TJ  
Storage Temperature Range, Tstg  
10  
150  
150  
mA  
°C  
°C  
-40  
-65  
(1) All voltages are with respect to network ground terminal.  
6.2 ESD Ratings  
VALUE  
UNIT  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)  
±1000  
V(ESD)  
Electrostatic discharge  
V
Charged device model (CDM), per JEDEC specification JESD22-C101,  
all pins(2)  
±500  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
MIN  
2.4  
TYP  
MAX  
UNIT  
V
Supply Voltage Range, VIN  
5.5  
5.5  
Output Voltage Range, VOUT  
Maximum Output Current, IOUT  
Operating junction temperature, TJ  
0.6  
6
V
A
–40  
125  
°C  
6.4 Thermal Information  
TPSM82480  
MOP 24 PINS  
THERMAL METRIC(1)  
UNIT  
JEDEC with thermal  
vias  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
32.2  
13.6  
11.5  
0.53  
11.3  
-
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
Junction-to-board thermal resistance  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
ψJB  
RθJC(bot)  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
4
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6.5 Electrical Characteristics  
over operating junction temperature range (TJ = –40°C to 125°C) and VIN = 2.4 V to 5.5 V. Typical values at VIN = 3.6 V and  
TJ = 25°C (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SUPPLY  
VIN rising  
VIN falling  
2.6  
5.5  
5.5  
VIN  
Input Voltage Range  
V
2.4  
2.2  
1.2  
EN = High, VIN 3 V, IOUT = 0 mA, device not  
switching,  
TJ = -40°C to +85°C  
23  
3.5  
38  
µA  
IQ  
Operating Quiescent Current  
100% Mode operation  
6.5  
mA  
µA  
V
ISD  
Shutdown Current  
EN = Low (0.3 V), TJ = -40°C to +85°C  
Falling Input Voltage  
0.5 18.5  
2.3  
200  
160  
10  
2.4  
VUVLO  
Undervoltage Lockout Threshold  
Hysteresis  
mV  
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
PWM Mode, Rising Junction Temperature  
PWM Mode  
TSD  
°C  
CONTROL (EN, VSEL, MODE, SS/TR, PG, TG)  
Input Threshold Voltage (EN,  
VSEL, MODE)  
VH  
to ensure High Level  
V
Input Threshold Voltage (EN,  
VSEL, MODE)  
VL  
to ensure Low Level  
EN = VIN or GND  
0.4  
200  
200  
5.8  
ILKG(EN)  
ILKG(MODE)  
ISS/TR  
Input Leakage Current (EN)  
10  
10  
nA  
nA  
µA  
Input Leakage Current (MODE,  
VSEL)  
SS/TR pin source current  
4.7  
5.25  
120  
10  
Thermal Good Threshold  
Temperature  
PWM Mode  
PWM Mode  
VTH(TG)  
°C  
Thermal Good Hysteresis  
Rising (%VOUT  
)
93%  
89%  
96% 99%  
92% 95%  
0.4  
VTH(PG)  
Power Good Threshold Voltage  
Falling (%VOUT  
)
VL(PG)  
ILKG(PG)  
ILKG(TG)  
tSS  
Output Low Threshold (PG, TG)  
Input Leakage Current (PG)  
Input Leakage Current (TG)  
Internal Soft-Start Time  
IPG = -2 mA  
V
2
2
700  
100  
nA  
nA  
µs  
SS/TR = VIN or floating  
80  
Time from EN rising until start  
switching  
tDELAY  
100  
200  
36  
400  
98  
µs  
POWER SWITCH  
Phase1  
High-Side MOSFET  
ON-Resistance  
mΩ  
Phase2  
Phase1  
Phase2  
RDS(ON)  
VIN 3 V  
Low-Side MOSFET  
ON-Resistance  
29  
72  
mΩ  
High-Side MOSFET  
Current Limit  
ILIM  
per phase  
4.2  
5.0  
5.8  
A
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Electrical Characteristics (continued)  
over operating junction temperature range (TJ = –40°C to 125°C) and VIN = 2.4 V to 5.5 V. Typical values at VIN = 3.6 V and  
TJ = 25°C (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
OUTPUT  
VREF  
Internal Reference Voltage  
Input Leakage Current (FB)  
Input Leakage Current (RS)  
Internal resistance (RS to GND)  
Output Voltage Range  
0.6  
V
nA  
nA  
Ω
ILKG(FB)  
ILKG(RS)  
RRS  
VFB = 0.6 V  
1
1
65  
65  
EN = High  
VSEL = Low, VRS = 0.6 V  
VSEL = High, IRS = 1 mA  
10  
50  
VOUT  
VIN VOUT  
0.6  
5.5  
1%  
V
PWM Mode,  
TJ = –20°C to 85°C  
-1%  
VOUT  
Feedback Voltage Accuracy  
V
V
IN VOUT + 1  
TJ = –40°C to 125°C  
-1.4%  
1.3%  
2.5%  
Power Save Mode, L = 0.47 µH,  
COUT = 4 x 22 µF(1)  
VOUT  
Feedback Voltage Accuracy  
-1.4%  
Output Discharge Current(2)  
Load Regulation  
EN = Low, VOUT = 2.5 V  
120  
mA  
VOUT = 1.8 V, PWM mode operation  
0.02  
%/A  
2.6 V VIN 5.5 V, VOUT = 1.8 V, IOUT = 6 A,  
PWM mode operation  
Line Regulation  
0.02  
%/V  
(1) The output voltage accuracy in Power Save Mode can be improved by increasing the output capacitor value, reducing the output voltage  
ripple.  
(2) For detailed information on output discharge see Active Output Discharge.  
6
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6.6 Typical Characteristics  
2. Quiescent Current  
3. Shutdown Current  
4. High-Side Switch Resistance  
5. Low-Side Switch Resistance  
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7 Detailed Description  
7.1 Overview  
The TPSM82480 is a high efficiency synchronous switched mode step-down converter module based on a 2-  
phase peak current control topology. It is designed for smallest solution size low-profile applications, converting a  
2.4 V to 5.5 V input voltage into a lower 0.6 V to 5.5 V output voltage. While an outer voltage loop sets the  
regulation threshold for the inner current loop, based on the actual VOUT level, the inner current loop regulates to  
the actual peak inductor current level for every switching cycle. The regulation network is internally compensated.  
While the ON-time is determined by duty cycle, inductance and cycle peak current, the switching frequency of  
typically 2.2 MHz is set by a predicted OFF-time. The device features a Power Save Mode (PSM) to keep the  
conversion efficiency high over the whole load current range.  
The TPSM82480 is a 2-phase converter, sharing the load among the phases. Identical in construction, the  
second phase control is connected with an adaptive delay to the first phase. Both the phases use the same  
regulation threshold and cycle-by-cycle peak current setpoint. This ensures a phase-shifted as well as current-  
balanced operation. Using the advantages of the 2-phase topology, a 6-A continuous output current is provided  
with high performance and as small as possible solution size.  
7.2 Functional Block Diagram  
space  
VIN2  
PG  
VO  
VIN1  
EN  
Power Save  
Mode  
VIN  
PG control  
UVLO  
VIN1  
HS1  
VIN  
EN  
off-timer  
VOUT1  
VOUT2  
VOUT  
VIN2  
HS2  
power  
control  
gate  
control logic  
drive  
MODE  
phase shift  
HS2  
tON2  
delay  
tON1  
HS2  
HS1  
SS/TR  
VSEL  
Thermal  
FB  
RS  
gmout  
OCP  
VREF  
Shutdown  
gm  
VREF  
VSEL  
HS1  
VSEL  
TG control  
TG  
AGND  
PGND1  
PGND2  
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6. TPSM82480  
8
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7.3 Feature Description  
7.3.1 Enable / Shutdown (EN)  
The device starts operation, when VIN is present and enable (EN) is set High. Since the boundary EN thresholds  
are specified with 1.2 V for rising and 0.4 V for falling voltages, the typical values are 0.85 V (rising) and 0.65 V  
(falling). The device is disabled by pulling EN Low. Leaving the EN pin floating is not recommended.  
7.3.2 Soft Start (SS), Pre-biased Output  
The internal soft start circuit controls the output voltage slope during startup. This avoids excessive inrush current  
and provides an adjustable controlled output-voltage rise time. The soft start also prevents unwanted voltage  
drop from high impedance power sources or batteries.  
When EN is set to start device operation, the device starts switching after a delay of typically 200 µs and VOUT  
rises with a slope, controlled by the external capacitor which is connected to the SS/TR pin (soft start). Leaving  
the SS/TR pin floating or connecting to VIN provides internally set fastest startup with a soft start slope of about  
80us. See Application Curves for typical startup operation.  
The device can start into a pre-biased output. In this case, the device starts switching, only when the internal set  
point for VOUT increases above the pre-biased voltage level.  
7.3.3 Tracking (TR)  
The device tracks an external voltage applied to the SS/TR pin. The FB voltage tracks the external voltage as  
long as it is below about 0.6V. Above 0.6V the device goes to normal operation. If the voltage at the SS/TR pin  
decreases below about 0.6V, the FB voltage tracks again this voltage. See Tracking for further details.  
7.3.4 Output Voltage Select (VSEL)  
A resistive divider (VOUT to FB to AGND) sets the output voltage of the TPSM82480. Providing a logic High  
level at the VSEL pin, the RS pin is pulled to ground, so that a resistor, between FB and RS pins is connected in  
parallel to the lower resistor of the divider. This sets a different higher output voltage and can be used for  
dynamic voltage scaling (see Setting VOUT2 Using the VSEL Feature).  
If the VSEL pin is set Low, the device connects an internal pull down resistor to the pin, keeping the internal logic  
level Low, even if the pin is floating afterwards. The device disconnects the resistor, if the pin is set to High.  
7.3.5 Forced PWM (MODE)  
To avoid Power Save Mode (PSM) Operation, the device can be forced to PWM mode operation by pulling the  
MODE pin High. In this case the device operates continuously with it's nominal switching frequency and the  
minimum peak current can go as low as -500 mA.  
If the MODE pin is set Low, the device connects an internal pull down resistor to keep the internal logic level  
Low, even if the pin is floating afterwards. The device disconnects the resistor, if the pin is set to High.  
7.3.6 Power Good (PG)  
The TPSM82480 has a built in power good function. The PG pin goes High, when the output voltage has  
reached its nominal value. Otherwise, including when disabled, in UVLO or thermal shutdown, PG is Low. The  
PG pin is an open drain output that requires a pull-up resistor and can sink typically 2mA. If not used, the PG pin  
can be left floating or grounded.  
7.3.7 Thermal Good (TG)  
As long as the junction temperature of the TPSM82480 is below the thermal good temperature of typically 120°C,  
the logic level at the TG pin is High. If the junction temperature exceeds that temperature, the TG pin goes Low.  
This can be used for the system to take action preventing excessive heating or even thermal shutdown. The TG  
pin is an open drain output that requires a pull-up resistor and can sink typically 2mA. If not used, the TG pin can  
be left floating or grounded.  
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Feature Description (接下页)  
7.3.8 Active Output Discharge  
The VO pin, connected to the output voltage, provides an active discharge path when the device is switched off  
by setting EN Low or UVLO event. In case of being activated, this discharge circuit sinks typically 120mA for  
output voltages of typically 1 V and above. If VOUT is lower, the active current sink enters linear operation mode  
and the discharge current decreases.  
7.3.9 Undervoltage Lockout (UVLO)  
The undervoltage lockout prevents misoperation of the device, if the input voltage drops below the UVLO  
threshold which is set to typically 2.3 V. The converter starts operation again once the input voltage exceeds the  
threshold by a hysteresis of typically 200 mV.  
7.3.10 Thermal Shutdown  
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds 160°C  
(typical), the device goes in thermal shutdown with a hysteresis of about 10°C. Both the power FETs are turned  
off and the PG pin goes Low. Once TJ has decreased enough, the device resumes normal operation with Soft  
Start.  
7.4 Device Functional Modes  
7.4.1 Pulse Width Modulation (PWM) Operation  
The TPSM82480 is based on a predictive OFF-time peak current control topology, operating with PWM in  
continuous conduction mode for current loads larger than half the ripple current. The switching frequency is  
typically 2.2MHz. Both the master and follower phase regulate to the same VOUT level, each with a separate  
current loop, using the same peak current set point, cycle by cycle. This provides excellent peak current  
balancing, independent of inductor dc resistance matching. Since the follower phase operates with an adaptive  
delay to the master phase, phase shifted operation is always obtained. If the load current decreases, the device  
runs with the master phase only (see Phase Add/Shed and Current Balancing).  
PWM only mode can be forced by pulling MODE pin High. If MODE is set Low, the device features an automatic  
transition into Power Save Mode, entered at light loads, running in discontinuous conduction mode (DCM).  
7.4.2 Power Save Mode (PSM) Operation  
As the load current decreases to half the ripple current, the converter enters Power Save Mode operation. During  
PSM, the converter operates with reduced switching frequency maintaining high conversion efficiency. Power  
Save Mode is based on an adaptive peak current target, to keep output voltage ripple low. Since each pulse  
shifts VOUT up, a pause time happens until VOUT trips the internal VOUT_Low threshold again and the next pulse  
takes place.  
The switching frequency in PSM (one phase operation) calculates as:  
space  
2 ×IOUT × VOUT (VIN - VOUT  
)
fSW(PSM)  
=
L ×IP2EAK × V  
IN  
(1)  
7.4.3 Minimum Duty Cycle and 100% Mode Operation  
The minimum on-time, which is typically 70ns, normally determines a limit on the minimum operating duty cycle.  
The calculation is:  
space  
DCmin = 70ns×100%× fSW [Hz]  
(2)  
space  
However, a frequency foldback lowers the switching frequency depending on the duty cycle and ensures proper  
regulation for every duty cycle.  
10  
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Device Functional Modes (接下页)  
There is no limit towards maximum duty cycle. When the input voltage becomes close to the output voltage, the  
device enters automatically 100% duty cycle mode and both high-side FETs switch on as long as VOUT remains  
below the regulation setpoint. In this case, the voltage drop across the high-side FETs and the inductors  
determines the output voltage level. An estimate for the minimum input voltage to maintain output voltage  
regulation is:  
space  
R
é
OUT ê  
ë
ù
ú
û
DS(ON)  
V
= VOUT(min) + I  
+13.5mW  
IN(min)  
2
(3)  
space  
Where the maximum DCR of the inductors is 27mΩ.  
In 100% duty cycle mode, the low-side FETs are switched off. The typical quiescent current in 100% mode is  
3.5 mA.  
7.4.4 Phase Shifted Operation  
Using an inherent benefit of the two-phase conversion, the two phases of TPSM82480 run out of phase. For  
every switching cycle, the second phase is not allowed to turn on its high-side FET until the master phase has  
reached its peak current value. This limits the input RMS current and corresponding switching noise.  
7.4.5 Phase Add/Shed and Current Balancing  
When the load current is below the internal threshold, only the master phase operates. The second phase  
activates, if the load current exceeds the threshold of typically 1.7 A. The second phase powers off with a  
hysteresis of about 0.5 A, when the load current decreases.  
7.4.6 Current Limit and Short Circuit Protection  
Each phase has a separate integrated peak current limit. The dc values are specified in the Electrical  
Characteristics. While its minimum value limits the output current of the phase, the maximum number gives the  
current that must be considered to flow in some operating case (e.g. overload). At the peak current limit, the  
device provides its maximum output current.  
However, if the current limit situation remains for 512 consecutive switching cycles, the peak current folds back to  
about 1/3 of the regular limit. This limits the output power for over current and short circuit events. The foldback  
current limit is released to the normal one only if the load current has decreased as far as needed to undercut  
the (foldback) peak current limit.  
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8 Application and Implementation  
space  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
space  
8.1 Application Information  
The TPSM82480 is a switched mode step-down converter module, able to convert a 2.4-V to 5.5-V input voltage  
into a lower 0.6-V to 5.5-V output voltage, providing up to 6 A continuous output current. It needs a minimum  
amount of external components. Apart from the output and input capacitors, additional resistors or capacitors are  
only needed to enable features like soft start, adjustable and selectable output voltage as well as Power Good  
and/or Thermal Good.  
8.2 Typical Application  
space  
C1  
VOUT/6A  
VOUT2  
VOUT1  
VIN1  
VIN2  
VIN  
2.4 to 5.5V  
VO  
FB  
RS  
C2  
R1  
R2  
TPSM82480  
EN  
R3  
C5  
C3/C4  
C7/C8  
VTG  
VPG  
MODE  
VSEL  
PG  
R4  
SS/TR  
AGND  
R5  
PGND1  
PGND2  
TG  
PGND  
PGND  
Copyright © 2017, Texas Instruments Incorporated  
space  
7. Typical Application using TPSM82480 for a 6A Point-Of-Load Power Supply  
space  
8.2.1 Design Requirements  
The following design guideline provides a range for the component selection to operate within the recommended  
operating conditions. 1 shows the components selection that was used for the measurements shown in the  
Application Curves.  
12  
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Typical Application (接下页)  
1. List of Components  
REFERENCE  
DESCRIPTION  
MANUFACTURER  
TPSM82480MOP, Texas Instruments  
GRM188R61A226ME15#, muRata  
GRM21BR61E226ME44L, muRata  
Standard  
Power Module  
C1, C2  
5.5-V, 6-A step-down module with integrated inductor  
2x22-µF, 10-V, ceramic, 0603, X5R  
C3, C4, C7, C8  
C5  
4x22-µF, 25-V, ceramic, 0805, X5R  
3300-pF, 10-V, ceramic, 0402  
R1, R2, R3  
R4, R5  
Depending on Vout1 and Vout2, chip, 0402, 0.1%  
470-kΩ, chip, 0603, 1/16-W, 1%  
Standard  
Standard  
8.2.2 Detailed Design Procedure  
8.2.2.1 Setting the Adjustable Output Voltage  
While the device regulates the FB voltage to 0.6V, the output voltage is specified from 0.6 to 5.5 V. A resistive  
divider (from VOUT to FB to AGND) sets the actual output voltage of the TPSM82480. 公式 4 and 公式 5 are  
calculating the values of the resistors. First, determining the current through the resistive divider leads to the total  
resistance (R1 + R2). A minimum divider current of about 5 µA is recommended and can be higher if needed.  
space  
VOUT  
R1 + R2 =  
IFB  
(4)  
VREF  
R2 =  
(R1 + R2 )  
VOUT  
(5)  
space  
8.2.2.2 Setting VOUT2 Using the VSEL Feature  
A VOUT level, different as set with R1 and R2 (see Setting the Adjustable Output Voltage), can be forced by  
connecting R3 between FB and RS pins and pulling VSEL High. R3 is calculated using 公式 6.  
space  
V1 ×R1 ×R22  
(V2 - V1)×(R1 ×R2 + R22)  
R3 =  
for (V2 > V1)  
(6)  
where:  
V1 is the lower level output voltage and  
V2 the higher level output voltage.  
space  
8.2.2.3 Output Capacitor Selection  
The recommended minimum output capacitance is 4 x 22 µF, that can be ceramic capacitors exclusively. A  
larger value of COUT might be needed for VOUT 1.8V, to improve transient response performance, as well as for  
VOUT > 3.3 V to compensate for voltage bias effects of the ceramic capacitors. The usage of an additional feed  
forward capacitor can help reducing amount of output capacitance that is needed to achieve a certain transient  
response target (see 3).  
The TPSM82480 provides a wide output voltage range of 0.6 V to 5.5 V. While stability is a critical criteria for the  
output filter selection, the output capacitor value also determines transient response behavior, ripple and  
accuracy of VOUT. The internal compensation is designed for an output capacitance range from about 50 µF to  
150 µF effectively. Since ceramic capacitors are used preferably, this translates into nominal values of 4 x 22 µF  
to 4 x 47 µF and mainly depends on the output voltage. The following values are recommended:  
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ZHCSHU5A JULY 2017REVISED MARCH 2018  
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2. Recommended Output Capacitor Values (nominal)  
VOUT 1.0V  
1.0V VOUT 3.3V  
VOUT 3.3V  
2x22µF  
4x22µF  
4x47µF  
6x47µF  
space  
Beyond the recommendations in 2, other values can be chosen and might be suitable depending on VOUT  
and actual effective capacitance. In such case, stability needs to be checked within the actual environment.  
Even if the output capacitance is sufficient for stability, a different value might be desirable to improve the  
transient response behavior. 3 can be used to determine capacitor values for specific transient response  
targets:  
3. Recommended Output Capacitor Values (nominal)  
Output Voltage [V]  
Load Step [A]  
Output Capacitor Value(1) Feedforward Capacitor(1)  
Typical Transient  
Response Accuracy  
±mV  
50  
±%  
5
0 - 3  
3 - 6  
0 - 3  
3 - 6  
0 - 3  
3 - 6  
0 - 3  
3 - 6  
-
1.0  
1.8  
2.5  
3.3  
4 x 47µF  
50  
5
50  
3
4 x 22µF  
4 x 22µF  
4 x 47µF  
36pF  
36pF  
36pF  
50  
3
62  
2.5  
2
50  
100  
80  
3
2.5  
(1) The values in the table are nominal values. The effective capacitance can differ significantly, depending on package size, voltage rating  
and dielectric material.  
space  
The architecture of the TPSM82480 allows the use of tiny ceramic output capacitors with low equivalent series  
resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low  
resistance up to high frequencies and to get narrow capacitance variation with temperature, it is recommended to  
use X5R or X7R dielectrics. Using even higher values than demanded for stability and transient response has  
further advantages like smaller voltage ripple and tighter dc output accuracy in Power Save Mode.  
8.2.2.4 Input Capacitor Selection  
The input current of a buck converter is pulsating. Therefore, a low ESR input capacitor is required to prevent  
large voltage transients at the source but still providing peak currents to the device. The recommended  
Capacitance value for most applications is 2 x 10 µF, split between the VIN1 and VIN2 inputs and placed as  
close as possible to these pins and PGND pins. If additional capacitance is needed, it can be added as bulk  
capacitance. To ensure proper operation, the effective capacitance at the VIN pins must not fall below 2 x 5 µF.  
Low ESR multilayer ceramic capacitors are recommended for best filtering. Increasing with input voltage, the dc  
bias effect reduces the nominal capacitance value significantly. To decrease input ripple current further, larger  
values of input capacitors can be used.  
8.2.2.5 Soft Start Capacitor Selection  
The soft start ramp time can be set externally connecting a capacitor between the SS/TR and AGND pins. The  
capacitor value CSS that is needed to get a specific rising time ΔtSS calculates as:  
space  
5.25mA  
CSS = DtSS  
×
0.6V  
(7)  
14  
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TPSM82480  
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ZHCSHU5A JULY 2017REVISED MARCH 2018  
space  
Since the device has an internal delay time ΔtDELAY from EN=High to start switching, the overall startup time is  
longer as shown in 8.  
H
L
PG  
H
EN  
L
nom  
0
VOUT  
DtDELAY  
DtSS  
8. Soft Start ΔtSS  
If very large output capacitances are used (e.g. >4x47µF), the use of a soft start capacitor is mandatory to avoid  
current limit foldback during startup (see Current Limit and Short Circuit Protection).  
8.2.2.6 Tracking  
For values up to 0.6V, an external voltage, connected to the SS/TR pin, drives the voltage level at the FB pin. In  
doing so, the voltage at the FB pin is directly proportional to the voltage at the SS/TR pin.  
When choosing the resistive divider proportion according to 公式 8, VOUT tracks VTR simultaneously.  
space  
R1 R3  
=
R2 R4  
(8)  
space  
VTR  
VOUT  
TPSM82480  
R3  
R1  
SS/TR  
FB  
0.6V  
0V  
R4  
R2  
Copyright © 2017, Texas Instruments Incorporated  
9. Voltage Tracking  
space  
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Following the example of Setting the Adjustable Output Voltage with VOUT = 1.8 V, R1 = 240 kΩ and R2 = 120 kΩ,  
公式 9 and 公式 10 calculate R3 and R4, connected to the SS/TR pin. Different to the resistive divider at the FB  
pin, a larger current must be chosen, to avoid a tracking offset caused by the 5.25 µA current that flows out of  
the SS/TR pin. Assuming a 250 µA current, R4 calculates as follows:  
space  
0.6V  
R4 =  
= 2.4kW  
250mA  
(9)  
space  
R3 calculates now rearranging 公式 8:  
space  
R1  
R2  
240kW  
120kW  
R3 = R4 ×  
= 2.4kW ×  
= 4.8kW  
(10)  
space  
However, the following limitations can influence the tracking accuracy:  
The upper limit of the SS/TR voltage that can be tracked is about 0.6V. Since it is detected internally by a  
comparator, process variation and ramp speed can cause up to ±30 mV different threshold.  
In case that the voltage at SS/TR ramps up immediately when VIN is supplied or EN is set High, the internal  
startup delay, ΔtDELAY, delays the ramp of VOUT. The internal ramp starts after ΔtDELAY at the voltage level,  
which is actually present at the SS/TR pin.  
The tracking down speed is limited by the RC time constant of the internal output discharge (always  
connected when tracking down) and the actual load with the output capacitance. Note: The device tracks  
down with the same behavior for MODE High (Forced PWM) and Low (Auto PSM).  
8.2.2.7 Thermal Good  
The Thermal Good pin provides an open drain output. The logic level is given by the pull up source which can be  
VOUT. In this case, TG goes or stays Low, when the device switches off due to EN, UVLO or Thermal  
Shutdown.  
When using an independent source for the pull up logic, the logic behavior at shutdown differs, because the TG  
pin internally goes high impedance. As before, TG goes Low when TG threshold is reached, but goes back High  
in the event of being switched off (e.g. Thermal Shutdown).  
16  
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TPSM82480  
www.ti.com.cn  
ZHCSHU5A JULY 2017REVISED MARCH 2018  
8.2.3 Application Curves  
VIN= 3.6 V, VOUT = 1.8V (R1 / R2 = 240 kΩ / 120 kΩ), TA = 25°C, (unless otherwise noted)  
VOUT = 3.2 V  
10. Efficiency vs Output Current  
VOUT = 3.2 V  
11. Efficiency vs Input Voltage  
VOUT = 1.8 V  
12. Efficiency vs Output Current  
VOUT = 1.8 V  
13. Efficiency vs Output Voltage  
VOUT = 0.9 V  
14. Efficiency vs Output Current  
VOUT = 0.9 V  
15. Efficiency vs Input Voltage  
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17  
TPSM82480  
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16. Output Voltage vs Output Current  
(Load Regulation)  
17. Output Voltage vs Input Voltage  
(Line Regulation)  
VOUT = 0.6 V  
18. Maximum Output Current  
VOUT = 5.5 V  
19. Maximum Output Current  
VOUT = 2.5 V  
20. Switching Frequency vs Output Current  
VOUT = 1 V  
21. Switching Frequency vs Output Current  
18  
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TPSM82480  
www.ti.com.cn  
ZHCSHU5A JULY 2017REVISED MARCH 2018  
VOUT = 1.8 V  
VOUT = 1.8 V  
22. Startup into 3.3 Ω resistor  
23. Startup into 0.3 Ω resistor  
VOUT = 2.5 V  
no load  
VOUT = 1 V  
no load  
24. Output Discharge  
25. Output Discharge  
IOUT = 50 mA  
26. Typical Operation PWM  
27. Typical Operation PSM  
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TPSM82480  
ZHCSHU5A JULY 2017REVISED MARCH 2018  
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28. Adding 2nd Phase  
29. Shedding 2nd Phase  
Cff = 36 pF (nom)  
30. Load Transient Response (PSM-PWM),  
31. Load Transient Response (PSM-PWM),  
Load Step 0 to 3 A  
Load Step 0 to 3 A  
Cff = 36 pF (nom)  
32. Load Transient Response (PWM-PWM),  
33. Load Transient Response (PWM-PWM),  
Load Step 3 to 6 A  
Load Step 3 to 6 A  
20  
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TPSM82480  
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ZHCSHU5A JULY 2017REVISED MARCH 2018  
Cff = 36 pF (nom)  
IOUT = 10 A  
34. Load Transient Response (PWM-PWM),  
35. Current Limit Fold-Back at Overload  
Load Step 0 to 6 A  
VIN = 5 V  
VOUT = 3.3 V  
IOUT = 6 A  
VIN = 5 V  
VOUT = 3.3 V  
37. Device Temperature (TPSM82480 EVM)  
36. Maximum Ambient Temperature for TJ=125°C  
(TPSM82480 EVM)  
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21  
TPSM82480  
ZHCSHU5A JULY 2017REVISED MARCH 2018  
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8.3 System Examples  
This section provides typical schematics for commonly used output voltage values.  
space  
space  
22µF  
1.8V & 2.5V/6A  
VOUT2  
VOUT1  
VIN1  
VIN2  
VIN  
VO  
FB  
RS  
22µF  
240k  
120k  
TPSM82480  
EN  
206k  
2x  
2x  
VTG  
VPG  
22µF  
22µF  
MODE  
VSEL  
PG  
3.3nF  
470k  
SS/TR  
AGND  
470k  
PGND1  
PGND2  
TG  
PGND  
PGND  
Copyright © 2017, Texas Instruments Incorporated  
38. A typical 1.8 V & 2.5 V, 6 A Power Supply  
space  
4. Resistive Divider Values for different Combinations of VOUT  
OUTPUT VOLTAGE  
R1  
R2  
R3  
2.5V and 3.3V  
1.2V and 1.8V  
0.9V and 1.0V  
380kΩ  
120kΩ  
60kΩ  
120kΩ  
120kΩ  
120kΩ  
285kΩ  
120kΩ  
360kΩ  
space  
9 Power Supply Recommendations  
The TPSM82480 is designed to operate from a 2.4-V to 5.5-V input voltage supply. The input power supply's  
output current needs to be rated according to the output voltage and the output current of the power rail  
application.  
22  
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TPSM82480  
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ZHCSHU5A JULY 2017REVISED MARCH 2018  
10 Layout  
10.1 Layout Guidelines  
A recommended PCB layout for the TPSM82480 dual phase solution is shown below. It ensures best electrical  
and optimized thermal performance considering the following important topics:  
- Both VOUT1 and VOUT2 must be connected to build a common VOUT structure.  
- The input capacitors must be placed as close as possible to the appropriate pins of the device. This provides  
low resistive and inductive paths for the high di/dt input current. The input capacitance is split, as is the VIN  
connection, to avoid interference between the input lines.  
- The VOUT regulation loop is closed with COUT and its ground connection. To avoid PGND noise crosstalk, PGND  
is kept split for the regulation loop. If a ground layer or plane is used, a direct connection by vias, as shown, is  
recommended. Otherwise the connection of COUT to GND must be short for good load regulation.  
- The FB node is sensitive to dv/dt signals. Therefore the resistive divider should be placed close to the FB (and  
RS pin in case of using R3) pin, avoiding long trace distance.  
For more detailed information about the actual EVM solution, see SLVUAI6.  
space  
10.2 Layout Example  
space  
space  
C3  
C4  
PGND  
PGND1  
C1  
R1  
R3  
VO  
RS  
EN  
PG  
VSEL  
TG  
VB  
VIN  
PGND VOUT  
AGND  
SS/TR  
R2  
C5  
MODE  
PGND2  
C2  
PGND  
C7  
C8  
39. TPSM82480 Board Layout  
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23  
TPSM82480  
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11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档  
如需相关文档,请参阅:  
TPSM82480EVM-BSR002 评估模块用户指南》SLVUB57  
11.2 接收文档更新通知  
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。请单击右上角的提醒我 进行注册,即可每周接收  
产品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。  
11.3 社区资源  
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商按照原样提供。这些内容并不构成 TI 技术规范,  
并且不一定反映 TI 的观点;请参阅 TI 《使用条款》。  
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在  
e2e.ti.com 中,您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。  
设计支持  
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。  
11.4 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
11.6 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,也  
不会对此文档进行修订。如欲获取此数据表的浏览器版本,请参阅左侧的导航。  
24  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Feb-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TPSM82480MOPR  
TPSM82480MOPT  
ACTIVE  
ACTIVE  
QFM  
QFM  
MOP  
MOP  
24  
24  
3000 RoHS & Green  
250 RoHS & Green  
Call TI  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
82480  
82480  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Feb-2021  
Addendum-Page 2  
PACKAGE OUTLINE  
MOP0024A  
QFM - 1.55 mm max height  
S
C
A
L
E
2
.
3
0
0
S
C
A
L
E
2
.
3
0
0
QUAD FLAT MODULE  
8.0  
7.8  
A
B
PIN 1 ID AREA  
3.7  
3.5  
1.75 MAX  
PICK & PLACE NOZZLE AREA  
1.55 MAX  
C
SEATING  
PLANE  
0.08 C  
1.35  
1.15  
0.1  
(0.05) TYP  
18X 1.475  
4X 0.675  
6X  
C A B  
3
11  
12  
4
10  
0.05  
23  
24  
21  
2.0  
1.8  
0.000  
SYMM  
2X  
2
1
22  
0.65  
0.45  
4X  
20  
13  
14  
0.65  
18X  
1.1  
0.9  
0.1  
0.05  
4X  
0.45  
0.3  
0.2  
10X  
0.1  
C A B  
2.3  
2.1  
C A B  
4X  
0.1  
C A B  
0.05  
0.05  
4223492/C 04/2018  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
MOP0024A  
QFM - 1.55 mm max height  
QUAD FLAT MODULE  
6X (1.25)  
(R0.05) TYP  
1
2
20  
18X (1.475)  
4X (1.075)  
18X (0.55)  
13  
14  
22  
21  
(0.675)  
2 PADS & 2 VIAS  
12  
4X (0.07)  
0.000 SYMM  
2X (1.9)  
16X (0.3)  
24  
23  
8X (1.075)  
4X (0.55)  
10  
4
11  
3
(
0.2) VIA  
TYP  
10X (0.25)  
4X (1)  
4X (2.2)  
LAND PATTERN EXAMPLE  
SOLDER MASK DEFINED  
SCALE:15X  
0.05 MIN  
ALL AROUND  
SOLDER MASK  
OPENING  
EXPOSED  
METAL  
METAL UNDER  
SOLDER MASK  
PAD DETAIL  
TYPICAL  
4223492/C 04/2018  
NOTES: (continued)  
3. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments  
literature number SLUA271 (www.ti.com/lit/slua271).  
4. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown  
on this view.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
MOP0024A  
QFM - 1.55 mm max height  
QUAD FLAT MODULE  
4X (1.875)  
PADS 4,10,14 & 20  
SOLDER MASK  
EDGE, TYP  
SYMM  
4X (0.95)  
PADS 4,  
10,14 & 20  
8X (0.98)  
METAL UNDER  
SOLDER MASK  
TYP  
PADS 21-24  
8X (0.5)  
(R0.05) TYP  
1
20  
14  
13  
12  
18X  
(1.475)  
22  
23  
21  
24  
2
SYMM  
2X (1.7)  
8X  
(0.675)  
4
16X (0.52)  
3
10  
11  
10X (0.25)  
6X  
(1.17)  
EXPOSED  
METAL  
TYP  
4X (0.685)  
4X (1.865)  
10X (0.55)  
PADS 21-24  
6X (3.275)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE  
PADS 1, 3, 11 & 13: 88%  
PADS 4, 10, 14 & 20: 90%  
PADS 2, 12 & 21-24: 84%  
SCALE:15X  
4223492/C 04/2018  
NOTES: (continued)  
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
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配单直通车
TPSM82480MOPR产品参数
型号:TPSM82480MOPR
Brand Name:Texas Instruments
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
包装说明:QCCN,
Reach Compliance Code:compliant
Factory Lead Time:8 weeks
风险等级:1.71
其他特性:OUTPUT IN ADJUSTABLE MODE IS 0.6V TO 5.5V
模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V
最小输入电压:2.4 V
标称输入电压:3.6 V
JESD-30 代码:R-PXMA-B24
长度:7.9 mm
湿度敏感等级:2
功能数量:1
端子数量:24
最高工作温度:125 °C
最低工作温度:-40 °C
最大输出电流:6 A
最大输出电压:5.5 V
最小输出电压:0.6 V
封装主体材料:PLASTIC/EPOXY
封装代码:QCCN
封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.55 mm
表面贴装:YES
切换器配置:BUCK
最大切换频率:3000 kHz
温度等级:AUTOMOTIVE
端子形式:BUTT
端子节距:0.5 mm
端子位置:UNSPECIFIED
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.6 mm
Base Number Matches:1
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