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产品型号UC3843BD1的概述

UC3843BD1芯片概述 UC3843BD1是一种高性能的PWM（脉宽调制）控制器，常用于开关电源（SMPS）设计。该芯片属于UC384x系列，专门设计用于提供高效率、高可靠性的电源转换解决方案。作为一种集成电路，UC3843BD1在业内广泛应用于各种电源管理系统，如适配器、电源模块以及工业设备等。其设计目的是为了在保持较高的电源转换效率的同时，减少成本和系统复杂度。在功能上，UC3843BD1提供了对电流模式控制的支持，这使得其在负载变化时能够快速调整输出，确保电源的稳定性和响应速度。此外，UC3843BD1也集成有多种保护功能，包括过流保护、欠压锁定和温度保护等，这进一步增强了其在严苛环境下的操作稳定性。 UC3843BD1详细参数 - 工作电压: 8V至38V - 启动电流: 60µA（典型值） - 最大工作频率: 100kHz - 栅极驱动电流: 1A（源极），2A（漏极）...

产品型号UC3843BD1的Datasheet PDF文件预览

UC2842B/3B/4B/5B

UC3842B/3B/4B/5B

HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER

TRIMMED OSCILLATOR FOR PRECISE FRE-

QUENCY CONTROL

OSCILLATOR FREQUENCY GUARANTEED

AT 250kHz

CURRENT MODE OPERATION TO 500kHz

AUTOMATIC FEED FORWARD COMPENSA-

TION

Minidip

SO8

LATCHING PWM FOR CYCLE-BY-CYCLE

CURRENT LIMITING

INTERNALLY TRIMMED REFERENCE WITH

UNDERVOLTAGE LOCKOUT

HIGH CURRENT TOTEM POLE OUTPUT

UNDERVOLTAGE LOCKOUT WITH HYSTER-

ESIS

comparatorwhichalsoprovidescurrentlimitcontrol,

and a totem pole output stage designed to source

orsinkhighpeakcurrent.Theoutputstage,suitable

for driving N-Channel MOSFETs, is low in the off-

state.

LOW START-UPAND OPERATINGCURRENT

Differencesbetween members of this family are the

under-voltagelockoutthresholdsandmaximum duty

cycle ranges. The UC3842B and UC3844B have

UVLO thresholds of 16V (on) and 10V (off), ideally

suitedoff-lineapplicationsThecorrespondingthresh-

oldsfortheUC3843BandUC3845Bare8.5Vand7.9

V. The UC3842B and UC3843B can operateto duty

cycles approaching100%. A range of the zero to <

50 % is obtainedby the UC3844Band UC3845Bby

theadditionofan internaltoggleflipflopwhichblanks

theoutputoff everyotherclock cycle.

DESCRIPTION

TheUC384xBfamilyofcontrolICsprovidesthenec-

essary features to implement off-line or DC to DC

fixedfrequencycurrent modecontrol schemes with

a minimal external parts count. Internally imple-

mentedcircuits includea trimmed oscillator for pre-

cise DUTY CYCLE CONTROL under voltagelock-

outfeaturingstart-upcurrentlessthan0.5mA,a pre-

cision reference trimmed for accuracy at the error

ampinput,logicto insurelatchedoperation,a PWM

BLOCK DIAGRAM (toggle flip flop used only in UC3844B and UC3845B)

UVLO

34V

REF

VREF

5V 50mA

S/R

GROUND

INTERNAL

BIAS

2.50V

VREF GOOD

LOGIC

OUTPUT

RT/CT

OSC

ERROR AMP.

VFB

PWM

LATCH

COMP

CURRENT

SENSE

UC3842B

CURRENT

SENSE

COMPARATOR

D95IN331

1/15

March 1999

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Supply Voltage (low impedance source)

Supply Voltage (Ii < 30mA)

Value

Unit

V_i

Self Limiting

I_O

Output Current

E_O

Output Energy (capacitive load)

Analog Inputs (pins 2, 3)

– 0.3 to 5.5

Error Amplifier Output Sink Current

P_tot

T_stg

T_J

1.25

Power Dissipation at T_amb25 C (Minidip)

≤

800

Power Dissipation at Tamb 25 C (SO8)

≤

Storage Temperature Range

Junction Operating Temperature

– 65 to 150

– 40 to 150

300

°C

T_L

Lead Temperature (soldering 10s)

All voltages arewith respect to pin 5, all currents are positive into the specified terminal.

PIN CONNECTION (top view)

Minidip/SO8

COMP

V_FB

V_REF

I_SENSE

R_T/C_T

OUTPUT

GROUND

D95IN332

PIN FUNCTIONS

Function

Description

This pin is the Error Amplifier output and is made available for loop compensation.

COMP

V_FB

This is the inverting input of the Error Amplifier. It is normally connected to the switching

power supply output through a resistor divider.

I_SENSE

R_T/C_T

A voltage proportional to inductor current is connected to this input. The PWM uses this

information to terminate the output switch conduction.

The oscillator frequency and maximum Output duty cycle are programmed by connecting

resistor R_Tto Vref and cpacitor C_Tto ground. Operation to 500kHz is possible.

GROUND This pin is the combined control circuitry and power ground.

OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced

and sunk by this pin.

V_CC

V_ref

This pin is the positive supply of the control IC.

This is the reference output. It provides charging current for capacitor C_Tthrough resistor R_T.

ORDERING NUMBERS

SO8

Minidip

UC2842BD1; UC3842BD1

UC2843BD1; UC3843BD1

UC2844BD1; UC3844BD1

UC2845BD1; UC3845BD1

UC2842BN; UC3842BN

UC2843BN; UC3843BN

UC2844BN; UC3844BN

UC2845BN; UC3845BN

2/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

THERMAL DATA

Symbol

Description

Minidip

SO8

Unit

C/W

R_{th j-amb}Thermal Resistance Junction-ambient.

max.

100

150

ELECTRICAL CHARACTERISTICS

( [note 1] Unless otherwise stated, these specifications apply for

-25 < T_amb< 85°C forUC284XB;0 < T_amb< 70°C for UC384XB; V_i= 15V (note 5); R_T= 10K; C_T= 3.3nF)

UC284XB

UC384XB

Symbol

Parameter

Test Conditions

Unit

Min. Typ. Max. Min. Typ. Max.

REFERENCE SECTION

V_REF

∆V_REF

Output Voltage

4.95 5.00 5.05 4.90 5.00 5.10

T_j= 25°C I_o= 1mA

12V ≤ V_i≤ 25V

1 ≤ I_o≤ 20mA

Line Regulation

Load Regulation

Temperature Stability

Total Output Variation

Output Noise Voltage

(Note 2)

0.2

∆

/ T

mV/ C

∆

REF

Line, Load, Temperature

4.9

5.1 4.82

5.18

e_N

10Hz

10KHz T = 25 C

≤

(note 2)

Long Term Stability

Output Short Circuit

T_amb

125 C, 1000Hrs

(note 2)

I_SC

-30 -100 -180 -30 -100 -180 mA

OSCILLATOR SECTION

f_OSCFrequency

–

KHz

T = 25 C

T_A= T_lowto T_high

225 250 275 225 250 275 KHz

T_J= 25°C(R_T= 6.2k, C_T= 1nF)

Frequency Change with Volt. V_CC= 12V to 25V

Frequency Change with Temp. T_A= T_lowto T_high

–

0.2

–

0.2

0.5

1.6

–

/ V

∆

OSC

/ T

∆

OSC

V_OSC

I_dischg

Oscillator Voltage Swing

(peak to peak)

1.6

Discharge Current (V_OSC=2V) T_J= 25°C

7.8

7.5

8.3 8.8

8.8

7.8 8.3

7.6

8.8

T_A= T_lowto T_high

–

ERROR AMP SECTION

V₂

I_b

Input Voltage

V_PIN1= 2.5V

V_FB= 5V

2.45 2.50 2.55 2.42 2.50 2.58

Input Bias Current

A_VOL

-0.1

-1

-0.1

-2

0.7

MHz

≤

PSRR

I_o

Unity Gain Bandwidth

Power Supply Rejec. Ratio

Output Sink Current

Output Source Current

T_J= 25°C

12V

-1

25V

≤

V_PIN2= 2.7V V_PIN1= 1.1V

V_PIN2= 2.3V V_PIN1= 5V

I_o

-0.5

_OUTHigh

_OUTLow

CURRENT SENSE SECTION

V_PIN2= 2.3V;

R_L= 15KΩ to Ground

6.2

V_PIN2= 2.7V;

R_L= 15KΩ to Pin 8

0.8 1.1

0.8

1.1

G_V

V₃

Gain

(note 3 & 4)

2.85

0.9

3.15 2.85

3.15 V/V

Maximum Input Signal

Supply Voltage Rejection

Input Bias Current

Delay to Output

V_PIN1= 5V (note 3)

12 ≤ V_i≤ 25V (note 3)

1.1

0.9

1.1

SVR

I_b

-2

µA

-10

150 300

3/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

ELECTRICAL CHARACTERISTICS

(continued)

UC284XB

UC384XB

Symbol

Parameter

Test Conditions

Unit

Min. Typ. Max. Min. Typ. Max.

OUTPUT SECTION

V_OL

Output Low Level

I_SINK= 20mA

_SINK= 200mA

0.1 0.4

1.6 2.2

0.1

1.6

0.4

2.2

V_OH

Output High Level

I_SOURCE= 20mA

13 13.5

12 13.5

0.1 1.1

13 13.5

12 13.5

0.1

I_SOURCE= 200mA

VCC = 6V; I_SINK= 1mA

V_OLS

UVLO Saturation

Rise Time

1.1

150

t_r

t_f

50 150

T = 25 C C_L= 1nF (2)

Fall Time

T_j= 25°C C_L= 1nF (2)

UNDER-VOLTAGE LOCKOUT SECTION

Start Threshold

X842B/4B

X843B/5B

X842B/4B

X843B/5B

7.8

8.4 9.0

10 11

17 14.5 16 17.5

7.8 8.4 9.0

8.5 10 11.5

7.0 7.6

Min Operating Voltage

After Turn-on

7.0

7.6 8.2

8.2

PWM SECTION

Maximum Duty Cycle

X842B/3B

X844B/5B

96 100

100

Minimum Duty Cycle

TOTAL STANDBY CURRENT

I_st

Start-up Current

V_i= 6.5V for UCX843B/45B

V_i= 14V for UCX842B/44B

V_PIN2= V_PIN3= 0V

0.3 0.5

0.3

0.5

I_i

Operating Supply Current

Zener Voltage

V_iz

I_i= 25mA

Notes : 1. Max package power dissipation limitsmust be respected; low duty cyclepulse techniques are used during test maintain T_jas

close to T_ambas possible.

2. These parameters, although guaranteed, are not 100% tested in production.

3. Parameter measured at trip point of latch with V_PIN2= 0.

4. Gain definedas :

∆ V_PIN1

A =

; 0

0.8 V

≤

PIN3

∆ V_PIN3

5. Adjust V_iabove the start threshold before setting at 15 V.

4/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 1: OpenLoopTest Circuit.

V_REF

4.7KΩ

R_T

2N2222

V_i

V_REF

0.1µF

100KΩ

COMP

V_FB

V_i

ERROR AMP.

ADJUST

1KΩ

0.1µF

UC2842B

I_SENSE

R_T/C_T

I_SENSE

4.7KΩ

OUTPUT

GROUND

ADJUST

5KΩ

OUTPUT

GROUND

C_T

D95IN343

Highpeakcurrentsassociatedwithcapacitiveloads

necessitate careful grounding techniques. Timing

and bypass capacitors should be connectedclose

to pin 5 in a singlepoint ground.The transistorand

5KΩ potentiometerareusedtosampletheoscillator

waveformand apply an adjustableramp to pin 3.

Figure 2:

Figure 3:

Timing Resistor vs. Oscillator Fre-

quency

Output Dead-Time vs. Oscillator Fre-

quency

D95IN334

D95IN333

(KΩ)

=2nF

=5nF

=1nF

=10nF

=500pF

=200pF

=2nF

=100pF

C =10nF

=15V

=25°C

0.8

10K

20K

30K

50K

100K

200K 300K

500K

(KHz)

OSC

10K

20K

30K

50K

100K

200K 300K

500K fOSC(KHz)

5/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 4: Oscillator Discharge Current vs. Tem-

Figure 5: Maximum Output Duty Cycle vs. Tim-

perature.

ing Resistor.

D95IN336

D95IN335

dischg

(%)

max

(mA)

=15V

=2V

OSC

=7.5mA

dischg

8.5

8.0

7.5

7.0

=8.8mA

dischg

V =15V

C =3.3nF

T =25°C

0.8

R (KΩ)

-55 -25

75 100 T (°C)

Figure 6: Error Amp Open-Loop Gain and

Figure 7: Current Sense Input Threshold vs. Er-

Phase vs. Frequency.

ror Amp Output Voltage.

D95IN337

D95IN338

(V)

(dB)

=15V

V =15V

V =2V to 4V

T =25°C

1.0

=100K

Gain

T =25°C

0.8

0.6

0.4

0.2

0.0

T =125°C

Phase

120

150

180

T =-40°C

-20

V (V)

100

10K 100K 1M f(Hz)

Figure 8:

Figure 9:

Reference Short Circuit Current vs.

Reference Voltage Change vs.

Source Current.

D95IN339

Temperature.

D95IN340

(mA)

V =15V

R ≤0.1Ω

100

T =-40°C

T =125°C

100 I (mA)

-55 -25

75 100 T (°C)

ref

6/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 10: Output Saturation Voltagevs. Load

Figure 11: Supply Current vs. Supply Voltage.

Current.

(V)

D95IN342

sat

D95IN341

(mA)

Source Saturation

(Load to Ground)

-1

-2

T =25°C

T =-40°C

=15V

80µs Pulsed Load 120Hz Rate

=10K

=3.3nF

T =-40°C

=0V

Sense

T =25°C

Sink Saturation

(Load to V)

GND

V (V)

200

400

600

I (mA)

Figure 12: Output Waveform.

Figure 13: Output Cross Conduction

V_i=30V

C_L= 15pF

T_A= 25°C

V_i=15V

C_L= 1.0nF

T_A= 25°C

90%

V_O

20V/DIV

I_CC

10%

100mA/DIV

50ns/DIV

100ns/DIV

Figure 14:

Oscillator and Output Waveforms.

V_i

5V REG

OUTPUT

PWM

R_T

OUTPUT

LARGE R_T/SMALL C_T

CLOCK

OSCILLATOR

I_D

C_T

OUTPUT

SMALL R_T/LARGE C_T

GND

D95IN344

7/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 15 : ErrorAmp Configuration.

2.5V

1mA

V_FB

Z_i

COMP

Z_f

D95IN345

Figure 16 :

UnderVoltageLockout.

ON/OFF COMMAND

TO REST OF IC

V_i

I_CC

<17mA

<0.5mA

UC3842B UC3843B

UC3844B UC3845B

V_ON

16V

10V

8.4V

7.6V

V_CC

V_OFFV_ON

V_OFF

During UVLO, the Output is low

D95IN346

Figure 17 : Current SenseCircuit .

ERROR

AMPL.

I_S

COMP

CURRENT

SENSE

COMPARATOR

CURRENT

SENSE

R_S

GND

D95IN347

Peak current (i_s) is determinedby the formula

1.0 V

I_{S max}

≈

R_S

A small RC filter may be required to suppressswitch transients.

8/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 18 : SlopeCompensationTechniques.

V_REG

R_T

R_T/C_T

I_S

UC3842B

R_SLOPE

R₁

C_T

I_SENSE

C_T

I_SENSE

R_SLOPE

R₁

R_S

GND

D95IN348

Figure 19 :

IsolatedMOSFET Drive and Current Transformer Sensing.

V_CC

V_in

ISOLATION

BOUNDARY

5.0V

ref

V_GSWaveforms

50% DC

25% DC

_{(pin 1)}-1.4

N_S

I_pk

( )

3R_S

N_P

COMP/LATCH

R_S

N_S

N_P

D95IN349

9/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 20 :

LatchedShutdown.

OSC

BIAS

1mA

3905

3903

D95IN350

SCR must be selected for a holding current of less than 0.5mA at T

A(min)

The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.

Figure 21:

Error Amplifier Compensation

From V_O

R_i

2.5V

1mA

R_dC_f

R_f

Error Amp compensation circuit for stabilizing any current-mode topology except

for boost and flyback converters operating with continuous inductor current.

From V_O

R_P

2.5V

1mA

R_i

C_P

R_d

C_f

R_f

D95IN351

Error Amp compensation circuit for stabilizing current-mode boost and flyback

topologies operating with continuous inductor current.

10/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 22: External Clock Synchronization.

V_REF

BIAS

R_T

C_T

OSC

EXTERNAL

SYNC INPUT

0.01µF

47Ω

D95IN352

The diode clamp is required if the Sync amplitude is large enough to cause

the bottom side of C_Tto go more than 300mV below ground

Figure 23:

External Duty Cycle Clamp and Multi Unit Synchronization.

V_REF

R_A

R_B

BIAS

OSC

NE555

TO ADDITIONAL

UCX84XAs

1.44

(R_A+ 2R_B)C

R_B

R_A+ 2R_B

f =

D_max

D95IN353

11/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Figure 24: Soft-Start Circuit

5V_ref

BIAS

OSC

1mA

1MΩ

D95IN354

Figure 25: Soft-Start and Error Amplifier Output Duty Cycle Clamp.

V_CCV_in

5V_ref

BIAS

OSC

1mA

V_Clamp

Comp/Latch

R_S

BC109

R₁

V_CLAMP

R_S

_CLAMP= ·

where 0 <V_CLAMP<1V

I_pk(max)

D95IN355

R₁+ R₂

12/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

1.75

0.069

0.010

0.065

0.033

0.019

0.010

0.020

0.1

0.25 0.004

1.65

0.65

0.35

0.19

0.25

0.85 0.026

0.48 0.014

0.25 0.007

0.5

0.010

D (1)

45° (typ.)

4.8

5.8

5.0

6.2

0.189

0.228

0.197

0.244

1.27

3.81

0.050

0.150

F (1)

3.8

0.4

4.0

0.15

0.157

0.050

0.024

1.27 0.016

0.6

SO8

8° (max.)

(1) D andF do not include mold flash or protrusions. Mold flash or

potrusions shall not exceed 0.15mm (.006inch).

13/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

3.32

0.131

0.51

1.15

0.020

1.65 0.045

0.55 0.014

0.304 0.008

10.92

0.065

0.022

0.012

0.430

0.384

0.356

0.204

7.95

9.75 0.313

2.54

7.62

0.100

0.300

6.6

0.260

0.200

0.150

0.060

5.08

3.18

3.81 0.125

1.52

Minidip

14/15

UC2842B/3B/4B/5B - UC3842B/3B/4B/5B

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-

quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No

license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this

publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-

croelectronics products are not authorized for use as critical components in life support devices or systems without express written

approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

STMicroelectronics GROUP OF COMPANIES

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15/15

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UC3843BD1产品参数

型号:	UC3843BD1
生命周期：	Transferred
零件包装代码：	SOIC
包装说明：	SOP, SOP8,.25
针数：	8
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.07
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	30 V
最小输入电压：	8.2 V
标称输入电压：	15 V
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0
长度：	4.9 mm
功能数量：	1
端子数量：	8
最高工作温度：	70 °C
最低工作温度：
最大输出电流：	1 A
标称输出电压：	2.5 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
认证状态：	Not Qualified
座面最大高度：	1.75 mm
子类别：	Switching Regulator or Controllers
最大供电电流 (Isup)：	17 mA
表面贴装：	YES
切换器配置：	SINGLE
最大切换频率：	500 kHz
技术：	BIPOLAR
温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
宽度：	3.9 mm
Base Number Matches：	1

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