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  • UC3879N图
  • 深圳市宏捷佳电子科技有限公司

     该会员已使用本站12年以上
  • UC3879N 现货库存
  • 数量60030 
  • 厂家TI/德州仪器 
  • 封装DIP20 
  • 批号2023+ 
  • 专营原装正品量大可定货
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  • 上海磐岳电子有限公司

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  • 数量9000 
  • 厂家TI/BB 
  • 封装 
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  • 深圳市欧立现代科技有限公司

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  • UC3879N
  • 数量1800 
  • 厂家TI 
  • 封装DIP 
  • 批号24+ 
  • ★★专业IC现货,诚信经营,市场最优价★★
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  • 北京耐芯威科技有限公司

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  • UC3879N
  • 数量4000 
  • 厂家U (unitrod) 
  • 封装DIP-20 
  • 批号21+ 
  • 原装正品,公司现货
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  • 深圳市得捷芯城科技有限公司

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  • UC3879N
  • 数量3400 
  • 厂家TI/德州仪器 
  • 封装NA/ 
  • 批号23+ 
  • 原装现货,当天可交货,原型号开票
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  • 集好芯城

     该会员已使用本站13年以上
  • UC3879N
  • 数量19807 
  • 厂家TI/德州仪器 
  • 封装DIP20 
  • 批号最新批次 
  • 原装原厂 现货现卖
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  • UC3879N图
  • 深圳市羿芯诚电子有限公司

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  • UC3879N
  • 数量8800 
  • 厂家TI/德州仪器 
  • 封装DIP20 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
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  • 深圳市华科泰电子商行

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  • UC3879N
  • 数量9868 
  • 厂家TI 
  • 封装DIP 
  • 批号 
  • 绝对原装现货特价
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  • 深圳市拓亿芯电子有限公司

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  • UC3879N
  • 数量30000 
  • 厂家TI/德州仪器 
  • 封装DIP-20 
  • 批号23+ 
  • 只做原装现货假一罚十
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  • UC3879N
  • 数量5000 
  • 厂家UNITRODE 
  • 封装DIP 
  • 批号2017+ 
  • 优势库存现货,部分无铅
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  • 深圳市华斯顿电子科技有限公司

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  • UC3879N
  • 数量34923 
  • 厂家TI 
  • 封装DIP 
  • 批号2023+ 
  • 绝对原装正品现货,全新深圳原装进口现货
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  • UC3879N
  • 数量12500 
  • 厂家TI/德州仪器 
  • 封装PDIP-20 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
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  • UC3879N
  • 数量13500 
  • 厂家TI/德州仪器 
  • 封装PDIP-20 
  • 批号24+ 
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  • 北京齐天芯科技有限公司

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  • UC3879NG4
  • 数量5600 
  • 厂家Texas Instruments 
  • 封装20-DIP(0.300",7.62mm) 
  • 批号2024+ 
  • 原装正品,假一罚十
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  • 深圳市晶美隆科技有限公司

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  • UC3879N
  • 数量18530 
  • 厂家TI 
  • 封装DIP 
  • 批号23+ 
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  • 深圳市正信鑫科技有限公司

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  • UC3879N
  • 数量3659 
  • 厂家TI 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
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  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • UC3879N
  • 数量5000 
  • 厂家UC 
  • 封装DIP20 
  • 批号16+ 
  • 百分百原装正品,现货库存
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  • 北京元坤伟业科技有限公司

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  • UC3879N
  • 数量5000 
  • 厂家UC 
  • 封装DIP20 
  • 批号2024+ 
  • 百分百原装正品,现货库存
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  • 深圳市芯鹏泰科技有限公司

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  • UC3879N
  • 数量7536 
  • 厂家Texas Instruments 
  • 封装20-PDIP 
  • 批号23+ 
  • 开关式控制器原装现货
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  • 深圳市惊羽科技有限公司

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  • UC3879N
  • 数量2368 
  • 厂家TI-德州仪器 
  • 封装DIP-20 
  • 批号▉▉:2年内 
  • ▉▉¥78.8元一有问必回一有长期订货一备货HK仓库
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  • UC3879N
  • 数量11530 
  • 厂家Texas Instruments 
  • 封装20-DIP (300 mil) 
  • 批号23+ 
  • 全新原装现货热卖
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  • 上海熠富电子科技有限公司

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  • UC3879N
  • 数量8000 
  • 厂家 
  • 封装N/A 
  • 批号2024 
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  • 深圳市硅诺电子科技有限公司

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  • UC3879N
  • 数量6800 
  • 厂家TI 
  • 封装DIP 
  • 批号17+ 
  • 原厂指定分销商,有意请来电或QQ洽谈
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  • UC3879N
  • 数量5660 
  • 厂家BURR-BROWN 
  • 封装SMD 
  • 批号21+ 
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  • 数量150 
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  • 封装DIP20 
  • 批号21+ 
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  • 数量660000 
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  • 数量21688 
  • 厂家TI 
  • 封装PDIP-20 
  • 批号2020+ 
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产品型号UC3879N的概述

UC3879N 芯片概述与应用研究 1. 引言 随着电子技术的快速发展,各类芯片在自动化控制、能源管理和电力转换等领域的应用日益广泛。UC3879N是一款被广泛应用于电源转换、反激式变换器和其他电源管理系统的集成电路。本文将详细探讨UC3879N芯片的参数、规格、引脚信息、应用案例及其电路设计的相关内容。 2. UC3879N 概述 UC3879N芯片由德州仪器(Texas Instruments, TI)公司制造,属于PWM(脉宽调制)控制器系列。该芯片设计用于高效率的DC-DC转换,能够在各种负载条件下提供稳定的输出电压,常用于燃料电池、太阳能系统及其它工业电源解决方案。UC3879N的主要特点是其宽范围输入电压、低启动电流和高效率特性,使其非常适合于电源转换的应用。 3. 详细参数 UC3879N的主要技术参数如下: - 输入电压范围: 8V 至 40V - 输出电流: 最大...

产品型号UC3879N的Datasheet PDF文件预览

UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
PHASE SHIFT RESONANT CONTROLLER  
FEATURES  
DESCRIPTION  
Programmable Output Turn On Delay; Zero  
Delay Available  
The UC3879 controls a bridge power stage by phase  
shifting the switching of one half-bridge with respect  
to the other. This allows constant frequency pulse  
width modulation in combination with resonant,  
Compatible with Voltage Mode or Current  
Mode Topologies  
zero-voltage  
switching  
for  
high  
efficiency  
Practical Operation at Switching Frequencies  
to 300 kHz  
performance. The UC3879 can be configured to  
provide control in either voltage mode or current  
mode operation, with overcurrent shutdown for fast  
fault protection.  
10-MHz Error Amplifier  
Pin Programmable Undervoltage Lockout  
Low Startup Current – 150 µA  
Soft Start Control  
Independently programmable time delays provide  
dead-time at the turn-on of each output stage,  
allowing time for each resonant switching interval.  
Outputs Active Low During UVLO  
BLOCK DIAGRAM  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
DESCRIPTION (CONTINUED)  
With the oscillator capable of operating in excess of 600 kHz, overall output switching frequencies to 300 kHz  
are practical. In addition to the standard free running mode, with the CLKSYNC pin, the user may configure the  
UC3879 to accept an external clock synchronization signal. Alternatively, up to three units can be locked  
together with the operational frequency determined by the fastest device.  
Protective features include an undervoltage lockout and overcurrent protection. Additional features include a  
10-MHz error amplifier, a 5-V precision reference, and soft start. The UC3879 is available in 20 pin N, J, DW,  
and Q and 28 pin L packages.  
ABSOLUTE MAXIMUM RATINGS(1)  
PARAMETER  
VALUE  
20  
UNIT  
Supply voltage (VC, VIN)  
V
Output current, source or sink, dc  
20  
mA  
V
Output current, source, sink peak for 0.1 µs at max frequency of 300  
kHz  
100  
Analog inputs  
(Pins 1, 2, 3, 4, 5, 6, 14, 15, 17, 18, 19)  
(Pin 16)  
–0.3 to 5.3  
–0.03 to VIN  
Analog outputs  
(Pins 7, 8, 12, 13)  
–0.3 to VC to 0.3  
V
Storage temperature range  
Junction temperature  
Lead temperature (soldering, 10 sec)  
–65°C to 150°C  
–55°C to 150°C  
300°C  
°C  
(1) Pin references are to 20-pin DIL and SOIC packages. All voltages are with respect to ground unless otherwise stated. Currents are  
positive into, negative out of the specified terminal.  
THERMAL CHARACTERISTICS  
over operating free-air temperature range (unless otherwise noted)  
PACKAGE  
J-20  
θJA  
70-85  
80(2)  
θJC  
28(1)  
35  
N-20  
DW-20 SOIC  
PLCC-20  
CLCC-20  
45-95(2)  
43-75(2)  
N/A  
25  
34  
5-8(2)(3)  
(1) θJC data values stated were derived from MIL-STD-1835B. MIL-STD-1835B states "The baseline values shown are worst case (mean  
+2s) for a 60 x 60 mil microcircuit device silicon die and aplicable for devices with die sizes up to 14400 square mils. For devices die  
sizes greater than 14400 square mils use the following values; dual-in-line, 11°C/W; flat pacl 10°C/W; pin grid array, 10°C/W".  
(2) Specified θJA (junction-to-ambient) is for devices mounted to 5-in2 FR4 PC board with one ounce copper wire where noted. When  
resistance range is given, lower values are for 5-in2 aluminum PC board. Test PWB was 0.062 in thick and typically used 0.635-mm  
trace widths for power packages and 1.3-mm trace widths for non-power packages with a 100 x 100 mil probe land area at the end of  
each trace.  
(3) θJC estimated for backside of device, through the metalized thermal conduction pads.  
2
Submit Documentation Feedback  
UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
Product Selection Guide  
TEMPERATURE RANGE  
–55°C to 125°C  
–40°C to 85°C  
AVAILABLE PACKAGES  
J, L  
UCC1879  
UCC2879  
UCC3879  
N, DW, Q, J, L  
N, DW, Q  
0°C to 70°C  
DIL-20, SOIC-2  
J OR N PACKAGE, DW PACKAGE  
(TOP VIEW)  
CLCC-28  
L PACKAGE  
(TOP VIEW)  
DELSETA-B  
CT  
VREF  
COMP  
EA–  
20 GND  
1
2
3
4
5
6
7
8
9
UVSEL  
CLKSYNC  
N/C  
19 RAMP  
18 RT  
N/C  
N/C  
CS  
17 CLKSYNC  
16 UVSEL  
15 DELSETA-B  
14 CT  
6
7
8
9
10 11  
OUTC  
OUTB  
PWRGND  
VIN  
4
3
2
RT  
DELSETC-D  
SS  
RAMP  
GND  
N/C  
13  
14  
15  
16  
17  
18  
1
OUTD  
OUTC  
VC  
VC  
28  
27  
N/C  
13 OUTA  
OUTC  
OUTD  
VREF  
COMP  
25 24 23 22 21 20  
12 OUTB  
11 PWRGND  
VIN 10  
N/C  
N/C  
SS  
EA–  
CS  
PLCC-20  
Q PACKAGE  
(TOP VIEW)  
N/C  
DELSETC-D  
DELSETC-D  
SS  
CS  
OUTD  
EA–  
3
2
1
20 19  
18  
OUTC  
VC  
4
5
6
7
8
COMP  
VREF  
GND  
RAMP  
RT  
17  
16  
15  
14  
VIN  
PWRGND  
OUTB  
9
10 11 12 13  
OUTA  
CT  
CLKSYNC  
UVSEL  
DELSETA-B  
3
Submit Documentation Feedback  
UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
ELECTRICAL CHARACTERISTICS  
Unless specified; VC = VIN = VUVSEL = 12 V, CT = 470 pF, RT = 9.53k, RDELSETA-B = RDELSEC-D = 4.8k, CDELSETA-B = CDELSETC-D  
= 0.01 µF, TA = TJ.  
PARAMETER  
Undervoltage Lockout  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VUVSEL = VIN  
9
12.5  
1.15  
5.2  
10.75  
15.25  
1.75  
6
12.5  
16.5  
2.15  
7.4  
Start threshold  
VUVSEL = Open  
VUVSEL = VIN  
V
UVLO hysteresis  
VUVSEL = Open  
VUVSEL= VIN = 8 V  
Input bias, UVSEL pin  
30  
µA  
Supply Current  
VIN = VUVSEL = 8 V, VC = 18 V,  
IDELSETA-B = IDELSETC-D = 0  
IVIN startup  
IVC startup  
150  
10  
600  
100  
µA  
VIN = VUVSEL = 8 V, VC = 18 V,  
IDELSETA-B = IDELSETC-D = 0  
UC3879, UC2879  
UC1879  
23  
23  
4
35  
36  
8
IVIN operating  
mA  
IVC operating  
Voltage Reference  
Output voltage  
TJ = 25°C  
4.92  
4.875  
2.4  
5
1
5
5.08  
10  
V
Line regulation  
Load regulation  
Total variation  
11 V < VIN < 18 V  
IVREF = –10 mA  
mV  
20  
Line, Load, Temperature  
VREF = 0 V, TJ = 25°C  
5.125  
–15  
V
Short circuit current  
Error Amplifier  
Error amplifier input voltage  
Input bias current  
AVOL  
–60  
mA  
2.5  
0.6  
90  
2.6  
3
V
µA  
1 V < VCOMP < 4 V  
11 V < VIN < 18 V  
VCOMP = 1 V  
60  
85  
1
dB  
PSRR  
100  
2.5  
–1.3  
4.7  
0.5  
11  
Output sink current  
Output source current  
Output voltage high  
Output voltage low  
Slew rate  
mA  
VCOMP = 4 V  
–0.5  
5
ICOMP = –0.5 mA  
ICOMP = 1 mA  
TA = 25°C  
4
0
6
V
1
V/µs  
4
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UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
ELECTRICAL CHARACTERISTICS (continued)  
Unless specified; VC = VIN = VUVSEL = 12 V, CT = 470 pF, RT = 9.53k, RDELSETA-B = RDELSEC-D = 4.8k, CDELSETA-B = CDELSETC-D  
= 0.01 µF, TA = TJ.  
PARAMETER  
PWM Comparator  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
RAMP offset voltage  
TJ = 25°C(1)  
1.1  
98%  
0%  
1.25  
99.7%  
0.3%  
10  
1.4  
102%  
2%  
V
VCOMP> VRAMPpeak+ VRAMPoffset  
VCOMP < Zero Phase Shift Voltage  
VCOMP> VRAMPpeak + VRAMPoffset  
VCOMP < Zero Phase Shift Voltage  
UC3879, UC2879  
PWM phase shift,  
TDELSETA-B, TDELSETC-D = 0(2)  
Output skew,  
TDELSETA-B, TDELSETC-D = 0(2)  
10  
ns  
115  
250  
300  
Ramp to output delay,  
TDELSETA-B = 0, TDELSETC-D = 0  
UC1879  
115  
Oscillator  
Initial accuracy  
Voltage stability  
TA = 25°C  
180  
200  
1
220  
2
kHz  
%
11 V < VIN < 18 V  
Line, Temperature  
Total variation  
160  
2.3  
2.8  
0.5  
200  
2.5  
4
240  
2.7  
kHz  
CLKSYNC threshold  
Clock out high  
V
Clock out low  
1
1.5  
600  
0.4  
3.2  
Clock out pulse width  
Ramp valley voltage  
Ramp peak voltage  
Current Limit  
400  
0.2  
2.9  
ns  
V
2.8  
Input bias  
VCS = 3 V  
2
2.5  
10  
2.65  
300  
µA  
V
Threshold voltage  
Delay to OUTA, B, C, D  
Cycle-by-Cycle Current Limit  
Input bias  
2.35  
160  
ns  
VCS = 2.2 V  
2
2
10  
2.15  
300  
µA  
V
Threshold voltage  
Delay to output zero phase  
1.85  
110  
ns  
(1) Ramp offset voltage has a temperature coefficient of about –4 mV/°C.  
200  
q =  
f%  
T
(2) Phase shift percentage (0% = 0 , 100% = 180 ) is defined as  
where is the phase shift, and and T are defined in Figure 1. At 0% phase shift, is the output skew.  
5
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UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
ELECTRICAL CHARACTERISTICS (continued)  
Unless specified; VC = VIN = VUVSEL = 12 V, CT = 470 pF, RT = 9.53k, RDELSETA-B = RDELSEC-D = 4.8k, CDELSETA-B = CDELSETC-D  
= 0.01 µF, TA = TJ.  
PARAMETER  
Soft Start/Reset Delay  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Charge current  
Discharge current  
Restart threshold  
Discharge level  
Output Drivers  
Output Low level  
Output High level  
VSS = 0.5 V  
VSS = 1 V  
–20  
120  
4.3  
–9  
230  
4.7  
–3  
µA  
V
300  
mV  
IOUT = 10 mA  
0.3  
2.2  
0.4  
3
V
IOUT = –10 mA, Referenced to VC  
(3)  
Delay Set  
Delay time(4)  
Delay time(4)  
Zero delay(5)  
RDELSETA-B = RDELSETC-D = 4.8k  
RDELSETA-B = RDELSETC-D = 1.9k  
VDELSETA-B = VDELSETC-D = 5 V  
250  
100  
370  
155  
5
520  
220  
ns  
(3) Delay time can be programmed via resistors from the delay set pins to ground.  
-10  
Delay Time = 0.89 ·10  
(
·R sec  
DELAY  
)
The recommended range for RDELAY is 1.9 kto 10 k.  
(4) Delay time is defined as:  
æ 1  
ç
ö
÷
ø
delay = T ·  
- duty cycle  
2
è
where T is defined in Figure 1.  
(5) The zero phase shift voltage is the voltage measured at COMP which forces zero phase shift. This condition corresponds to zero  
effective output power. Zero phase shift voltage has a temperature coefficient of about –2 mV/°C.  
t
DutyCycle =  
T
Period = T  
T
(Ato C) = T (BtoD) =  
DHL  
DHL  
Figure 1. Phase Shift, Output Skew and Delay Time Definitions  
6
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UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
PIN DESCRIPTIONS  
CLKSYNC (Bi-directional Clock and Synchronization): Used as an output, CLKSYNC provides a clock signal. As  
an input, this pin provides a synchronization point. Multiple UC3879s, each with their own local oscillator  
frequency, may be connected together by the CLKSYNC pin, and they will synchronize to the fastest oscillator.  
This pin may also be used to synchronize the UC3879 to an external clock, provided the frequency of the  
external signal is higher than the frequency of the local oscillator. CLKSYNC is internally connected to an emitter  
follower pull-up and a current source pull-down (300 µA typical). Therefore, an external resistor to GND can be  
used to improve the CLKSYNC pin’s ability to drive capacitive loads.  
COMP (Error Amplifier Output): This pin is the output of the gain stage for overall feedback control. Error  
amplifier output voltage levels below 0.9 V forces zero phase shift. Since the error amplifier has a relatively low  
current drive capability, the output may be overridden by driving it with a sufficiently low impedance source.  
CT (Oscillator Frequency Set): After choosing RT to set the required upper end of the linear duty cycle range,  
the timing capacitor (CT) value is calculated to set the oscillator frequency as follows:  
Dlin  
CT =  
1.08 ·RT · f  
Connect the timing capacitor directly between CT and GND. Use a high quality ceramic capacitor with low ESL  
and ESR for best results. A minimum CT value of 200 pF insures good accuracy and less susceptibility to circuit  
layout parasitics. The oscillator and PWM are designed to provide practical operation to 600 kHz.  
CS (Current Sense): This pin is the non-inverting input to the two current fault comparators whose references  
are set internally to fixed values of 2 V and 2.5 V. When the voltage at this pin exceeds 2 V, and the error  
amplifier output voltage exceeds the voltage on the ramp input, the phase shift limiting overcurrent comparator  
will limit the phase shifting on a cycle-by-cycle basis. When the voltage at this pin exceeds 2.5 V, the current  
fault latch is set, the outputs are forced OFF, and a soft start cycle is initiated. If a constant voltage above 2.5 V  
is applied to this pin the outputs are disabled and held low. When CS is brought below 2.5 V, the outputs will  
begin switching at 0 degrees phase shift before the SS pin begins to rise. This condition will not prematurely  
deliver power to the load.  
DELSETA-B, DELSETC-D (Output Delay Control): The user programmed currents from these pins to GND set  
the turn on delay for the corresponding output pair. This delay is introduced between the turn off of one switch  
and the turn on of another in the same leg of the bridge to allow resonant switching to take place. Separate  
delays are provided for the two half-bridges to accommodate differences in the resonant capacitor charging  
currents.  
EA– (Error Amplifier Inverting Input): This is normally connected to the voltage divider resistors which sense the  
power supply output voltage level. The loop compensation components are connected between this pin and  
COMP.  
GND (Signal Ground): All voltages are measured with respect to GND. The timing capacitor on CT, and bypass  
capacitors on VREF and VIN should be connected directly to the ground plane near GND.  
OUTA – OUTD (Outputs A-D): The outputs are 100-mA totem pole output drivers optimized to drive FET driver  
devices. The outputs operate as pairs with a nominal 50% duty cycle. The A-B pair is intended to drive one  
half-bridge in the external power stage and is synchronized to the clock waveform. The C-D pair drives the other  
half-bridge with switching phase shifted with respect to the A-B outputs.  
PWRGND (Power Ground): VC should be bypassed with a ceramic capacitor from VC to the section of the  
ground plane that is connected to PWRGND. Any required bulk reservoir capacitor should be connected in  
parallel. PWRGND and GND should be connected at a single point near the chip to optimize noise rejection and  
minimize DC voltage drops.  
RAMP (Voltage Ramp): This pin is the input to the PWM comparator. Connect it to CT for voltage mode control.  
For current mode control, connect RAMP to CS and also to the output of the current sense transformer circuit.  
Slope compensation can be achieved by injecting a portion of the ramp voltage from CT to RAMP.  
7
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UC1879  
UC2879  
UC3879  
www.ti.com  
SLUS230BJUNE 1998REVISED JUNE 2007  
PIN DESCRIPTIONS (continued)  
RT (Clock/Sync Duty Cycle Set Pin): The UC3879 oscillator produces a sawtooth waveform. The rising edge is  
generated by connecting a resistor from RT to GND and a capacitor from CT to GND (see CT pin description).  
During the rising edge, the modulator has linear control of the duty cycle. The duty cycle jumps to 100% when  
the voltage on COMP exceeds the oscillator peak voltage. Selection of RT should be done first, based on the  
required upper end of the linear duty cycle range (Dlin) as follows:  
2.5  
RT =  
10mA · 1- Dlin  
(
)
Recommended values for RT range from 2.5 kto 100 k.  
SS: Connect a capacitor between this pin and GND to set the soft start time. The voltage at SS will remain near  
zero volts as long as VIN is below the UVLO threshold. Soft start will be pulled up to about 4.8 V by an internal  
9-µA current source when VIN and VREF become valid (assuming a non-fault condition). In the event of a  
current fault (CS voltage exceeding 2.5 V), soft start will be pulled to GND and then ramp to 4.8 V. If a fault  
occurs during the soft start cycle, the outputs will be immediately disabled and soft start must fully charge prior  
to resetting the fault latch. For paralleled controllers, the soft start pins may be paralleled to a single capacitor,  
but the charge currents will be additive.  
UVSEL: Connecting this pin to VIN sets a turn on voltage of 10.75 V with 1.5 V of UVLO hysteresis. Leaving the  
pin open-circuited programs a turn on voltage of 15.25 V with 6 V of hysteresis.  
VC (Output Switch Supply Voltage): This pin supplies power to the output drivers and their associated bias  
circuitry. The difference between the output high drive and VC is typically 2.1 V. This supply should be bypassed  
directly to PWRGND with a low ESR/ESL capacitor.  
VIN (Primary Chip Supply Voltage): This pin supplies power to the logic and analog circuitry on the integrated  
circuit that is not directly associated with driving the output stages. Connect VIN to a stable source above 12 V  
for normal operation. To ensure proper functionality, the UC3879 is inactive until VIN exceeds the upper  
undervoltage lockout threshold. This pin should be bypassed directly to GND with a low ESR/ESL capacitor.  
NOTE:  
When VIN exceeds the UVLO threshold the supply current (IIN) jumps from about 100  
A to greater than 20 mA. If the UC3879 is not connected to a well bypassed supply, it  
may immediately enter the UVLO state again. Therefore, sufficient bypass capacity  
must be added to ensure reliable startup.  
VREF: This pin provides an accurate 5 V voltage reference. It is internally short circuit current limited. VREF is  
disabled while VIN is below the UVLO threshold. The circuit is also disabled until VREF reaches approximately  
4.75 V. For best results bypass VREF with a 0.1 µF, low ESR/ESL capacitor.  
ADDITIONAL INFORMATION  
Please refer to the following Unitrode publications for additional information. The following three topics are  
available in the Applications Handbook.  
1. Application Note U-154, The New UC3879 Phase- Shifted PWM Controller Simplifies the Design of Zero  
Voltage Transition Full-Bridge Converters, by Laszlo Balogh.  
2. Application Note U-136, Phase Shifted, Zero Voltage Transition Design Considerations and the UC3875  
PWM Controller, by Bill Andreycak.  
3. Design Note DN-63, The Current-Doubler Rectifier: An Alternative Rectification Technique for Push-Pull  
and Bridge Converters, by Laszlo Balogh.  
8
Submit Documentation Feedback  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
UC1879J  
UC1879J883B  
UC2879DW  
OBSOLETE  
OBSOLETE  
ACTIVE  
CDIP  
CDIP  
SOIC  
J
J
20  
20  
20  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
-55 to 125  
-55 to 125  
-40 to 85  
DW  
25  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-2-260C-1 YEAR  
UC2879DW  
UC2879DWG4  
UC2879DWTR  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
DW  
DW  
DW  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 85  
-40 to 85  
-40 to 85  
UC2879DW  
UC2879DW  
UC2879DW  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
UC2879DWTRG4  
Green (RoHS  
& no Sb/Br)  
UC2879J  
UC2879N  
OBSOLETE  
ACTIVE  
CDIP  
PDIP  
J
20  
20  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
N
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
N / A for Pkg Type  
UC2879N  
UC2879NG4  
UC3879DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
N
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
N / A for Pkg Type  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 85  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
UC2879N  
DW  
DW  
DW  
DW  
25  
Green (RoHS  
& no Sb/Br)  
UC3879DW  
UC3879DW  
UC3879DW  
UC3879DW  
UC3879DWG4  
UC3879DWTR  
UC3879DWTRG4  
25  
Green (RoHS  
& no Sb/Br)  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
UC3879J  
UC3879N  
OBSOLETE  
ACTIVE  
CDIP  
PDIP  
J
20  
20  
TBD  
Call TI  
Call TI  
0 to 70  
0 to 70  
N
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
N / A for Pkg Type  
UC3879N  
UC3879N  
UC3879NG4  
ACTIVE  
PDIP  
N
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
N / A for Pkg Type  
0 to 70  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF UC1879, UC3879 :  
Catalog: UC3879  
Military: UC1879  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Military - QML certified for Military and Defense Applications  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
UC2879DWTR  
UC3879DWTR  
SOIC  
SOIC  
DW  
DW  
20  
20  
2000  
2000  
330.0  
330.0  
24.4  
24.4  
10.8  
10.8  
13.3  
13.3  
2.7  
2.7  
12.0  
12.0  
24.0  
24.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
UC2879DWTR  
UC3879DWTR  
SOIC  
SOIC  
DW  
DW  
20  
20  
2000  
2000  
367.0  
367.0  
367.0  
367.0  
45.0  
45.0  
Pack Materials-Page 2  
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配单直通车
UC3879N产品参数
型号:UC3879N
Brand Name:Texas Instruments
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:TEXAS INSTRUMENTS INC
零件包装代码:DIP
包装说明:DIP-20
针数:20
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
Factory Lead Time:1 week
风险等级:0.79
Samacsys Confidence:
Samacsys Status:Released
Samacsys PartID:182989
Samacsys Pin Count:20
Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Other
Samacsys Footprint Name:DIP254P762X508-20
Samacsys Released Date:2017-01-12 12:59:53
Is Samacsys:N
其他特性:ALSO HAS CONTROL MODE OF IPK, ALSO HAS CONTROL TECHNIQUE OF RESONANT
模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION
最大输入电压:18 V
最小输入电压:11 V
标称输入电压:12 V
JESD-30 代码:R-PDIP-T20
JESD-609代码:e4
长度:25.4 mm
功能数量:1
端子数量:20
最高工作温度:70 °C
最低工作温度:
最大输出电流:0.1 A
最大输出电压:5.08 V
最小输出电压:4.92 V
标称输出电压:5 V
封装主体材料:PLASTIC/EPOXY
封装代码:DIP
封装等效代码:DIP20,.3
封装形状:RECTANGULAR
封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE
认证状态:Not Qualified
座面最大高度:5.08 mm
子类别:Switching Regulator or Controllers
表面贴装:NO
切换器配置:PHASE-SHIFT
最大切换频率:240 kHz
技术:BIPOLAR
温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE
端子节距:2.54 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mm
Base Number Matches:1
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