UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
ELECTRICAL CHARACTERISTICS:Unless otherwise stated these specifications apply for TA = –55°C to +125°C for
UCC1807-1/-2/-3; –40°C to +85°C for UCC2807-1/-2/-3; and 0°C to +70°C for UCC3807-1/-2/-3; VDD = 10V (Note 6), RA = 12kW,
RB = 4.7kW, CT = 330pF, 1.0mF capacitor from VDD to GND, TA = TJ.
PARAMETER
Start Threshold
TEST CONDITIONS
UCCx807-1 (Note 4)
MIN
6.6
11.5
4.1
6.3
7.6
3.9
0.1
3.5
0.1
TYP
7.2
12.5
4.3
6.9
8.3
4.1
0.3
4.2
0.2
MAX UNITS
7.8
13.5
4.5
7.5
9.0
4.3
0.5
5.1
0.3
V
V
V
V
V
V
V
V
V
UCCx807-2
UCCx807-3
UCCx807-1 (Note 4)
UCCx807-2
UCCx807-3
UCCx807-1
UCCx807-2
UCCx807-3
Minimum Operating Voltage After Start
Hysteresis
Soft Start Section
COMP Rise Time
Overall Section
Startup Current
FB = 1.8V, From 0.5V to 4.0V
4
ms
VDD < Start Threshold (UCCx807-1,-3)
VDD < Start Threshold (UCCx807-2)
FB = 0V, CS = 0V, No Load (Note 7)
0.1
0.15
1.3
0.2
0.25
2.1
mA
mA
mA
V
Operating Supply Current
VDD Zener Shunt Voltage
Shunt to Start Difference
I
DD = 10mA
12.0
0.5
13.5
1.0
15.0
V
Note 1: Measured at TRIG; signal minimum = 1/3 VDD, maximum = 2/3 VDD.
V
Note 2: Gain is defined by: A
COMP , 0 VCS 0.8V
V
CS
Note 3: Parameter measured at trip point of latch with FB at 0V.
Note 4: Start Threshold and Zener Shunt thresholds track one another.
Note 5: Ensured by design. Not 100% tested in production.
Note 6: Adjust VDD above the start threshold before setting at 10V for UCC3807-2.
Note 7: Does not include current in external timing RC network.
PIN DESCRIPTIONS
COMP: COMP is the output of the error amplifier and the affected by the leading edge blanking and the CS to
input of the PWM comparator. The error amplifier in the OUT propagation delay.
UCC3807 is a low output impedance, 2MHz operational
The overcurrent comparator is only intended for fault
amplifier. COMP can both source and sink current. The
sensing. Exceeding the overcurrent threshold causes a
error amplifier is internally current limited, which allows
soft start cycle.
zero duty cycle by externally forcing COMP to GND.
FB: The inverting input to the error amplifier. For best
The UCC3807 family features built-in full cycle soft start.
stability, keep connections to FB as short as possible and
Soft start is implemented as a clamp on the maximum
stray capacitance as small as possible.
COMP voltage.
GND: Reference ground and power ground for all func-
tions of the part.
CS: Current sense input. There are two current sense
comparators on the chip, the PWM comparator and an
OUT: The output of a high current power driver capable
of driving the gate of a power MOSFET with peak cur-
rents exceeding 1A. OUT is actively held low when VDD
is below the UVLO threshold.
overcurrent comparator.
The UCC3807 also contains a leading edge blanking cir-
cuit, which disconnects the external CS signal from the
current sense comparator during the 100ns interval im-
mediately following the rising edge of the signal at the
OUT pin. In most applications, no analog filtering is re-
quired on CS. Compared to an external RC filtering tech-
nique, leading edge blanking provides a smaller effective
CS to OUT propagation delay. Note, however, that the
minimum non-zero on-time of the OUT signal is directly
The high current power driver consists of MOSFET out-
put devices in a totem pole configuration. This allows the
output to switch from VDD to GND. The output stage
also provides a very low impedance which minimizes
overshoot and undershoot. In most cases, external
Schottky clamp diodes are not required.
3