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产品型号UCC28880DR的概述

UCC28880DR 芯片概述 UCC28880DR 是 Texas Instruments(德州仪器)推出的一款高性能、适用于高效电源转换的集成电路。它是一种专门设计的低功耗离线开关电源控制器,广泛应用于多种领域,如LED驱动、消费电子产品和工业设备等。UCC28880DR 使用电流模式控制,具有出色的负载瞬态响应能力以及稳定的输出电压调节,能够满足客户在电源设计上的多种需求。 该芯片的核心特性包括开关频率的可调性、内部电压参考、高效率、低待机功耗等。借助于其内置的高压功率MOSFET,UCC28880DR 能够直接与市电连接,同时简化了系统设计,提高了系统的可靠性。此外,它的输入电压范围广,能够支持从广泛的交流电源(如110V到265V的AC电压)变换,降低了异质电源环境下的设计复杂性。 UCC28880DR 详细参数 UCC28880DR 的主要技术参数如下: - 工作输入电压范...

产品型号UCC28881的Datasheet PDF文件预览

Sample &  
Buy  
Support &  
Community  
Reference  
Design  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
UCC28881  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
UCC28881 700V225mA 低静态电流离线转换器  
1 特性  
3 说明  
1
集成 14Ω700V 功率金属氧化物半导体场效应晶  
UCC28881 在单片器件中集成了控制器和 14Ω700V  
体管 (MOSFET)  
功率 MOSFET。该器件还集成了高电压电流源,能够  
在经整流的市电电压下直接启动和运行。UCC28881  
UCC28880 属于同一器件系列,具备高电流处理能  
力。  
集成高电压电流源,用于内置器件偏置电源  
集成电流感测  
内部软启动  
自偏置开关(直接在经整流的市电电压下启动和运  
行)  
该器件的静态电流较低,能够提供出色的效率。凭借  
UCC28881,使用最少的外部组件即可构建降压、降压  
/升压以及反激拓扑等最常用的转换器拓扑。  
支持降压、降压/升压和反激拓扑结构  
器件静态电流 <100μA  
在负载电路短路期间提供稳定的电流保护  
保护  
UCC28881 集成了控制功率级启动的软启动功能,能  
够最大程度地减小功率级组件所受的压力。  
电流限制保护  
过载和输出短路保护  
过热保护  
器件信息(1)  
部件号  
UCC28881  
封装  
SOIC (7)  
封装尺寸(标称值)  
5.00mm x 6.20mm  
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。  
2 应用  
AC-DC 电源  
(非隔离式降压转换器,其在连续导通模式 (CCM)  
和断续导通模式 (DCM) 下的  
输出电流分别高达 225mA 150mA)  
电表、家庭自动化开关模式电源 (SMPS)  
支持微控制器 (MCU)、射频 (RF) 和物联网 (IoT)  
的设备的偏置电源  
家用电器、大型家用电器和发光二极管 (LED) 驱动  
40  
35  
30  
25  
20  
15  
10  
5
简化电路原理图  
UCC28881  
1
2
3
4
GND DRAIN  
8
GND  
FB  
NC  
6
5
VIN  
VDD  
HVIN  
+
VOUT  
-
2.7-W Low-Side Buck Standby Power  
0
UCC28881 Power Consumption  
-5  
50  
100  
150  
200  
250  
300  
AC Input Voltage (VRMS  
)
D001  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLUSC36  
 
 
 
UCC28881  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
www.ti.com.cn  
目录  
8.3 Feature Description................................................. 10  
8.4 Device Functional Modes........................................ 12  
Application and Implementation ........................ 16  
9.1 Application Information............................................ 16  
9.2 Typical Application .................................................. 16  
1
2
3
4
5
6
7
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Device Comparison ............................................... 3  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
7.1 Absolute Maximum Ratings ...................................... 4  
7.2 ESD Ratings.............................................................. 4  
7.3 Recommended Operating Conditions....................... 5  
7.4 Thermal Information.................................................. 5  
7.5 Electrical Characteristics........................................... 6  
7.6 Switching Characteristics.......................................... 6  
7.7 Typical Characteristics ............................................. 7  
Detailed Description .............................................. 9  
8.1 Overview ................................................................... 9  
8.2 Functional Block Diagram ......................................... 9  
9
10 Power Supply Recommendations ..................... 26  
11 Layout................................................................... 26  
11.1 Layout Guidelines ................................................ 26  
11.2 Layout Example .................................................... 26  
12 器件和文档支持 ..................................................... 27  
12.1 器件支持 ............................................................... 27  
12.2 社区资源................................................................ 27  
12.3 ....................................................................... 27  
12.4 静电放电警告......................................................... 27  
12.5 Glossary................................................................ 27  
13 机械、封装和可订购信息....................................... 27  
8
4 修订历史记录  
Changes from Revision A (December 2015) to Revision B  
Page  
已更改 文档标题“UCC28881 700V225mA 低静态电流离线开关“UCC28881 700V225mA 低静态电流离线转换  
....................................................................................................................................................................................... 1  
Changes from Original (November 2015) to Revision A  
Page  
已更改 销售状态产品预览量产数据............................................................................................................................. 1  
2
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ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
5 Device Comparison  
Power Handling Capability with Different Topologies  
MAXIMUM OUTPUT CURRENT  
MAXIMUM OUTPUT POWER  
for 85 ~ 265 VAC OPEN FRAME DESIGN  
for 85 ~ 265 VAC OPEN FRAME DESIGN  
PRODUCT  
NON-ISOLATED BUCK  
100 mA  
FLYBACK  
3 W  
UCC28880  
UCC28881  
225 mA  
4.5 W  
6 Pin Configuration and Functions  
D package  
8-Pin SOIC  
Top View  
GND  
GND  
FB  
1
8
DRAIN  
2
3
4
6
5
NC  
VDD  
HVIN  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
DRAIN  
FB  
NO.  
8
P
I
Drain pin  
3
Feedback terminal  
Ground  
GND  
GND  
HVIN  
NC  
1
G
2
G
Ground  
5
P
Supply pin  
6
N/C  
O
Not internally connected  
VDD  
4
Supply pin, supply is provided by internal LDO  
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7 Specifications  
7.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)  
(1) (2) (3)  
MIN  
MAX  
700  
UNIT  
(4)  
(4)  
(5)  
HVIN  
–0.3  
V
DRAIN  
Internally  
clamped  
700  
770  
V
IDRAIN  
IDRAIN  
FB  
Positive drain current single pulse, pulse max duration 25 μs  
mA  
mA  
V
Negative drain current  
–700  
–0.3  
–0.3  
6
6
VDD  
IVDD  
TJ  
VDD is supplied from low impedance source  
VDD is supplied from high impedance source  
Junction temperature  
V
400  
150  
260  
150  
µA  
°C  
°C  
°C  
Lead temperature 1.6 mm (1/16 inch) from case 10 seconds  
Storage temperature range  
Tstg  
–65  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. These ratings apply over the  
operating ambient temperature ranges unless otherwise noted.  
(3) The device is not rated to withstand operating conditions when multiple parameters are at or near, absolute maximum ratings.  
(4) TA = 25°C  
(5) The MOSFET drain to source voltage is less than 400V  
7.2 ESD Ratings  
UNIT  
Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins  
except HVIN pin  
±2000  
±1500  
±500  
V
V
V
(1)  
(1)  
V(ESD)  
Electrostatic discharge  
Human Body Model (HBM) per ANSI/ESDA/JEDEC JS-001, HVIN pin  
Charged device model (CDM), per JEDEC specification JESD22-C101,  
(2)  
all pins  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
4
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ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
7.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
NOM  
MAX  
UNIT  
V
VVDD  
VFB  
TJ  
Voltage On VDD pin  
5
Voltage on FB pin  
–0.2  
–40  
5
V
Operating junction temperature  
+125  
°C  
7.4 Thermal Information  
UCC28881  
D (SOIC)  
7 PINS  
134.4  
42.6  
(1)  
THERMAL METRIC  
UNIT  
RθJA  
RθJC(top)  
RθJB  
ψJT  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
Junction-to-top characterization parameter  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
85  
6.4  
ψJB  
Junction-to-board characterization parameter  
76  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report, SPRA953.  
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UCC28881  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
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7.5 Electrical Characteristics  
VHVIN = 30 V, TA = TJ = –40°C to +125°C (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VHVIN(min)  
INL  
Minimum Voltage to start-up  
30  
100  
V
Internal supply current, no load FB = 1.25 V (> VFB_TH  
)
58  
86  
µA  
Internal supply current, full  
FB = 0.75 V (> VFB_TH  
load  
IFL  
)
120  
µA  
ICH0  
ICH1  
Charging VDD Cap current  
Charging VDD Cap current  
VVDD = 0 V,  
–3.8  
–1.6  
–0.4  
mA  
mA  
VVDD = 4.4V, VFB = 1.25 V  
–3.40  
–1.30  
–0.25  
Internally regulated low  
Voltage supply (supplied from  
HVIN pin)  
VVDD  
4.5  
5.0  
5.5  
V
VFB_TH  
FB pin reference threshold  
VDD turn-on threshold  
VDD turn-off threshold  
VDD UVLO Hysteresis  
Maximum Duty Cycle  
0.96  
3.55  
3.28  
0.27  
45%  
1.03  
3.92  
1.105  
4.28  
3.89  
0.39  
55%  
630  
V
V
V
V
VVDD(on)  
VVDD(off)  
ΔVVDD(uvlo)  
DMAX  
VDD low-to-high  
VDD high-to-low  
VDD high-to-low  
FB = 0.75 V  
3.62  
0.345  
Static, TA = –40°C  
Static, TA = 25°C  
Static, TA = 125°C  
mA  
mA  
mA  
ILIMIT  
Current Limit  
330  
315  
440  
570  
Thermal Shutdown  
Temperature  
TJ(stop)  
TJ(hyst)  
BV  
Internal junction temperature  
138.5  
37.  
150  
45  
°C  
°C  
V
Thermal Shutdown Hysteresis Internal junction temperature  
Power MOSFET Breakdown  
TJ = 25°C  
700  
Voltage  
Power MOSFET On-  
Resistance (includes internal  
sense-resistor)  
ID = 60 mA, TJ = 25°C  
ID = 60 mA, TJ = 125°C  
14  
24  
18  
30  
Ω
Ω
RDS(on)  
VDRAIN = 700V, TJ = 25°C  
VDRAIN = 400 V, TJ = 125°C  
5
µA  
µA  
Power MOSFET off state  
leakage current  
DRAIN_ILEAKAGE  
20  
VHVIN = 700 V, TJ = 25°C, VVDD  
5.8 V  
=
4.0  
6.0  
7.5  
6.7  
36.0  
µA  
HVIN_IOFF  
HVIN off state current  
VDD clamp voltage  
VHVIN = 400 V, TJ = 125°C, VVDD  
5.8 V  
=
20  
µA  
V
VVDD(clamp)  
IVDD = 250 µA  
7.5  
7.6 Switching Characteristics  
over operating free-air temperature range (unless otherwise noted)  
MIN  
52  
TYP  
62  
MAX  
75  
UNIT  
kHz  
µs  
fSW(max)  
tON_MAX  
tOFF_MIN  
tMIN  
Maximum switching frequency  
Maximum switch on time (current limiter not triggered), FB = 0.75 V  
Minimum switch off time follows every tON time, FB = 0.75 V  
Minimum on time  
6.5  
8.3  
9.7  
6.5  
8.3  
9.7  
µs  
0.17  
130  
0.27  
200  
450  
0.30  
270  
µs  
tOFF(ovl)  
tON_TO  
Max off time (OL condition), tOFF(ovl) = tSW – tON(max)  
Inductor current run away protection time threshold  
µs  
ns  
6
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ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
7.7 Typical Characteristics  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1
1.2  
1.15  
1.1  
1.05  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.95  
0.9  
0.85  
0.8  
50  
150  
250  
350  
450  
550  
650  
750  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Temperature (oC)  
Drain Current Slope (mA/ms)  
D002  
D301  
Figure 2. ILIMIT vs Drain Current Slope  
Figure 1. ILIMIT vs Temperature  
1.5  
1.4  
1.3  
1.2  
1.1  
1
1.2  
ICH0  
ICH1  
1.15  
1.1  
1.05  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.95  
0.9  
IFL  
INL  
0.85  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Temperature (oC)  
Temperature (°C)  
D001  
D303  
Figure 4. ICH0 and ICH1 vs Temperature  
Figure 3. INL and IFL vs Temperature  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
1.01  
1.005  
1
VVDD(on)  
VVDD Hysteresis  
0.995  
0.99  
0.985  
0.98  
IDRAIN 25oC  
IDRAIN 125oC  
0
5
10 15 20 25 30 35 40 45 50 55 60  
Drain to Source Voltage (V)  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Temperature (oC)  
D316  
D305  
Figure 6. IDS vs VDS at 25°C and 125°C  
Figure 5. VVDD(on) and VVDD Hysteresis vs Temperature  
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Typical Characteristics (continued)  
1.02  
1.02  
1.01  
1
1.01  
1
0.99  
0.98  
0.97  
0.96  
0.99  
0.98  
0.97  
0.96  
-50  
0
50  
100  
150  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Temperature (oC)  
Temperature (°C)  
D012  
D308  
Figure 7. Maximum Switching Frequency vs Temperature  
Figure 8. VFB_TH vs Temperature  
1.05  
1.045  
1.04  
1.12  
1.1  
1.08  
1.06  
1.04  
1.02  
1
1.035  
1.03  
1.025  
1.02  
1.015  
1.01  
0.98  
0.96  
0.94  
0.92  
0.9  
1.005  
1
TOFF(min)  
TON(max)  
0.995  
0.99  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Temperature (°C)  
D001  
Temperature (oC)  
D310  
Figure 9. tON(max) and tOFF(min) vs Temperature  
Figure 10. DRAIN breakdown voltage vs Temperature  
140  
136  
132  
128  
124  
120  
116  
112  
108  
104  
100  
0
200  
400  
600  
800  
1000  
1200  
1400  
Copper Area (mm2)  
D0201  
Figure 11. RTHJA vs Copper Area  
8
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UCC28881  
www.ti.com.cn  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
8 Detailed Description  
8.1 Overview  
The UCC28881 integrates a controller and a 700-V power MOSFET into one monolithic device. The device also  
integrates a high-voltage current source, enabling start up and operation directly from the rectified mains voltage.  
UCC28881 is the same family device as UCC28880 and it provides higher power handling capability.  
The low-quiescent current of the device enables excellent efficiency. The device is suitable for non-isolated AC-  
to-DC low-side buck and buck-boost configurations with level-shifted direct feedback, but also more traditional  
high-side buck, buck boost and low-power flyback converters with low standby power can be built using a  
minimum number of external components.  
The device generates its own internal low-voltage supply (5 V referenced to the device’s ground, GND) from the  
integrated high-voltage current source. The PWM signal generation is based on a maximum constant on-time,  
minimum off-time concept, with the triggering of the on-pulse depending on the feedback voltage level. Each on-  
pulse is followed by a minimum off-time to ensure that the power MOSFET is not continuously driven in an on-  
state. The PWM signal is AND-gated with the signal from a current limit circuit. No internal clock is required, as  
the switching of the power MOSFET is load dependent. A special protection mechanism is included to avoid  
runaway of the inductor current when the converter operates with the output shorted or in other abnormal  
conditions that can lead to an uncontrolled increase of the inductor current. This special protection feature keeps  
the MOSFET current at a safe operating level. The device is also protected from other fault conditions with  
thermal shutdown, under-voltage lockout and soft-start features.  
8.2 Functional Block Diagram  
HVIN  
5
High Voltage  
Current Source  
8
DRAIN  
Thermal  
Shutdown  
Gate  
VDD  
4
LDO  
S
R
Q
Q
UVLO  
Current  
Limit  
Control and  
Reference  
Leading Edge  
Blanking Time  
VREF_TH = 1 V  
PWM Controller  
and Output Short  
Circuit Protection  
+
LEB  
FB  
3
1, 2  
GND  
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8.3 Feature Description  
The UCC28881 integrates a 700-V rated power MOSFET switch, a PWM controller, a high-voltage current  
source to supply a low-voltage power supply regulator. A bias and reference block, thermal shutdown and the  
following protection features, current limiter, under voltage lockout (UVLO) and overload protection for situations  
like short circuit at the output are also integrated inside UCC28881. UCC28881 is the same family device as  
UCC28880 and it provides higher power handling capability.  
The positive high-voltage input of the converter node (VIN+) functions as a system reference ground for the  
output voltage in low-side topologies. In the low-side buck topology the output voltage is negative with respect to  
the positive high-voltage input (VIN+), and in low-side buck-boost topology the output voltage is positive with  
respect to the positive high-voltage input (VIN+).  
In low-side buck and buck-boost topologies, the external level-shifted direct feedback circuit can be implemented  
by two resistors and a high-voltage PNP transistor.  
In high-side buck configuration, as well as in non-isolated flyback configuration, the output voltage is positive with  
respect to the negative high-voltage input (VIN–), which is the system reference ground.  
UCC28881 can operate under continuous conduction mode (CCM) or discontinuous conduction mode (DCM)  
mode. CCM operation allows the converter to deliver more output power because of less current ripple. However,  
it requires a higher inductor value and generally results in lower efficiency due to the added losses associated  
with diode reverse recovery current. DCM mode operation uses a smaller inductor and achieves better efficiency,  
but the output current handling capability is reduced because of increased current ripple. The table below shows  
the current handling capability in DCM and CCM operation for the UCC28880, UCC28881 family.  
Table 1. Current Handling Capability for UCC28880 and UCC28881  
DEVICE  
CURRENT HANDLING MODE  
Discontinuous Conduction Mode (DCM)  
Continuous Conduction Mode (CCM)  
Discontinuous Conduction Mode (DCM)  
Continuous Conduction Mode (CCM)  
230 VAC ±15%  
150 mA  
85 V ~ 265 VAC  
150 mA  
UCC28881  
UCC28881  
UCC28880  
UCC28880  
225 mA  
225 mA  
70 mA  
70 mA  
100 mA  
100 mA  
When the bus voltage is higher than 400 V, it is recommended to limit operation to DCM mode only to avoid the  
diode reverse recovery current and the associated internal MOSFET stress. Due to the higher switching loss and  
device stresses at higher bus voltage, it is recommended to keep the converter input voltage less than 560 V for  
the buck applications.  
UCC28881 power handling capability is reduced at higher ambient temperature, as a function of the power  
dissipation of the device, the device's recommended maximum operating junction temperature and the thermal  
dissipation capability of the total system. De-rating of the output current according to maximum ambient  
temperature can be estimated from Figure 12. The de-rating estimation assumes CCM operation, 10 µJ of  
switching loss and 135°C/W RθJA and 30-kHz, full-load switching frequency. This is a conservative estimation.  
The thermal handling capability can be more accurately determined through experimental measurement. For  
more information on thermal evaluation methods see the IC Package and Thermal Metrics application report:  
SPRA953.  
10  
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ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
1.2  
1.1  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
-40  
-20  
0
20  
40  
60  
80  
100 120 140  
Ambient Temperature (oC)  
D012  
Figure 12. Output Current (De-Rating Factor) vs. Temperature  
It is required to use fast recovery diode for the buck freewheeling diode. When designed in CCM, the diode  
reverse recovery time should be less than 35 ns to keep low reverse recovery current and the switching loss. For  
example, STTH1R06A provides 25-ns reverse recovery time. When designed in DCM, a slower diode can be  
used, but the reverse-recovery time should be kept less than 75 ns. MURS160 can fit the requirement.  
The device has a low-standby power consumption (no-load condition), only 18 mW (typical) when connected to a  
230-VAC mains and 9 mW when connected to an 115-VAC mains.  
The standby power does not include the power dissipated in the external feedback path, the power dissipated in  
the external pre-load, the inductor in the freewheeling diode and the converter input stage (rectifiers and filter).  
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8.4 Device Functional Modes  
8.4.1 Start-Up Operation  
The device includes a high-voltage current source connected between the HVIN pin and the internal supply for  
the regulator. When the voltage on the HVIN pin rises, the current source is activated and starts to supply current  
to the internal 5-V regulator. The 5-V regulator charges the external capacitor connected between VDD pin and  
GND pin. When the VDD voltage exceeds the VDD turn-on threshold, VVDD(on), device starts operations. The  
minimum voltage across HVIN and GND pins, to ensure enough current to charge the capacitance on VDD pin,  
is VHVIN(min). At the First switching cycle the minimum MOSFET off time is set to be >100 μs and cycle-by-cycle is  
progressively reduced up to tOFF(min) providing soft start.  
8.4.2 Feedback and Voltage Control Loop  
The feedback circuit consists of a voltage comparator with the positive input connected to an internal reference  
voltage (referenced to GND) and the negative input connected to FB pin. When the feedback voltage at the FB  
pin is below the reference voltage VFB_TH logic high is generated at the comparator output. This logic high  
triggers the PWM controller, which generates the PWM signal turning on the MOSFET. When the feedback  
voltage at the FB pin is above the reference voltage, it indicates that the output voltage of the converter is above  
the targeted output voltage set by the external feedback circuitry and PWM is stopped.  
12  
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Device Functional Modes (continued)  
8.4.3 PWM Controller  
UCC28881 operates under on/off control. When the FB pin voltage is below internal reference 1 V, the converter  
is switching and sending power to the load. When the FB pin voltage is above internal reference 1 V, the  
converter shuts off and stops delivering power to the load.  
The PWM controller does not need a clock signal. The PWM signal’s frequency is set to fSW(max) = (1/(tON(max)  
tOFF(min))) which occurs when the voltage on the FB pin is continuously below VFB_TH  
+
.
PWM duty cycle is determined by both the peak current and maximum on time. At each switching cycle, after  
turn on, the MOSFET is turned off if its current reaches the fixed peak-current threshold or its on time reaches  
the maximum value of on-time pulse tON(max)  
.
Normally the converter would operate under frequency control, which means the converter is only enabled one  
switching cycle and then disabled. Next switching cycle starts when output voltage decays and the feedback  
enable the converter again. This way, the converter appears to operate under variable switching frequency  
control.  
The user might observe the converter operates in burst mode that converter is enabled for multiple switching  
cycles and then stopped for multiple switching cycles. This causes larger output voltage ripple. However, due to  
the infrequent switching it actually helps on the standby power at no load.  
VFB  
VFB_TH  
t
FB_COMP_OUT  
t
PWM  
t
CURRENT LIMIT  
t
RSTN  
t
GATE  
t
tON(max)  
tOFF(min)  
tON(max)  
tOFF(min)  
tON(max)  
tOFF(min)  
tON(max)  
tOFF(min)  
Figure 13. UCC28881 Timing Diagram  
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Device Functional Modes (continued)  
8.4.4 Current Limit  
The current limit circuit senses the current through the power MOSFET. The sensing circuit is located between  
the source of the power MOSFET and the GND pin. When the current in the power MOSFET exceeds the  
threshold ILIMIT, the internal current limit signal goes high, which sets the internal RSTN signal low. This disables  
the power MOSFET by driving its gate low. The current limit signal is set back low after the falling edge of the  
PWM signal. After the rising edge of the GATE signal, there is a blanking time. During this blanking time, the  
current limit signal cannot go high. This blanking time and the internal propagation delay result in minimum on  
time, tMIN  
.
8.4.5 Inductor Current Runaway Protection  
To protect the device from overload conditions, including a short circuit at the output, the PWM controller  
incorporates a protection feature which prevents the inductor current from runaway. When the output is shorted  
the inductor demagnetization is very slow, with low di/dt, and when the next switching cycle starts energy stored  
in the inductance is still high. After the MOSFET switches on, the current starts to rise from pre-existing DC value  
and reaches the current-limit value in a short duration of time. Because of the intrinsic minimum on-time of the  
device the MOSFET on-time cannot be lower than tMIN, in an overload or output short circuit the energy  
inductance is not discharged sufficiently during MOSFET off-time, it is possible to lose control of the current  
leading to a runaway of the inductor current. To avoid this, if the on-time is less than tON_TO (tON_TO is a device  
internal time out), the controller increases the MOSFET off-time (tOFF). If the MOSFET on-time is longer than  
tON_TO then tOFF is decreased. The controller increases tOFF, cycle-by-cycle, through discrete steps until the on-  
time continues to stay below tON_TO. The tOFF is increased up to tOFF(ovl) after that, if the on-time is still below  
tON_TO the off-time is kept equal to tOFF(ovl). The controller decreases tOFF cycle-by-cycle until the on-time  
continues to stay above tON_TO up to tOFF(min). This mechanism prevents control loss of the inductor current and  
prevents over stress of the MOSFET (see typical waveforms in Figure 14 and Figure 15). At start up, the tOFF is  
set to tOFF(ovl) and reduced cycle-by-cycle (if the on-time is longer than tON_TO) up to tOFF(min) providing a soft start  
for the power stage.  
L[LaLÇ  
Lnducꢁor /urrenꢁ  
5rꢀin /urrenꢁ  
t
t
hb_a!ó  
hCC  
tía  
/urrenꢁ [imiꢁ  
[9.  
t
t
~200 ns  
hb_Çh  
~200 ns  
hb_Çh  
hb_Çh  
t
t
Lncreꢀse ꢁ  
( 5ecreꢀse f{í  
5ecreꢀse ꢁhCC  
(Lncreꢀse f{í  
hCC  
)
)
/bÇ_Lb  
Dꢀꢁe  
t
tON  
tON  
Figure 14. Current Runaway Protection Logic Timing Diagram  
14  
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Device Functional Modes (continued)  
hutput {ꢀorted Iere  
VFB  
VFB_TH  
ILIMIT  
Lb5Ü/Çhw  
/Üww9bÇ  
5w!Lb  
/Üww9bÇ  
t
t
tON_TO  
D!Ç9  
tON_TO  
tON_TO  
tON_TO  
tON_TO  
t
tON < tON_TO  
tON > tON_TO  
tON < tON_TO  
tON < tON_TO  
Figure 15. Current Runaway Protection, Inductor and MOSFET Current  
A minimal value needs to be imposed on the inductance value to avoid nuisance tripping of the protection feature  
that prevents the loss of control of the inductor current. Inadvertent operation of the protection feature limits the  
output-power capability of the converter. This condition depends on the converter's maximum input operating  
voltage and temperature. Use Equation 1 to calculate your minimum inductance value.  
V
IN max  
(
)
L >  
ì tON_ TO  
ILIMIT  
(1)  
In this equation, VIN(max) is the maximum voltage on the DC input. If the input is a rectifed AC voltage, it should  
be the peak value of the maximum AC line. For a DC input case, it should be the maximum DC input voltage.  
If the inductance value is too low, such that the MOSFET on-time is always less than tON_TO timeout and the  
device progressively increases the MOSFET off-time up to tOFF(ovl), the output power is reduced and the  
converter fails to supply the load.  
8.4.6 Over Temperature Protection  
If the junction temperature rises above TJ(stop), the over temperature protection is triggered. This disables the  
power MOSFET switching. To re-enable the switching of the MOSFET the junction temperature has to fall by  
TJ(hyst) below the TJ(stop) where the device moves out of over temperature protection.  
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9 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
9.1 Application Information  
The UCC28881 can be used in various application topologies with direct or isolated feedback. The device can be  
used in low-side buck, where the output voltage is negative, or as a low-side buck-boost configuration, where the  
output voltage is positive. In both configurations the common reference node is the positive input node (VIN+).  
The device can also be configured as a LED driver in either of the above mentioned configurations. If the  
application requires the AC-to-DC power supply output to be referenced to the negative input node (VIN–), the  
UCC28881 can also be configured as a traditional high-side buck as shown in Figure 16. In this configuration,  
the voltage feedback is sampling the output voltage VOUT, making the DC regulation less accurate and load  
dependent than in low-side buck configuration, where the feedback is always tracking the VOUT. However, high-  
conversion efficiency can still be obtained.  
9.2 Typical Application  
9.2.1 13-V, 225-mA High-Side Buck Converter  
Figure 16 shows a typical application example of a non-isolated power supply, where the UCC28881 is  
connected in a high-side buck configuration having an output voltage that is positive with respect to the negative  
high-voltage input (VIN–). The output voltage is set to 13 V in this example, but can easily be changed by  
changing the value of RFB1. This application can be used for a wide variety of household appliances and  
automation, or any other applications where mains isolation is not required.  
L2  
RF  
D2  
HVIN  
VDD  
FB  
DRAIN  
UCC28881  
GND  
CVDD  
C1  
+
VIN  
-
RFB1  
C2  
CFB  
RFB2  
D4  
L1  
+
D1  
CL  
RL  
VOUT  
-
D3  
Figure 16. Universal Input, 12-V, 225-mA Output High-Side Buck  
16  
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Typical Application (continued)  
9.2.1.1 Design Requirements  
Table 2. Design Specification  
DESCRIPTION  
DESIGN INPUT  
MIN  
TYP  
MAX  
UNIT  
VIN  
AC input voltage  
Line frequency  
Output current  
85  
47  
0
265  
63  
VRMS  
Hz  
fLINE  
IOUT  
225  
mA  
DESIGN REQUIREMENTS  
PNL  
No-load input power  
500  
17.5  
350  
mW  
V
VOUT  
ΔVOUT  
η
Output voltage  
12.5  
70%  
13  
Output voltage ripple  
Converter full-load efficiency  
mV  
9.2.1.2 Detailed Design Procedure  
9.2.1.2.1 Input Stage (RF, D2, D3, C1, C2, L2)  
Resistor RF is a flame-proof fusible resistor. RF limits the inrush current, and also provide protection in case  
any component failure causes a short circuit. Value for its resistance is generally selected between 4.7 Ω to  
15 Ω.  
A half-wave rectifier is chosen and implemented by diode D2 (1N4937). It is a general purpose 1-A, 600-V  
rated diode. It has a fast reverse recovery time (200 ns) for improved differential-mode-conducted EMI noise  
performance. Diode D3 (1N4007) is a general purpose 1-A, 1-kV rated diode with standard reverse recovery  
time (>500 ns), and is added for improved common-mode-conducted EMI noise performance. D3 can be  
removed and replaced by a short if not needed.  
EMI filtering is implemented by using a single differential-stage filter (C1-L2-C2).  
Capacitors C1 and C2 in the EMI filter also acts as storage capacitors for the high-voltage input DC voltage  
(VIN). The required input capacitor size can be calculated according Equation 2.  
»
ÿ
Ÿ
Ÿ
«
÷
÷
VBULK min  
2ìP  
1
1
(
)
IN  
ì
-
ì arccos  
fLINE min  
RCT 2ì p  
2 ì V  
(
)
IN min  
(
)
Ÿ
CBULK min  
=
(
)
2ì V2  
- VB2ULK min  
IN min  
(
)
(
)
where  
CBULK(min) is minimum value for the total input capacitor value (C1 + C2 in the schematic of Figure 16).  
RCT = 1 in case of half wave rectifier and RCT = 2 in case of full-wave rectifier .  
PIN is the converter input power.  
VIN(min) is the minimum RMS value of the AC input voltage.  
VBULK(min) is the minimum allowed voltage value across bulk capacitor during converter operation.  
fLINE(min) is the minimum line frequency when the line voltage is VIN(min)  
.
The converter input power can be easily calculated as follow:  
The converter maximum output power is: POUT = IOUT x VOUT = 0.225 A x 13 V = 2.925 W  
Assuming the efficiency η = 68% the input power is PIN = POUT/η = 4.178 W  
Using the following values for the other parameters  
VBULK(min) = 80 V  
VIN(min) = 85 VRMS (from design specification table)  
fLINE(min) = 57 Hz  
(2)  
17  
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CBULK(min) = 15.6 μF. Considering that electrolytic capacitors, generally used as bulk capacitor, have 20% of  
tolerance in value, the minimum nominal value required for CBULK is:  
CBULK(min)  
CBULKn(min)  
>
= 19.5mF  
1- TOL  
(
)
CBULK  
(3)  
Select C1 and C2 to be 10 μF each (CBULK = 10 μF + 10 μF = 20 μF > CBULKn(min)).  
By using a full-wave rectifier allows a smaller capacitor for C1 and C2, almost 50% smaller.  
9.2.1.2.2 Regulator Capacitor (CVDD  
)
Capacitor CVDD acts as the decoupling capacitor and storage capacitor for the internal regulator. A 100-nF, 10-V  
rated ceramic capacitor is enough for proper operation of the device's internal LDO.  
9.2.1.2.3 Freewheeling Diode (D1)  
The freewheeling diode has to be rated for high-voltage with as short as possible reverse-recovery time (trr).  
The maximum reverse voltage that the diode should experience in the application, during normal operation, is  
given by Equation 4.  
VD1(max) = 2ìVIN(max) = 2ì265V =375V  
(4)  
A margin of 20% is generally considered.  
The use of a fast recovery diode is required for the buck-freewheeling rectifier. When designed in CCM, the  
diode reverse recovery time should be less than 35 ns to keep low reverse recovery current and the switching  
loss. For example, STTH1R06A provides 25-ns reverse recovery time. When designed in DCM, slower diode can  
be used, but the reverse recovery time should be kept less than 75 ns. MURS160 can fit the requirement.  
9.2.1.2.4 Output Capacitor (CL)  
The value of the output capacitor impacts the output ripple. Depending on the combination of capacitor value and  
equivalent series resistor (RESR). A larger capacitor value also has an impact on the start-up time. For a typical  
application, the capacitor value can start from 47 μF, to hundreds of μF. A guide for sizing the capacitor value  
can be calculated by the following equations:  
ILIMIT -IOUT  
440mA - 225mA  
62kHz ì350mV  
CL > 20 ì  
= 20 ì  
= 200mF  
fSW max ì DVOUT  
(
)
(5)  
(6)  
DVOUT  
ILIMIT  
RESR  
<
= 0.8W  
Take into account that both CL and RESR contribute to output voltage ripple. A first pass capacitance value can be  
selected and the contribution of CL and RESR to the output voltage ripple can be evaluated. If the total ripple is  
too high the capacitance value has to increase or RESR value must be reduced. In the application example CL  
was selected (330 µF) and it has an RESR of 0.03 Ω. So the RESR contributes for 4% of the total ripple. The  
formula that calculates CL is based on the assumption that the converter operates in burst of twenty switching  
cycles. The number of bursts per cycle could be different, the formula for CL is a first approximation.  
9.2.1.2.5 Pre-Load Resistor (RL)  
The pre-load resistor connected at the output is required for the high-side buck topology. Unlike low side buck  
topology, the output voltage is directly sensed, in high-side buck topology the output is sampled and estimated.  
At no-load condition, because the feedback loop runs with its own time constant, the buck converter operates  
with a fixed minimum switching frequency. Select the pre-load resistor or using a zener diode to prevent output  
voltage goes too high at no-load condition.  
A simple zener diode would be a good choice without going through the calculation. Besides the simplifying the  
calculation, zener diode doesn't consumes power at heavy load condition, which helps to improve the converter  
heavy-load efficiency.  
18  
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A simple resistor can also be used to limit the output voltage at no load condition. However, this resistor  
connects to the output all the time and it reduces the full-load efficiency. The pre-load resistor can be calculated  
based on below equation or based on experiments. In this equation, the VMAX is allowed maximum output  
voltage, and VREG is the regulated output voltage.  
4ì VMAX2 ì V  
- VREG CFB ì RFB1 +RFB2  
(
)
(
)
MAX  
RL =  
ì
2
VMAX + VREG  
L1 ìILIMIT  
(7)  
9.2.1.2.6 Inductor (L1)  
Initial calculations:  
Half of the peak-to-peak ripple current at full load:  
DI = 2ì I -IOUT  
(
)
L
LIMIT  
(8)  
When operating in DCM, the peak-to-peak current ripple is the peak current of the device.  
Average MOSFET conduction minimum duty cycle at continuous conduction mode is:  
VOUT + Vd  
DMIN  
=
VIN(max) - Vd  
(9)  
(10)  
(11)  
If the converter operates in discontinuous conduction mode:  
IOUT VOUT + Vd  
DMIN = 2ì  
ILIMIT  
VIN(max) - Vd  
Maximum allowed switching frequency at VIN(max) and full load:  
DMIN  
FSW _ VIN(max)  
=
tON_ TO  
Switching frequency has a maximum value limit of fSW(max)  
The worst case ILIMIT = 315 mA, but assuming ΔIL = 180 mA.  
.
The converter works in continuous conduction mode (ΔIL < ILIMIT) so based on VOUT = 13 V, Vd = 0.5 V and  
VIN(max) = 375 V  
VOUT + Vd  
DMIN  
=
= 3.61%  
VIN(max) - Vd  
(12)  
The maximum allowed switching frequency is 62 kHz because the calculated value exceeds it.  
DMIN  
FSW _ VIN(max)  
=
= 80kHz >fSW(max) = 62kHz  
tON_ TO  
(13)  
The duty cycle does not force the MOSFET on time to go below tON_TO. If DMIN/TON_TO < fSW(max), the switching  
frequency is reduced by current runaway protection and the maximum average switching frequency is lower than  
fSW(max), the converter can't support full load.  
The minimum inductance value satisfies both the following conditions:  
VOUT + Vd  
L >  
= 1mH  
DIL ìFSW _ VIN max  
(
)
(14)  
(15)  
V
IN max  
375V  
(
)
L >  
ì tON_ TO  
=
ì 450ns @ 536mH  
ILIMIT  
315mA  
In the application example, 1 mH is selected as the minimum standard value that satisfy Equation 14 and  
Equation 15.  
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9.2.1.2.7 Feedback Path (CFB, RFB1 and RFB2) and Load Resistor (RL)  
In low-side buck converter the output voltage is always sensed by the FB pin and UCC28881 internal controller  
can turn on the MOSFET on VOUT. In high-side buck converter applications the information on the output  
voltage value is stored on CFB capacitor. This information is not updated in real time. The information on CFB  
capacitor is updated just after MOSFET turn-off event. When the MOSFET is turned off, the inductor current  
forces the freewheeling diode (D1 in Figure 16) to turn on and the GND pin of UCC28881 goes negative at -Vd1  
(where Vd1 is the forward drop voltage of diode D1) with respect to the negative terminal of bulk capacitor (C1 in  
Figure 16). When D1 is on, through diode D4, the CFB capacitor is charged at VOUT – Vd4 + Vd1. Set the output  
voltage regulation level using Equation 16.  
VOUT(T) - Vd4 + Vd1 - VFB _ TH VOUT(T) - VFB _ TH  
RFB1  
RFB2  
=
@
VFB _ TH  
VFB _ TH  
where  
VFB_TH is the FB pin reference voltage.  
VOUT_T is the target output voltage.  
RFB1, RFB2 is the resistance of the resistor divider connected with FB pin (see Figure 16)  
The capacitor CFB after D1 is discharged with a time constant that is τFB = CFB x (RFB1 + RFB2 ).  
Select the time constant τFB, given in Equation 17  
(16)  
(17)  
tFB = CFB ì RFB1 +RFB2 = 0.1ìC ìR  
(
)
L
LOAD  
In this equation, RLOAD is the full load resistor value.  
The time constant selection leads to a slight output-voltage increase in no-load or light-load conditions. In order  
to reduce the output-voltage increase, increase τFB. The drawback of increasing τFB is t in high-load conditions  
VOUT could drop.  
Because of the nature of sample and hold of output voltage feedback, the feedback loop components need some  
adjustment after the initial design. The larger time constant of the feedback components leads to lower no-load  
switching frequency. As the results, the no-load standby power and light-load voltage regulation are improved.  
Because of larger time constant, at heavier load, the load regulation start to get worse. On the contrast,  
decreasing the time constant makes the heavy load regulation better but increases the no-load standby power  
and makes the light-load voltage regulation worse. Some tradeoff is required to make the regulation and standby  
power. Below table summarizes the relationship between the feedback loop time constant and the load  
regulation. This can be used for an easy guideline for fine tuning the circuit performance.  
Table 3. Feedback Loop Time Constant Adjustment  
FEEDBACK LOOP TIME  
HEAVY-LOAD OUTPUT  
VOLTAGE RIPPLE  
NO-LOAD REGULATION  
STANDBY POWER  
CONSTANT (τFB  
)
Increase  
Better  
Worse  
Worse  
Better  
Better  
Worse  
Decrease  
20  
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9.2.1.3 Application Curves  
Figure 17 shows the output voltage vs output current. Different curves correspond to different converter AC input  
voltages. Figure 18 shows efficiency changes vs output power. Different curves correspond to different converter  
AC input voltages.  
18  
16  
14  
12  
10  
8
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
115V AC  
230V AC  
6
4
115V AC  
230V AC  
2
0
0
0.05  
0.1  
0.15  
0.2  
0.25  
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7  
Output Power (W)  
3
Output Current (A)  
D001  
D001  
Figure 17. Output IV Characteristic  
Figure 18. Efficiency vs POUT  
Table 4. Converter Efficiency  
VIN_AC (VRMS  
)
LOAD (mA)  
EFFICIENCY (%)  
AVERAGE EFFICIENCY (%)  
115  
50  
82  
81  
81  
80  
80  
81  
81  
81  
81  
100  
150  
225  
50  
230  
80.8  
100  
150  
225  
Table 5. Key Component List for 13-V 225-mA High-Side Buck Converter  
DES  
DESCRIPTION  
Bulk capacitor, 10 μF, 450 V  
PART NUMBER  
EEUED2W100  
MANUFACTURER(1)  
C1, C2  
CFB  
Panasonic  
Feedback capacitor, ceramic, 0.015 μF, 50 V  
Output capacitor, 330 μF, 35 V  
C0805C153K5RACTU  
EEU-FM1V331L  
STTH1R06A  
Kemet  
CL  
Panasonic  
D1  
Buck freewheeling diode, ultrafast, 600 V, 1 A  
ST Microelectronics  
Fairchild semiconductor  
D2, D3  
Rectifier diodes, standard recovery rectifier, 1000  
V, 1 A  
1N4007  
D4  
Feedback diode, standard recovery rectifier, 600 V, 1N4006-T  
1 A  
Diodes Inc.  
L1  
L2  
Buck inductor, 1 mH, 0.4 A,  
7447471102  
Wurth Elektronik  
Bourns  
Filter inductor, 1 mH, 0.2 A  
5800-102-RC  
RFB1  
RFB2  
Upper feedback resistor 121 kΩ, 1%  
Lower feedback resistor, 10.0 kΩ, 1%  
ERJ-6ENF1213V  
ERJ-6ENF1002V  
Panasonic  
Panasonic  
(1) See Third-Party Products Discalimer  
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9.2.2 Additional UCC28881 Application Topologies  
9.2.2.1 Low-Side Buck and LED Driver – Direct Feedback (Level Shifted)  
Features include:  
Output Referenced to Input  
Negative Output (VOUT) with Respect to VIN+  
Step Down: VOUT < VIN  
Direct Level-Shifted Feedback  
RFB1  
D1  
+
CL  
VOUT  
-
Q1  
L1  
HVIN  
+
VIN  
-
VDD  
FB  
DRAIN  
UCC28881  
GND  
RFB2  
Figure 19. Low-Side Buck, Direct Feedback (Level Shifted)  
RSENSE  
C1  
R2  
Q2  
D1  
RFB1  
CL  
R1  
+
Current Feedback  
L1  
VIN  
-
HVIN  
VOUT  
VDD  
FB  
DRAIN  
Q1  
UCC28881  
GND  
RFB1  
Figure 20. Low-Side Buck LED Driver, Direct Feedback (Level Shifted)  
22  
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9.2.2.2 High-Side Buck Converter  
Features include:  
Output Referenced to Input  
Positive Output (VOUT) with Respect to VIN–  
Step Down (VOUT < VIN)  
HVIN  
VDD  
FB  
DRAIN  
+
VIN  
-
UCC28881  
GND  
10  
D2  
CFB  
RFB2  
L1  
+
D1  
CL  
VOUT  
-
Figure 21. High-Side Buck Converter Schematic  
9.2.2.3 Non-Isolated, Low-Side Buck-Boost Converter  
Features Include:  
Output Referenced to Input  
Positive Output (VOUT) with Respect to VIN+  
Step Up, Step Down: VOUT > VIN or VOUT < VIN  
Direct Level-Shifted Feedback  
CL  
+
VOUT  
-
D1  
L1  
HVIN  
VDD  
DRAIN  
+
VIN  
-
UCC28881  
FB  
GND  
RFB2  
Figure 22. Low-Side Buck-Boost Converter  
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9.2.2.4 Non-Isolated, High-Side Buck-Boost Converter  
Features include:  
Output Referenced to Input  
Positive Output (VOUT) with Respect to VIN–  
Step Up, Step Down: VOUT > VIN or VOUT < VIN  
HVIN  
VDD  
FB  
DRAIN  
UCC28881  
GND  
+
VIN  
-
RFB1  
D2  
CFB  
RFB2  
+
D1  
CL  
VOUT  
L1  
-
Figure 23. High-Side Buck-Boost Converter  
9.2.2.5 Non-Isolated Flyback Converter  
Features include:  
Output Referenced to Input  
Positive Output (VOUT) with Respect VIN–  
Direct Feedback  
Higher Output Current Capability, 4.5 W for 85 VAC ~ 265 VAC Input and 6 W for 176 VAC ~ 265 VAC Input  
RFB1  
CL  
HVIN  
+
+
VDD  
FB  
DRAIN  
VOUT  
-
VIN  
-
UCC28881  
GND  
CVDD  
RFB2  
Figure 24. Non-Isolated Flyback Configuration  
24  
Copyright © 2015–2016, Texas Instruments Incorporated  
UCC28881  
www.ti.com.cn  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
9.2.2.6 Isolated Flyback Converter  
Features include:  
Output Isolated from Input  
Direct Feedback  
Higher Output Current Capability, 4.5 W for 85 VAC ~ 265 VAC Input and 6 W for 176 VAC ~ 265VAC Input  
+
CL  
VOUT  
-
HVIN  
+
VIN  
-
VDD  
FB  
DRAIN  
UCC28881  
GND  
CVDD  
RFB  
Figure 25. Isolated Flyback Converter  
Copyright © 2015–2016, Texas Instruments Incorporated  
25  
UCC28881  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
www.ti.com.cn  
10 Power Supply Recommendations  
The VDD capacitor recommended value is 100 nF to ensure high-phase margin of the internal 5-V regulator and  
it should be placed close to VDD pin and GND pins to minimize the series resistance and inductance.  
The VDD pin provides a regulated 5-V output but it is not intended as a supply for external load. Do not supply  
VDD pin with external voltage source (for example the auxiliary winding of flyback converter).  
Always keep GND pin 1 and GND pin 2 connected together with the shortest possible connection.  
11 Layout  
11.1 Layout Guidelines  
In both buck and buck-boost low-side configurations, the copper area of the switching node DRAIN should be  
minimized to reduce EMI.  
Similarly, the copper area of the FB pin should be minimized to reduce coupling to feedback path. Loop CL,  
Q1, RFB1 should be minimized to reduce coupling to feedback path.  
In high-side buck and buck boost the GND, VDD and FB pins are all part of the switching node so the copper  
area connected with these pins should be optimized. Large copper area allows better thermal management,  
but it causes more common mode EMI noise. Use the minimum copper area that is required to handle the  
thermal dissipation.  
Minimum distance between 700-V coated traces is 1.41 mm (60 mils).  
11.2 Layout Example  
Figure 26 shows and example PCB layout for UCC28881 in low-side buck configuration.  
L2  
D2  
Rf  
C1  
C2  
AC  
INPUT  
D3  
GND_IC  
GND_IC  
FB  
DRAIN  
L1  
D1  
NC  
VDD  
HVIN  
Rfb1  
Rfb2  
Q1  
= top layer  
= bottom layer  
= connect top and bot  
CL  
RL  
DC  
OUTPUT  
Figure 26. UCC28881 Layout Example  
26  
版权 © 2015–2016, Texas Instruments Incorporated  
 
UCC28881  
www.ti.com.cn  
ZHCSEL3B NOVEMBER 2015REVISED JANUARY 2016  
12 器件和文档支持  
12.1 器件支持  
12.1.1 Third-Party Products Disclaimer  
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT  
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES  
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER  
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.  
12.2 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
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Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
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12.3 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
12.4 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
12.5 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
13 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
版权 © 2015–2016, Texas Instruments Incorporated  
27  
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Copyright © 2016, 德州仪器半导体技术(上海)有限公司  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
UCC28881D  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
D
7
7
75  
RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
U28881  
U28881  
UCC28881DR  
2500 RoHS & Green  
NIPDAU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
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Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE OUTLINE  
D0007A  
SOIC - 1.75 mm max height  
SCALE 2.800  
SMALL OUTLINE INTEGRATED CIRCUIT  
C
SEATING PLANE  
.228-.244 TYP  
[5.80-6.19]  
.004 [0.1] C  
A
PIN 1 ID AREA  
8
1
.100  
[2.54]  
2X  
.189-.197  
[4.81-5.00]  
NOTE 3  
.150  
[3.81]  
4X .050  
[1.27]  
4
5
7X .012-.020  
[0.31-0.51]  
B
.150-.157  
[3.81-3.98]  
NOTE 4  
.069 MAX  
[1.75]  
.010 [0.25]  
C A B  
.005-.010 TYP  
[0.13-0.25]  
SEE DETAIL A  
.010  
[0.25]  
.004-.010  
[0.11-0.25]  
0 - 8  
.016-.050  
[0.41-1.27]  
DETAIL A  
TYPICAL  
(.041)  
[1.04]  
4220728/A 01/2018  
NOTES:  
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.  
Dimensioning and tolerancing per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed .006 [0.15] per side.  
4. This dimension does not include interlead flash.  
5. Reference JEDEC registration MS-012, variation AA.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
D0007A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
7X (.061 )  
[1.55]  
SYMM  
SEE  
DETAILS  
1
8
7X (.024)  
[0.6]  
(.100 )  
[2.54]  
SYMM  
5
4
4X (.050 )  
[1.27]  
(.213)  
[5.4]  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:8X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
EXPOSED  
METAL  
EXPOSED  
METAL  
.0028 MAX  
[0.07]  
ALL AROUND  
.0028 MIN  
[0.07]  
ALL AROUND  
SOLDER MASK  
DEFINED  
NON SOLDER MASK  
DEFINED  
SOLDER MASK DETAILS  
4220728/A 01/2018  
NOTES: (continued)  
6. Publication IPC-7351 may have alternate designs.  
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
D0007A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
7X (.061 )  
[1.55]  
SYMM  
1
8
7X (.024)  
[0.6]  
(.100 )  
[2.54]  
SYMM  
5
4
4X (.050 )  
[1.27]  
(.213)  
[5.4]  
SOLDER PASTE EXAMPLE  
BASED ON .005 INCH [0.125 MM] THICK STENCIL  
SCALE:8X  
4220728/A 01/2018  
NOTES: (continued)  
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
9. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
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