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芯片UCC2946TPWRQ1的概述 UCC2946TPWRQ1是一款电池监控和保护芯片，专为锂离子电池及其它可充电电池组的管理设计。此芯片的主要功能包括电池电压监控、过压和欠压保护、温度监控，以及充电和放电时的安全管理。UCC2946TPWRQ1广泛应用于电动车、消费电子产品及储能系统，其可靠性和高性能使其在复杂的电池应用中尤为重要。该芯片由德州仪器（Texas Instruments）公司生产，是一种集成电路（IC），采用了先进的制造工艺，以确保在不同的工作条件下能够稳定运行。UCC2946TPWRQ1支持多种电池配置和多种工作模式，灵活性为其在市场上的普遍应用奠定了基础。芯片UCC2946TPWRQ1的详细参数 UCC2946TPWRQ1的功能参数包括： - 工作电压范围：此芯片能够在2.5V至20V的宽广电压范围内正常工作，适应多种电池类型。 - 监控电压范围：其内置...

产品型号UCC2946TPWRQ1的Datasheet PDF文件预览

UCC2946-Q1

www.ti.com ................................................................................................................................................. SGLS273B–OCTOBER 2004–REVISED MARCH 2009

MICROPROCESSOR SUPERVISOR WITH WATCHDOG TIMER

FEATURES

•

Qualified for Automotive Applications

Fully Programmable Reset Threshold

Fully Programmable Reset Period

Fully Programmable Watchdog Period

•

2% Accurate Reset Threshold

Input Voltage Down to 2 V

Input 18-µA Maximum Input Current

Reset Valid Down to 1 V

DESCRIPTION

The UCC2946 is designed to provide accurate microprocessor supervision, including reset and watchdog

functions. During power up, the device asserts a reset signal RES with VDD as low as 1 V. The reset signal

remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both

reset threshold and reset period are programmable by the user.

The UCC2946 is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below

the threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal.

These values are shown in Figure 1. An I/O line of the microprocessor may be tied to the watchdog input (WDI)

for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user,

WDO is asserted. The watchdog function is disabled during reset conditions.

The UCC2946 is available in 8-pin TSSOP (PW) package to optimize board space.

VDD

POWER TO

CIRCUITRY

400 nA

RES

POWER ON RESET

1.235 V

RTH

8−BIT

COUNTER

400 nA

WDO

GND

100 mV

CLR

1.235 V

CLK

WATCHDOG

TIMING

EDGE DETECT

WDI

UDG−02192

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

UCC2946-Q1

SGLS273B–OCTOBER 2004–REVISED MARCH 2009 ................................................................................................................................................. www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION⁽¹⁾

T_A

PACKAGE⁽²⁾

ORDERABLE PART NUMBER

–40°C to 105°C

TSSOP – PW

Reel of 3000

UCC2946TPWRQ1

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

PW PACKAGE

(TOP VIEW)

GND

RTH

RES

VDD

WDI

WDO

TERMINAL FUNCTIONS

TERMINAL

NAME NO.

GND

I/O

DESCRIPTION

—

Ground reference for the device

This pin is high only if the voltage on the RTH has risen above 1.235 V. Once RTH rises above the threshold,

this pin remains low for the reset period. This pin asserts low and remains low if the RTH voltage dips below

1.235 V for an amount of time determined by Figure 1.

RES

This input compares its voltage to an internal 1.25-V reference. By using external resistors, a user can

program any desired reset threshold.

RTH

This pin allows the user to program the reset period by adjusting an external capacitor.

Supply voltage for the device

VDD

This pin is the input to the watchdog timer. If this pin is not toggled or strobed within the watchdog period,

WDO is asserted.

WDI

This pin is the watchdog output. This pin is asserted low if the WDI pin is not strobed or toggled within the

watchdog period.

WDO

This pin allows the user to program the watchdog period by adjusting an external capacitor.

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

UCC2946

V_IN

I_OUT

T_J

Input voltage range

10 V

20 mA

WDO output current

Junction temperature range

Storage temperature

–55°C to 150°C

–65°C to 150°C

300°C

T_stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

ESD rating, HBM

1500 V

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Voltages

are with respect to GND. Currents are positive into, and negative out of the specified terminal.

ELECTRICAL CHARACTERISTICS

T_A= –40°C to 105°C, 2.1 V ≤ V_DD≤ 5.5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Reference

V_DD

Operating voltage

2.1

5.5

µA

I_DD

Supply current

Minimum operating voltage⁽¹⁾

V_DD(min)

1.1

Reset Section

Reset threshold voltage

V_DDrising

1.17

1.235

1.26

Threshold hysteresis

Input leakage current

High-level output voltage

I_LEAK

V_OH

I_SOURCE= 2 mA

I_SINK= 2 mA

V_DD– 0.3

0.1

0.4

V_OL

Low-level output voltage

I_SINK= 20 µA, V_DD= 1 V

V_DD= –1 mV/µs

C_RP= 64 nF

VDD-to-output delay time

Reset period

120

200

µs

140

320

Watchdog Section

V_IH

V_IL

High-level input voltage, WDI

0.7 × V_DD

Low-level input voltage, WDI

Watchdog period

0.3 × V_DD

2.56

C_RP= 64 nF

0.96

1.60

Watchdog pulse width

High-level output voltage

Low-level output voltage

V_OH

V_OL

I_SOURCE= 2 mA

I_SINK= 2 mA

V_DD– 0.3

0.1

(1) Minimum supply voltage where RES is considered valid.

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

APPLICATION INFORMATION

The UCC2946 supervisory circuit provides accurate reset and watchdog functions for a variety of microprocessor

applications. The reset circuit prevents the microprocessor from executing code during undervoltage conditions,

typically during power-up and power-down. To prevent erratic operation in the presence of noise, voltage glitches

where voltage amplitude and time duration are less than the values specified in Figure 1 are ignored.

OVERDRIVE VOLTAGE WITH RESPECT TO

RESET THRESHOLD

DELAY TO OUTPUT LOW ON R

ESB

200

180

160

140

120

100

R Senses Glitch,

RES Goes Low for Reset Period

Glitches

Ignored,

RESB

Remains

High

100 110

120 130 140 150 160 170 180

− Delay Time − µs

DELAY

Figure 1.

The watchdog circuit monitors the microprocessor’s activity, if the microprocessor does not toggle WDI during the

programmable watchdog period WDO goes low, alerting the microprocessor’s interrupt of a fault. The WDO pin is

typically connected to the non-maskable input of the microprocessor so that an error recovery routine can be

executed.

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

Programming the Reset Voltage and Reset Period

The UCC2946 allows the reset trip voltage to be programmed with two external resistors. In most applications,

VDD is monitored by the reset circuit, however, the design allows voltages other than VDD to be monitored.

Referring to Figure 2, the voltage below which reset is asserted is determined by Equation 1:

R1 ) R2

+ 1.235

RESET

(1)

To keep quiescent currents low, resistor values in the MΩ range can be used for R1 and R2. A manual reset can

be easily implemented by connecting a momentary push switch in parallel with R2. RES is ensured to be low

with VDD voltages as low as 1 V.

VDD

POWER TO

CIRCUITRY

400 nA

−

1.235 V

RES

RESET

−

VDD

RTH

POWER

ON RESET

I/O

8−BIT

COUNTER

400 nA

WDO

−

NMI

CLR A1

100 mV

CLK

−

1.235 V

WATCHDOG

TIMING

WDI

EDGE DETECT

GND 1

UDG−98002

Figure 2. Typical Application Diagram

Once VDD rises above the programmed threshold, RES remains low for the reset period defined by Equation 2:

T_RP= 3.125 × C_RP

(2)

Where

T_RPis time in milliseconds

C_RPis capacitance in nanofarads

C_RPis charged with a precision current source of 400 nA, a high-quality, low-leakage capacitor (such as an NPO

ceramic) should be used to maintain timing tolerances. Figure 3 shows the voltage levels and timings associated

with the reset circuit.

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Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

T_RP

RES

5 V

0 V

5 V

V_DD

Programmed

Threshold

Monitored

by RT

2.5 V

1 V

0 V

t1 t2

t1: VDD > 1 V, RES is ensured low.

t2: VDD > programmed threshold, RES remains low for T_RP.

t3: T_RPexpires, RES pulls high.

t4: Voltage glitch occurs, but is filtered at the RTH pin, RES remains high.

t5: Voltage glitch occurs whose magnitude and duration is greater than the RTH filter, RES is asserted for T_RP.

t6: On completion of the T_RPpulse the RTH voltage has returned and RES is pulled high.

t7: VDD dips below threshold (minus hysteresis), RES is asserted.

Figure 3. Reset Circuit Timings

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Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

Programming the Watchdog Period

The watchdog period is programmed with C_WPas shown in Equation 3:

T_WP= 25 × C_WP

(3)

Where

T_WPis in milliseconds

C_WPis in nanofarads

A high-quality, low-leakage capacitor should be used for C_WP. The watchdog input WDI must be toggled with a

high-to-low or low-to-high transition within the watchdog period to prevent WDO from assuming a logic level low.

WDO maintains the low logic level until WDI is toggled or RES is asserted. If at any time RES is asserted, WDO

assumes a high logic state and the watchdog period be reinitiated. Figure 4 shows the timings associated with

the watchdog circuit.

VDD

RESET

VDD

WDI

VDD

WDO

t1 t2

t5 t6

t8 t9 t10 t11

t12

t13

t14

t1: Microprocessor is reset.

t2: WDI is toggled some time after reset, but before T_WPexpires.

t3: WDI is toggled before T_WPexpires.

t4: WDI is toggled before T_WPexpires.

t5: WDI is not toggled before T_WPexpires and WDO asserts low, triggering the microprocessor to enter an error recovery routine.

t6: The microprocessor’s error recovery routine is executed and WDI is toggled, reinitiating the watchdog timer.

t7: WDI is toggled before T_WPexpires.

t8: WDI is toggled before T_WPexpires.

t9: RES is momentarily triggered, RES is asserted low for T_RP

t10: Microprocessor is reset, RES pulls high.

t11: WDI is toggled some time after reset, but before T_WPexpires.

t12: WDI is toggled before T_WPexpires.

Figure 4. Watchdog Circuit Timing

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

Connecting WDO to RES

To provide design flexibility, the reset and watchdog circuits in the UCC2946 have separate outputs. Each output

independently drives high or low, depending on circuit conditions explained previously.

In some applications, it may be desirable for either the RES or WDO to reset the microprocessor. This can be

done by connecting WDO to RES. If the pins try to drive to different output levels, the low output level dominates.

Additional current flows from VDD to GND during these states. If the application cannot support additional current

(during fault conditions), RES and WDO can be connected to the inputs of an OR gate whose output is

connected to the microprocessor’s reset pin.

Layout Considerations

A 0.1-µF capacitor connected from VDD to GND is recommended to decouple the UCC2946 from switching

transients on the VDD supply rail.

Because RP and WP are precision current sources, capacitors C_RPand C_WPshould be connected to these pins

with minimal trace length to reduce board capacitance. Care should be taken to route any traces with high

voltage potential or high speed digital signals away from these capacitors.

Resistors R1 and R2 generally have a high ohmic value; traces associated with these parts should be kept short

to prevent any transient producing signals from coupling into the high-impedance RTH pin.

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

UCC2946-Q1

TYPICAL CHARACTERISTICS

INPUT CURRENT

THRESHOLD RESISTANCE

INPUT VOLTAGE

AMBIENT TEMPERATURE

12.0

11.5

1.26

1.25

= 5 V

11.0

10.5

1.24

1.23

10.0

1.22

9.5

9.0

1.21

1.20

−55 −35 −15

65 85 105 125

− Input Voltage − V

− Ambient Temperature − °C

Figure 5.

Figure 6.

Submit Documentation Feedback

Product Folder Link(s): UCC2946-Q1

PACKAGE OPTION ADDENDUM

www.ti.com

13-Oct-2010

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

UCC2946TPWRQ1

ACTIVE

TSSOP

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR

Request Free Samples

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF UCC2946-Q1 :

Catalog: UCC2946

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Addendum-Page 1

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

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UCC2946TPWRQ1产品参数

型号:	UCC2946TPWRQ1
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
零件包装代码：	SOIC
包装说明：	TSSOP, TSOP8,.25,25
针数：	8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	1.63
Is Samacsys：	N
可调阈值：	YES
模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e4
长度：	4.4 mm
湿度敏感等级：	2
信道数量：	1
功能数量：	1
端子数量：	8
最高工作温度：	105 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装等效代码：	TSOP8,.25,25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260
电源：	2.5/5 V
认证状态：	Not Qualified
座面最大高度：	1.2 mm
子类别：	Power Management Circuits
最大供电电流 (Isup)：	0.018 mA
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.1 V
表面贴装：	YES
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
阈值电压标称：	1.235V
处于峰值回流温度下的最长时间：	NOT SPECIFIED
微调/可调输出：	NO
宽度：	3 mm
Base Number Matches：	1

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