UCC2813-0/-1/-2/-3/-4/-5
UCC3813-0/-1/-2/-3/-4/-5
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for –40°C ≤ TA ≤ +85°C for
UCC2813-x; 0°C ≤ TA ≤ +70°C for UCC3813-x; VCC = 10V (Note 3); RT = 100k from REF to RC; CT=330pF from RC to GND;
0.1µF capacitor from VCC to GND; 0.1µF capacitor from VREF to GND. TA = TJ.
UCC2813-x
UCC3813-x
PARAMETER
TEST CONDITIONS
UNITS
MIN
TYP
MAX
Soft Start Section
COMP Rise Time
Overall Section
FB = 1.8V, Rise from 0.5V to REF–1V
4
ms
Start-up Current
VCC < Start Threshold
FB = 0V, CS = 0V, RC = 0V
ICC = 10mA (Note 8)
UCCx813-2/-4
0.1
0.5
0.23
1.2
15
mA
mA
V
Operating Supply Current
VCC Internal Zener Voltage
12
13.5
1.0
VCC Internal Zener Voltage Minus Start
Threshold Voltage
0.5
V
Note 3: Adjust VCC above the start threshold before setting at 10V.
Note 4: Oscillator frequency for the UCCx813-0, UCCx813-2 and UCCx813-3 is the output frequency.
Oscillator frequency for the UCCx813-1, UCCx813-4 and UCCx813-5 is twice the output frequency.
VCOMP
Note 5: Gain is defined by:
A
0 ≤VCS ≤ 0.8V.
VCS
Note 6: Parameter measured at trip point of latch with Pin 2 at 0V.
Note 7: Total Variation includes temperature stability and load regulation.
Note 8: Start Threshold, Stop Threshold and Zener Shunt Thresholds track one another.
Note 9: Guaranteed by design. Not 100% tested in production.
PIN DESCRIPTIONS
sense comparator during the 100ns interval immediately
following the rising edge of the OUT pin. This digital filter-
ing, also called leading-edge blanking, means that in
most applications, no analog filtering (RC filter) is re-
quired on CS. Compared to an external RC filter tech-
nique, the leading-edge blanking provides a smaller
effective CS to OUT propagation delay. Note, however,
that the minimum non-zero On-Time of the OUT signal is
directly affected by the leading-edge-blanking and the
CS to OUT propagation delay.
COMP: COMP is the output of the error amplifier and the
input of the PWM comparator.
Unlike other devices, the error amplifier in the UCC3813
family is a true, low output-impedance, 2MHz operational
amplifier. As such, the COMP terminal can both source
and sink current. However, the error amplifier is internally
current limited, so that you can command zero duty cycle
by externally forcing COMP to GND.
The UCC3813 family features built-in full cycle Soft Start.
Soft Start is implemented as a clamp on the maximum
COMP voltage.
The over-current comparator is only intended for fault
sensing, and exceeding the over-current threshold will
cause a soft start cycle.
FB: FB is the inverting input of the error amplifier. For
best stability, keep FB lead length as short as possible
and FB stray capacitance as small as possible.
RC: RC is the oscillator timing pin. For fixed frequency
operation, set timing capacitor charging current by con-
necting a resistor from REF to RC. Set frequency by con-
necting a timing capacitor from RC to GND. For best
performance, keep the timing capacitor lead to GND as
short and direct as possible. If possible, use separate
ground traces for the timing capacitor and all other func-
tions.
CS: CS is the input to the current sense comparators.
The UCC3813 family has two different current sense
comparators: the PWM comparator and an over-current
comparator.
The UCC3813 family contains digital current sense filter-
ing, which disconnects the CS terminal from the current
4