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USB2422

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

PRODUCT FEATURES

General Description

Highlights



High performance, low-power, small footprint hub

controller IC with two downstream ports

The SMSC USB2422 hub is a low-power, single transaction

translator, hub controller IC with two downstream ports for

embedded USB solutions. The SMSC hub controller can

attach to an upstream port as a Hi-Speed and Full-Speed

hub or as a Full-Speed only hub. The SMSC hub supports

Low-Speed, Full-Speed, and Hi-Speed (when configured as

a Hi-Speed hub) downstream devices on the enabled

downstream ports.



Fully compliant with the USB 2.0 Specification

Optimized for minimal bill-of-materials and low-cost

designs

All required resistors on the USB ports are integrated into

the hub. This includes all series termination resistors on D+

and D- pins and all required pull-down and pull-up resistors

on D+ and D- pins. The over-current sense inputs for the

downstream facing ports have internal pull-up resistors.

Applications



LCD monitors and TVs

Multi-function USB peripherals

PC motherboards

Set-top boxes, DVD players, DVR/PVR

Printers and scanners

PC media drive bay

Portable hub boxes

Features



Supports the USB Battery Charging Specification,

Revision 1.1

Fully integrated USB termination and pull-up/pull-

down resistors

Mobile PC docking

Embedded systems

Supports a single external 3.3 V supply source;

internal regulators provide 1.2 V internal core voltage

Gaming consoles

Cable/DSL modems

HDD enclosures

On-chip driver for 24 MHz crystal resonator or

external 24 MHz clock input

KVM switches



ESD protection up to 6 kV on all USB pins

Supports self-powered operation

Server front panels

Point-of-Sale (POS) systems

IP telephony

SMSC hub contains a built-in default configuration;

no external configuration options or components are

required

Automobile/home audio systems

Thin client terminals



Downstream ports as non-removable ports

Downstream port power control and over-current

detection on an individual or ganged basis



Supports compound devices on a port-by-port basis

24-pin SQFN (4x4 mm), RoHS-compliant package

Commercial temperature range support:

0ºC to +70ºC



Industrial temperature range support:

-40ºC to +85ºC

SMSC USB2422

DATASHEET

Revision 1.0 (06-04-13)

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Order Numbers:

ROHS COMPLIANT

PACKAGE

ORDER NUMBERS

TEMP. RANGE

REEL SIZE

-

USB2422/MJ

0ºC to +70ºC

-40ºC to +85ºC

4000

-

USB2422T/MJ

USB2422-I/MJ

USB2422T-I/MJ

24-Pin SQFN

4 x 4 mm

4000

This product meets the halogen maximum concentration values per IEC61249-2-21

For RoHS compliance and environmental information, please visit www.smsc.com/rohs

Please contact your SMSC sales representative for additional documentation related to this product

such as application notes, anomaly sheets, and design guidelines.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for

construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC

reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications

before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent

rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated

version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors

known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not

designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property

damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of

this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered

trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.

The Microchip name and logo, and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,

FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE

OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL

DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;

TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD

TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Revision 1.0 (06-04-13)

2

SMSC USB2422

DATASHEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Conventions

Within this manual, the following abbreviations and symbols are used to improve readability.

Example

BIT

Description

Name of a single bit within a field

Name of a single bit (BIT) in FIELD

Range from x to y, inclusive

Groups of bits from m to n, inclusive

Pin Name

FIELD.BIT

x…y

BITS[m:n]

zzzzb

Binary number (value zzzz)

Hexadecimal number (value zzz)

Hexadecimal number (value zz)

0xzzz

zzh

rsvd

Reserved memory location. Must write 0, read value indeterminate

Instruction code, or API function or parameter

Section or Document name

code

Section Name

x

Don’t care

{,Parameter}

<> indicate a Parameter is optional or is only used under some conditions

Braces indicate Parameter(s) that repeat one or more times

Brackets indicate a nested Parameter. This Parameter is not real and actually decodes

into one or more real parameters.

[Parameter]

SMSC USB2422

3

Revision 1.0 (06-04-13)

DATASHEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Table of Contents

Chapter 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chapter 2 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

2.2

2.3

2.4

2.5

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Pin Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Pin Descriptions (Grouped by Function). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Strap Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.5.1

2.5.2

2.5.3

Non-Removable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Internal Pull-Down (IPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.6

Example Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Chapter 3 Battery Charging Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1

USB Battery Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1.1 Special Behavior of PRTPWR Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Battery Charging Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2.1 Battery Charging Enabled via SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2

Chapter 4 Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1

4.2

Hub Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.2.1

4.2.2

External Hardware RESET_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.3

SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.3.1

4.3.2

4.3.3

4.3.4

4.3.5

4.3.6

4.3.7

SMBus Slave Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Protocol Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Slave Device Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Stretching the SCLK Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

SMBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Bus Reset Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

SMBus Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.4

SMBus Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.4.1

4.4.2

4.4.3

4.4.4

4.4.5

4.4.6

4.4.7

4.4.8

4.4.9

Vendor ID Least Significant Bit Register (VIDL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Vendor ID Most Significant Bit Register (VIDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Product ID Least Significant Bit Register (PIDL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Product ID Most Significant Bit Register (PIDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Device ID Least Significant Bit Register (DIDL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Device ID Most Significant Bit Register (DIDM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Configuration Data Byte 1 Register (CFG1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Configuration Data Byte 2 Register (CFG2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Configuration Data Byte 3 Register (CFG3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.4.10 Non-Removable Device Register (NRD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.4.11 Port Disable for Self-Powered Operation Register (PDS) . . . . . . . . . . . . . . . . . . . . . . . . 31

4.4.12 Port Disable for Bus-Powered Operation Register (PDB) . . . . . . . . . . . . . . . . . . . . . . . . 31

4.4.13 Max Power for Self-Powered Operation Register (MAXPS) . . . . . . . . . . . . . . . . . . . . . . 32

4.4.14 Max Power for Bus-Powered Operation Register (MAXPB) . . . . . . . . . . . . . . . . . . . . . . 32

4.4.15 Hub Controller Max Current for Self-Powered Operation Register (HCMCS) . . . . . . . . . 32

4.4.16 Hub Controller Max Power for Bus-Powered Operation Register (HCMCB). . . . . . . . . . 33

4.4.17 Power-On Time Register (PWRT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.18 Language ID High Register (LANGIDH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Revision 1.0 (06-04-13)

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SMSC USB2422

DATASHEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

4.4.19 Language ID Low Register (LANGIDL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.20 Manufacturer String Length Register (MFRSL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.21 Product String Length Register (PRDSL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.22 Serial String Length Register (SERSL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.23 Manufacturer String Registers (MANSTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.24 Product String Registers (PRDSTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4.25 Serial String Registers (SERSTR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4.26 Battery Charging Enable Register (BC_EN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4.27 Boost Upstream Register (BOOSTUP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.4.28 Boost Downstream Register (BOOST40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.4.29 Port Swap Register (PRTSP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

4.4.30 Port 1/2 Remap Register (PRTR12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.4.31 Status/Command Register (STCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Chapter 5 DC Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.1

5.2

Maximum Guaranteed Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.2.1

Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Chapter 6 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6.1

6.2

Oscillator/Crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

External Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

6.2.1

USB 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

6.3

SMBus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Chapter 7 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Chapter 8 Datasheet Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

SMSC USB2422

5

Revision 1.0 (06-04-13)

DATASHEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

List of Figures

Figure 1.1 USB2422 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 2.1 USB2422 24-Pin SQFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 2.2 Non-Removable Pin Strap Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 2.3 IPD Pin Strap Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 2.4 LED Pin Strap Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 2.5 Example Application - SoC Based Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 2.6 Example Application - Non-SoC Based Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 3.1 Battery Charging via External Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 4.1 Hub Configuration Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 4.2 Block Write. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 4.3 Block Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 5.1 Supply Rise Time Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 6.1 Typical Crystal Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 6.2 Formula to Find the Value of C1 and C2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 7.1 24-SQFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Figure 7.2 Recommended PCB Land Pattern. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 7.3 Taping Dimensions and Part Orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 7.4 Reel Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Figure 7.5 Tape Length and Part Quantity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

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SMSC USB2422

DATASHEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

List of Tables

Table 2.1 USB2422 Pin Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 2.2 USB2422 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 2.3 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 2.4 Strap Option Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 2.5 Example Applications - Resistor/Capacitor Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 4.1 Hub Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 4.2 Hub Configuration Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 5.1 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 5.2 Pin Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 6.1 Crystal Circuit Legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Table 7.1 24-SQFN Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Table 8.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

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Chapter 1 Block Diagram

To Upstream Upstream USB

To

CRFILT PLLFILT

V_BUS

Data

SMBus Master

24 MHz Crystal

SMBCLK

SMBDATA

3.3V

PLL

Serial

Bus-Power

Detect/V_BUS

Pulse

Interface

Upstream

PHY

1.2V Reg

SIE

TT

Controller

Repeater

Port

Controller

Routing & Port Re-Ordering

Logic

Port #1

OC

Port #2

OC

PHY#1

PHY#2

Sense

Switch

Driver

Sense

Switch

Driver

OC Sense

Switch

OC Sense

Switch

USB Data

Downstream

USB Data

Downstream

Figure 1.1 USB2422 Block Diagram

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Chapter 2 Pin Descriptions

This chapter is organized by a set of pin configurations followed by a corresponding pin list organized

by function according to their associated interface. A detailed description list of each signal (named in

the pin list) is organized by function in Table 2.2, “USB2422 Pin Descriptions,” on page 11. Refer to

Table 2.3, “Buffer Type Descriptions,” on page 14 for a list of buffer types.

An N at the end of a signal name indicates that the active (asserted) state occurs when the signal is

at a low voltage level. When the N is not present, the signal is asserted when it is at a high voltage

level. The terms assertion and negation are used exclusively in order to avoid confusion when working

with a mixture of active low and active high signals. The term assert, or assertion, indicates that a

signal is active, independent of whether that level is represented by a high or low voltage. The term

negate, or negation, indicates that a signal is inactive.

2.1

Pin Configuration

USBDM_UP

USBDP_UP

OCS2_N

19

20

21

22

23

24

12

11

10

9

PRTPWR2

CRFILT

SMSC

USB2422

(Top View SQFN-24)

XTALOUT/(CLKIN_EN)

XTALIN/CLKIN

PLLFILT

VDD33

OCS1_N

8

Thermal Slug

(must be connected to VSS)

RBIAS

PRTPWR1/(BC_EN1)

7

Indicates pins on the bottom of the device.

Figure 2.1 USB2422 24-Pin SQFN

SMSC USB2422

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2.2

Pin Table

Table 2.1 USB2422 Pin Table

UPSTREAM USB 2.0 INTERFACES (3 PINS)

USBDM_UP

VBUS_DET

DOWNSTREAM 2-PORT USB 2.0 INTERFACES (9 PINS)

USBDM_UP

USBDP_DN1/

PRT_DIS_P1

USBDP_DN2/

PRT_DIS_P2

USBDM_DN1/

PRT_DIS_M1

USBDM_DN2/

PRT_DIS_M2

PRTPWR1/

BC_EN1

PRTPWR2

OCS1_N

OCS2_N

RBIAS

SERIAL PORT INTERFACE (2 PINS)

SMBDATA/

NON_REM1

SMBCLK/

CFG_SEL

MISC (5 PINS)

SUSP_IND/

LOCAL_PWR/

NON_REM0

XTALIN/

CLKIN

XTALOUT/

RESET_N

CLKIN_EN

NC

POWER, GROUND, AND NO CONNECTS (5 PINS)

(3) VDD33

CRFILT

PLLFILT

VSS

TOTAL 24

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2.3

Pin Descriptions (Grouped by Function)

Table 2.2 USB2422 Pin Descriptions

#

BUFFER

SYMBOL

TYPE

DESCRIPTION

UPSTREAM USB 2.0 INTERFACES

19

20

USBDM_UP

USBDP_UP

IO-U

USB Bus Data:

Connect to the upstream USB bus data signals (host, port, or

upstream hub).

16

VBUS_DET

I

Detect Upstream VBUS Power:

Detects the state of upstream VBUS power. The SMSC hub monitors

VBUS_DET to determine when to assert the internal D+ pull-up

resistor (signalling a connect event)

When designing a detachable hub, this pin should be connected to

VBUS on the upstream port via a 2:1 voltage divider. Two 100 kΩ

resistors are suggested.

For self-powered applications with a permanently attached host, this

pin must be connected to a dedicated host control output, or

connected to the 3.3 V domain that powers the host (typically VDD33).

DOWNSTREAM USB 2.0 INTERFACES

5

3

and

4

USBDP_DN[2:1]/

PRT_DIS_P[2:1]

and

IO-U

Hi-Speed USB Data:

Connect to the downstream USB peripheral devices attached to the

hub’s ports.

USBDN_DN[2:1]/

2

PRT_DIS_M[2:1]

Port Disable Strap Option:

If this strap is enabled by package and configuration settings (see

Table 4.1, "Hub Configuration Options"), this pin will be sampled at

RESET_N negation to determine if the port is disabled.

Both USB data pins for the corresponding port must be tied to VDD33

to disable the associated downstream port.

7

PRTPWR1/

BC_EN1

O12

IPD

USB Power Enable:

Enables power to USB peripheral devices that are downstream, where

the hub supports active high power controllers only.

Battery Charging Strap Option:

Port 1 pin will be sampled at RESET_N negation to determine if port

1 supports the battery charging protocol (and thus the supporting

external port power controllers) that would enable a device to draw the

currents per the USB Battery Charging Specification.

This pin has an internal pull-down that will be removed after the strap

option hold time is completed.

BC_EN1= 1: Battery charging feature is supported for port 1

BC_EN1= 0: Battery charging feature is not supported for port 1

11

PRTPWR2

O12

IPU

USB Power Enable:

Enables power to USB peripheral devices that are downstream, where

the hub supports active high power controllers only.

8

12

OCS1_N

OCS2_N

Over-Current Sense:

Input from external current monitor indicating an over-current

condition. This pin contains an internal pull-up to the 3.3 V supply.

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Table 2.2 USB2422 Pin Descriptions (continued)

#

BUFFER

TYPE

SYMBOL

DESCRIPTION

24

RBIAS

I-R

USB Transceiver Bias:

A12.0 kΩ (+/- 1%) resistor is attached from ground to this pin to set

the transceiver’s internal bias settings.

SERIAL PORT INTERFACE

13

SMBDATA

I/OSD12

System Management Bus Data

Non-removable Port Strap Option:

NON_REM1

This pin is sampled (in conjunction with SUSP_IND/NON_REM0) at

RESET_N negation to determine if ports [2:1] contain permanently

attached (non-removable) devices:

NON_REM[1:0] = 00: all ports are removable

NON_REM[1:0] = 01: port 1 is non-removable

NON_REM[1:0] = 10: ports 1 and 2 are non-removable

NON_REM[1:0] = 11: reserved

See Section 2.5, "Strap Pin Configuration" for details.

System Management Bus Clock

14

SMBCLK/

CFG_SEL

I/OSD12

Configuration Select:

The logic state of this multifunction pin is internally latched on the

rising edge of RESET_N (RESET_N negation), and will determine the

hub configuration method as described in Table 4.1.

MISC

22

21

XTALIN/

CLKIN

ICLKx

24 MHz Crystal or External Clock Input:

This pin connects to either one terminal of the crystal or to an external

24 MHz clock when a crystal is not used.

XTALOUT

OCLKx

Crystal Output:

This is the other terminal of the crystal circuit with 1.2 V p-p output and

a weak (< 1 mA) driving strength. When an external clock source is

used to drive XTALIN/CLKIN, leave this pin unconnected, or use with

appropriate caution.

15

6

RESET_N

NC

IS

RESET Input:

The system must reset the chip by driving this input low. The minimum

active low pulse is 1 μs.

IPD

Treat as a no connect pin or connect to ground. No trace or signal

should be routed or attached to this pin.

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Table 2.2 USB2422 Pin Descriptions (continued)

#

BUFFER

TYPE

SYMBOL

DESCRIPTION

17

SUSP_IND

I/O12

Suspend Indicator:

Indicates the USB state of the hub.

negated : unconfigured, or configured and in USB Suspend

asserted : Hub is configured, and is active (i.e., not in suspend)

LOCAL_PWR

Local Power:

This input selects whether the hub reports itself as bus or self-powered

when dynamic power switching is enabled via the Dynamic Power

Enable (DYNAMIC) bit of the Configuration Data Byte 2 Register

(CFG2). This pin is sampled at POR/Reset before the USB Hub Attach

command is sent. Once the hub has entered the attach state (as

indicated by the USB Attach and Write Protect (USB_ATTACH) bit of

the Status/Command Register (STCD)), this pin cannot be changed.

Low : self/local power source is not available (i.e., the Hub gets all

power from the upstream USB VBus).

High : self/local power source is available.

Note:

Never tie this pin directly to VDD33, as doing so may cause

it to act as SUSP_IND.

Note:

This pin assumes the meaning of local power input only if

properly configured via SMBus. If the hub is configured via

straps, it is NON_REM0 at reset and SUSP_IND after reset.

(NON_REM0)

Non-Removable Port Strap Option:

This pin is sampled (in conjunction with SUSP_IND/NON_REM0) at

RESET_N negation to determine if ports [2:1] contain permanently

attached (non-removable) devices:

NON_REM[1:0] = 00: all ports are removable

NON_REM[1:0] = 01: port 1 is non-removable

NON_REM[1:0] = 10: ports 1 and 2 are non-removable

NON_REM[1:0] = 11: reserved

See Section 2.5, "Strap Pin Configuration" for details.

POWER, GROUND, and NO CONNECTS

1

9

18

VDD33

3.3 V power to the chip.

A 1.0 μF low-ESR capacitor to VSS is required on pin 9 as close as

possible to the pin. A 0.1 μF low-ESR capacitor to VSS is required on

pin 1 as close as possible to the pin.

10

23

CRFILT

PLLFILT

VSS

VDD Core Regulator Filter Capacitor:

This pin requires a 1.0 μF low-ESR capacitor to VSS for proper

operation.

PLL Regulator Filter Capacitor:

This pin can have up to a 0.1 μF low-ESR capacitor to VSS, or be left

unconnected.

Ground Pad/ePad:

The package slug is the only VSS for the device and must be tied to

ground with multiple vias.

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2.4

Buffer Type Descriptions

Table 2.3 Buffer Type Descriptions

BUFFER

DESCRIPTION

I/O

IPD

Input/Output

Input with internal weak pull-down resistor

Input with internal weak pull-up resistor

Input with Schmitt trigger

IPU

IS

I/O12

ICLKx

OCLKx

I-R

Input/Output buffer with 12 mA sink and 12 mA source

XTAL clock input

XTAL clock output

RBIAS

I/O-U

Analog Input/Output defined in USB specification

2.5

Strap Pin Configuration

If a pin's strap function is enabled through hub configuration selection (Table 4.1), the strap pins must

be pulled either high or low using the values provided in Table 2.4. Each strap option is dependent on

the pin’s buffer type, as outlined in the sections that follow.

Table 2.4 Strap Option Summary

STRAP OPTION

RESISTOR VALUE BUFFER TYPE

NOTES

Non-Removable

47 - 100 kΩ

10 kΩ

I/O

IPD

I/O

Internal Pull-Down

(IPD)

 Only applicable to port power pins

 Contains a built-in resistor

LED

47 - 100 kΩ

2.5.1

Non-Removable

If a strap pin’s buffer type is I/O, an external pull-up or pull-down must be implemented as shown in

Figure 2.2. Use Strap High to set the strap option to 1 and Strap Low to set the strap option to 0. When

implementing the Strap Low option, no additional components are needed (i.e., the internal pull-down

provides the resistor)

+V

R kΩ

I/O Strap Pin

HUB

Strap High

I/O Strap Pin

HUB

Strap Low

R kΩ

GND

Figure 2.2 Non-Removable Pin Strap Example

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2.5.2

Internal Pull-Down (IPD)

If a strap pin’s buffer type is IPD, one of the two hardware configurations outlined in Figure 2.3 must

be implemented. Use the Strap High configuration to set the strap option value to 1 and Strap Low to

set the strap option value to 0.

+V

R kΩ

IPD Strap Pin

HUB

Strap High

IPD Strap Pin

HUB

Strap Low

VSS

Figure 2.3 IPD Pin Strap Example

2.5.3

LED

If a strap pin’s buffer type is I/O and shares functionality with an LED, the hardware configuration

outlined below must be implemented. The internal logic will drive the LED appropriately (active high or

low) depending on the sampled strap option. Use the Strap High configuration to set the strap option

value to 1 and Strap Low to set the strap option to 0.

LED/

R

Strap High

kΩ

Strap Pin

HUB

Strap Pin

HUB

R

LED/

kΩ

Strap Low

Figure 2.4 LED Pin Strap Example

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2.6

Example Applications

Figure 2.5 and Figure 2.6 depict example applications for an SoC based design and a non-SoC based

design, respectively. The corresponding resistor and capacitor values for these examples are provided

in Table 2.5.

USB

Connector

R_VBUS

USB2422

R_VBUS

Enable

USB Switch

FAULT_N

PRTPWR1

OCS1_N

VBUS_DET

USBDP_UP

USBDM_UP

Connector

USBDP_DN1

USBDM_DN1

RESET_N

PRTPWR2(11)

OCS2_N(12)

USBDP_DN2

USBDM_DN2

Embedded

Device

Vcc

3.3V

SMBCLK

VDD33 (1,9,18)

SOC

SMBDATA

RESET_N

SUSP_IND

N/C

PLLFILT

CRFILT

RBIAS

Clock

R_BIAS

C_BYP

C_OUTCR

C_OUTPLL

XTALOUT

XTALIN

GND

Figure 2.5 Example Application - SoC Based Design

USB2422

USB

Connector

R_VBUS

PRTPWR2(11)

OCS2_N(12)

USBDP_DN2

USBDM_DN2

VBUS_DET

USBDP_UP

USBDM_UP

Non-removable

Device

Vcc

R1

Vcc

PRTPWR1

Power

Switch

OCS1_N

R2

Charger

Enabled

Port

USBDP_DN1

NON_REM0(17)

RESET_N

USBDM_DN1

Vcc

CFG_SEL0(14)

VDD33 (1,9,18)

NON_REM1(13)

N/C

PLLFILT

CRFILT

RBIAS

R2

Cx

R_BIAS

C_BYP

C_OUTCR

C_OUTPLL

XTAL1(22)

XTAL2(21)

24MHz

GND

Cx

Figure 2.6 Example Application - Non-SoC Based Design

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Table 2.5 Example Applications - Resistor/Capacitor Values

DESIGNATOR

VALUE

R1

R2

Cx

20 kΩ

50 kΩ

18 pF

1.0 uF

C_BYP

C_OUTCR

1.0 uF

(Note 2.1)

C_OUTPLL

0.1 uF

(Note 2.2)

R_BIAS

12 kΩ

R_VBUS

100 kΩ

Note 2.1 C_OUTCRshould be placed as close as possible to pin 9

Note 2.2 C_OUTPLLshould be placed as close as possible to pin 1

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Chapter 3 Battery Charging Support

The USB2422 SMSC hub provides support for battery charging devices on a per port basis in

compliance with the USB Battery Charging Specification, Revision 1.1. The hub can be configured to

individually enable each downstream port for battery charging support either via pin strapping (Port 1

only) as illustrated in Figure 3.1 or by setting the corresponding configuration bits via SMBus (Section

4.1 on page 20).

3.3 V

5.0 V

USB Port Power

Controller

R_STRAP

IN

USB2422

VBUS

PRTPWR1

EN

OCSx_N

FLAG

Figure 3.1 Battery Charging via External Power Supply

Note: R_STRAPenables battery charging.

3.1

USB Battery Charging

A downstream port enabled for battery charging turns on port power as soon as the power on reset

and hardware configuration process has completed. The hub does not need to be enumerated nor

does VBUS_DET need to be asserted for the port power to be enabled. These conditions allow battery

charging in S3, S4, and S5 system power states as well as in the fully operational state. The USB

Battery Charging Specification does not interfere with standard USB operation, which allows a device

to perform battery charging at any time.

A port that supports battery charging must be able to support 1.5 amps of current on VBUS. Standard

USB port power controllers typically only allow for 0.8 amps of current before detecting an over-current

condition. Therefore, the 5 volt power supply, port power controller, or over-current protection devices

must be chosen to handle the larger current demand compared to standard USB hub designs.

3.1.1

Special Behavior of PRTPWR Pins

The USB2422 enables VBUS by asserting the port power (PRTPWR[2:1]) as soon as the hardware

configuration process has completed. If the port detects an over-current condition, PRTPWR[2:1] will

be turned off to protect the circuitry from overloading. If an over-current condition is detected when the

hub is not enumerated, PRTPWR[2:1] can only be turned on from the host or if RESET_N is toggled.

These behaviors provide battery charging even when the hub is not enumerated and protect the hub

from sustained short circuit conditions. If the short circuit condition persists when the hub is plugged

into a host system the user is notified that a port has an over-current condition. Otherwise

PRTPWR[2:1] turned on by the host system and the ports operate normally.

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3.2

Battery Charging Configuration

The battery charging option can be configured in one of two ways:



When the hub is brought up in the default configuration with strapping options enabled, with the

PRTPWR1/BC_EN1 pin configured (Port 1 only). See the following sections for details:

Section 2.3: Pin Descriptions (Grouped by Function) on page 11

Section 2.5: Strap Pin Configuration on page 14



When the hub is initialized for configuration over SMBus.

3.2.1

Battery Charging Enabled via SMBus

Register memory map location 0xD0 is allocated for battery charging support. The Battery Charging

register at location 0xD0 starting from bit 1 enables battery charging for each downstream port when

asserted. Bit 1 represents port 1, and bit 2 represents port 2. Each port that has battery charging

enabled asserts the corresponding PRTPWR[2:1] pin.

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Chapter 4 Configuration Options

SMSC’s USB 2.0 hub is fully compliant with the USB Specification [1]. Refer to Chapter 10 (Hub

Specification) for general details regarding hub operation and functionality.

The hub provides one Transaction Translator (TT) that is shared by both downstream ports (defined

as Single-TT configuration). The TT contains 4 non-periodic buffers.

4.1

Hub Configuration

The USB2422 only supports internal defaults with the exception of the non-removable strap option

(using NON_REM[1:0]). The hub internal default settings are as follows:



Internal Default Configuration without over-rides

Strap options enabled

Self-powered operation enabled

Individual power switching

Individual over-current sensing

Table 4.1 Hub Configuration Options

DESCRIPTION

CFG_SEL

0

Default configuration:



Strap options enabled

Hub descriptors indicate the hub as “self-powered”



1

The hub is configured externally over SMBus (as an SMBus

slave device with address 0101100b):



Strap options disabled



Self-powered or bus-powered depending on register

settings



All registers configured over SMBus

4.2

Resets

There are two device resets: a hardware reset via RESET_N, and a USB Bus Reset.

4.2.1

External Hardware RESET_N

A valid hardware reset is defined as assertion of RESET_N for a minimum of 1 μs after all power

supplies are within operating range. While reset is asserted, the hub (and its associated external

circuitry) consumes less than 500 μA of current from the upstream USB power source.

Assertion of RESET_N causes the following:

1. All downstream ports are disabled.

2. The PRTPWR power to downstream devices is turned on when battery charging is enabled for a

specific port, and removed when battery charging is disabled for a specific port.

3. The PHYs are disabled, and the differential pairs will be in a high-impedance state.

4. All transactions immediately terminate; no states are saved.

5. All internal registers return to the default state (in most cases, 00h).

6. The external crystal oscillator is halted.

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7. The PLL is halted.

4.2.1.1

Hub Configuration Timing for Strapping Option

Drive Strap

Attach

Hardware

reset asserted

Read

NON_REM[1:0]

Outputs to

inactive levels Upstream

USB

Debounce

Interval

Start completion

request response

Idle

t7

t8

t1

t2

t3

t6

t5

RESET_N

VSS

t4

NON_REM[1:0]

Don’t Care

Valid

Driven by Hub if strap is an output

Don’t Care

VSS

Figure 4.1 Hub Configuration Timing

Table 4.2 Hub Configuration Timing

NAME

DESCRIPTION

MIN

TYP

MAX

UNITS

t1

t2

t3

t4

t5

t6

t7

t8

RESET_N asserted

1

μsec

nsec

μsec

msec

Strap setup time

16.7

Strap hold time

1400

2

Hub outputs driven to inactive logic states

USB attach (See Note)

Host acknowledges attach and signals USB reset

USB idle

1.5

3

100

undefined

Completion time for requests (with or without data

stage)

5

Note: All power supplies must have reached the operating levels mandated in Chapter 5, DC

Parameters, prior to (or coincident with) the assertion of RESET_N.

4.2.2

USB Bus Reset

In response to the upstream port signaling a reset to the hub, the hub does the following:

1. Sets default address to 0.

2. Sets configuration to unconfigured.

3. The PRTPWR power to downstream devices is turned on when battery charging is enabled for a

specific port, and removed when battery charging is disabled for a specific port.

4. Clears all TT buffers.

5. Moves device from suspended to active (if suspended).

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6. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset

sequence. The host then configures the hub and the hub’s downstream port devices in accordance

with the specification.

The hub does not propagate the upstream USB reset to downstream devices.

4.3

SMBus

The SMSC hub can be configured by an external processor via an SMBus interface (see Table 4.1 for

details on enabling the SMBus interface). The SMSC hub waits indefinitely for the SMBus code load

to complete and only appears as a newly connected device on USB after the code load is complete.

The hub’s SMBus acts as a slave-only SMBus device. The implementation only supports block write

(Section 4.3.2.1) and block read (Section 4.3.2.2) protocols. Reference the System Management Bus

Specification [2] for additional information.

Refer to Section 4.4, "SMBus Registers," on page 24 for details on all SMBus accessible registers.

4.3.1

4.3.2

SMBus Slave Address

The 7-bit slave address is 0101100b. The hub will not respond to the general call address of 0000000b.

Protocol Implementation

Typical block write and block read protocols are shown in figures 4.2 and 4.3. Register accesses are

performed using 7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The

shading shown in the figures during a read or write indicates the hub is driving data on the SMBDATA

line; otherwise, host data is on the SMBDATA line.

The SMBus slave address assigned to the hub (0101100b) allows it to be identified on the SMBus.

The register address field is the internal address of the register to be accessed. The register data field

is the data that the host is attempting to write to the register or the contents of the register that the

host is attempting to read.

Note: Data bytes are transferred MSB first.

4.3.2.1

Block Write/Read

The block write begins with a slave address and a write condition. After the command code, the host

issues a byte count which describes how many more bytes will follow in the message. If a slave had

20 bytes to send, the first byte would be the number 20 (14h), followed by the 20 bytes of data. The

byte count may not be zero. A block write or read allows a transfer maximum of 32 data bytes.

Note: For the following SMBus tables:

Denotes Master-to-Slave

Denotes Slave-to-Master

1

7

1

8

1

S

Slave Address

Wr

A

Register Address

A

...

8

1

8

1

8

1

8

1

Byte Count = N

A

Data byte 1

A

Data byte 2

A

Data byte N

A

P

Figure 4.2 Block Write

4.3.2.2

Block Read

A block read differs from a block write in that the repeated start condition exists to satisfy the SMBus

specification’s requirement for a change in the transfer direction.

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1

7

1

8

1

7

1

S

Slave Address Wr

A

Register Address

A

S

Slave Address Rd

A

...

8

1

8

1

8

1

8

1

Byte Count = N

A

Data byte 1

A

Data byte 2

A

Data byte N

A

P

Figure 4.3 Block Read

Invalid Protocol Response Behavior

4.3.2.3

Note that any attempt to update registers with an invalid protocol will not be updated. The only valid

protocols are write block and read block (described above), where the hub only responds to the 7-bit

hardware selected slave address (0101100b).

4.3.3

Slave Device Timeout

Devices in a transfer can abort the transfer in progress and release the bus when any single clock low

interval exceeds 25 ms (T_{TIMEOUT, MIN}). The master must detect this condition and generate a stop

condition within or after the transfer of the interrupted data byte. Slave devices must reset their

communication and be able to receive a new START condition no later than 35 ms (T_{TIMEOUT, MAX}).

Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically

resets its communications port after a start or stop condition. The slave device timeout must

be implemented.

4.3.4

4.3.5

4.3.6

4.3.7

Stretching the SCLK Signal

The hub supports stretching of the SCLK by other devices on the SMBus. However, the hub does not

stretch the SCLK.

SMBus Timing

The SMBus slave interface complies with the SMBus Specification Revision 1.0 [2]. See Section 2.1,

AC Specifications on page 3 for more information.

Bus Reset Sequence

The SMBus slave interface resets and returns to the idle state upon a START condition followed

immediately by a STOP condition.

SMBus Alert Response Address

The SMBALERT# signal is not supported by the hub.

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4.4

SMBus Registers

This section details the device SMBus registers.

Note: Internal Default ROM values are not visible to THE SMBus interface and cannot be read. When

the hub is configured for SMBus register load, the entire register set must be written.

Table 4.3 Internal Default and SMBus Register Memory Map

INTERNAL

DEFAULT

ROM

SMBUS &

EEPROM

DEFAULT

REG.

ADDRESS TYPE

REGISTER NAME

00h

01h

02h

03h

04h

05h

06h

07h

08h

09h

0Ah

0Bh

0Ch

0Dh

0Eh

R/W

Vendor ID Least Significant Bit Register (VIDL)

Vendor ID Most Significant Bit Register (VIDM)

Product ID Least Significant Bit Register (PIDL)

Product ID Most Significant Bit Register (PIDM)

Device ID Least Significant Bit Register (DIDL)

Device ID Most Significant Bit Register (DIDM)

Configuration Data Byte 1 Register (CFG1)

24h

04h

22h

24h

A0h

00h

8Bh

20h

02h

00h

01h

32h

01h

00h

Configuration Data Byte 2 Register (CFG2)

Configuration Data Byte 3 Register (CFG3)

Non-Removable Device Register (NRD)

Port Disable for Self-Powered Operation Register (PDS)

Port Disable for Bus-Powered Operation Register (PDB)

Max Power for Self-Powered Operation Register (MAXPS)

Max Power for Bus-Powered Operation Register (MAXPB)

Hub Controller Max Current for Self-Powered Operation Register

(HCMCS)

0Fh

R/W

Hub Controller Max Power for Bus-Powered Operation Register

(HCMCB)

32h

00h

10h

11h

R/W

-

Power-On Time Register (PWRT)

Language ID High Register (LANGIDH)

Language ID Low Register (LANGIDL)

Manufacturer String Length Register (MFRSL)

Product String Length Register (PRDSL)

Serial String Length Register (SERSL)

Manufacturer String Registers (MANSTR)

Product String Registers (PRDSTR)

Serial String Registers (SERSTR)

Battery Charging Enable Register (BC_EN)

RESERVED

32h

00h

-

00h

-

12h

13h

14h

15h

16h-53h

54h-91h

92h-CFh

D0h

E0h-F5h

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Table 4.3 Internal Default and SMBus Register Memory Map (continued)

INTERNAL

SMBUS &

EEPROM

DEFAULT

REG.

DEFAULT

ROM

ADDRESS TYPE

REGISTER NAME

Boost Upstream Register (BOOSTUP)

F6h

F7h

R/W

-

00h

-

00h

-

RESERVED

F8h

R/W

-

Boost Downstream Register (BOOST40)

RESERVED

00h

-

00h

-

F9h

FAh

R/W

-

Port Swap Register (PRTSP)

Port 1/2 Remap Register (PRTR12)

RESERVED

00h

-

00h

-

FBh

FCh-FEh

FFh

R/W

Status/Command Register (STCD)

00h

4.4.1

Vendor ID Least Significant Bit Register (VIDL)

Offset:

00h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Least Significant Byte of the Vendor ID (VID_LSB)

R/W

00h

This is a 16-bit value that uniquely identifies the Vendor of the user device

(assigned by USB-Interface Forum). This field is set by the OEM using the

SMBus interface option.

4.4.2

Vendor ID Most Significant Bit Register (VIDM)

Address:

01h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Most Significant Byte of the Vendor ID (VID_LSB)

R/W

00h

This is a 16-bit value that uniquely identifies the Vendor of the user device

(assigned by USB-Interface Forum). This field is set by the OEM using the

SMBus interface options.

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4.4.3

Product ID Least Significant Bit Register (PIDL)

Address:

02h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Least Significant Byte of the Product ID (PID_LSB)

R/W

00h

This is a 16-bit value that the Vendor can assign that uniquely identifies this

particular product (assigned by OEM). This field is set by the OEM using the

SMBus interface options.

4.4.4

Product ID Most Significant Bit Register (PIDM)

Address:

03h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Most Significant Byte of the Product ID (PID_LSB)

R/W

00h

This is a 16-bit value that the Vendor can assign that uniquely identifies this

particular product (assigned by OEM). This field is set by the OEM using

either SMBus interface options.

4.4.5

Device ID Least Significant Bit Register (DIDL)

Address:

04h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Least Significant Byte of the Device ID (DID_LSB)

This is a 16-bit device release number in BCD format (assigned by OEM).

This field is set by the OEM using either the SMBus interface options.

R/W

00h

4.4.6

Device ID Most Significant Bit Register (DIDM)

Address:

05h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Most Significant Byte of the Device ID (DID_LSB)

This is a 16-bit device release number in BCD format (assigned by OEM).

This field is set by the OEM using the SMBus interface options.

R/W

00h

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4.4.7

Configuration Data Byte 1 Register (CFG1)

Address:

06h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7

Self or Bus Power (SELF_BUS_PWR)

Selects between Self- and Bus-Powered operation.

R/W

0b

The Hub is either Self-Powered (draws less than 2mA of upstream bus

power) or Bus-Powered (limited to a 100mA maximum of upstream power

prior to being configured by the host controller).

When configured as a Bus-Powered device, the Hub consumes less than

100mA of current prior to being configured. After configuration, the Bus-

Powered Hub (along with all associated hub circuitry, any embedded

devices if part of a compound device, and 100mA per externally available

downstream port) must consume no more than 500mA of upstream VBUS

current. The current consumption is system dependent, and the OEM must

ensure that the USB2.0 specifications are not violated.

When configured as a Self-Powered device, <1mA of upstream VBUS

current is consumed and all ports are available, with each port being

capable of sourcing 500mA of current.

This field is set by the OEM using the SMBus interface option.

Please see the description under Dynamic Power for the self/bus power

functionality when dynamic power switching is enabled.

0 = Bus-Powered operation

1 = Self-Powered operation

Note:

If Dynamic Power Switching is enabled, this bit is ignored and the

LOCAL_PWR pin is used to determine if the hub is operating from

self or bus power.

6

5

RESERVED

-

High Speed Disable (HS_DISABLE)

Disables the capability to attach as either a High/Full- speed device, and

forces attachment as Full-speed only i.e. (no High-Speed support).

R/W

0b

0 = High-/Full-Speed

1 = Full-Speed-Only (High-Speed disabled)

4

Multi-TT Enable (MTT_ENABLE)

Enables one transaction translator per port operation.

R/W

0b

Selects between a mode where only one transaction translator is available

for all ports (Single-TT), or each port gets a dedicated transaction translator

(Multi-TT)

Note:

The host may force Single-TT mode only

0 = Single TT for all ports. Default to STT if MTT still exists

1 = One TT per port (multiple TT’s supported)

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BITS

DESCRIPTION

EOP Disable (EOP_DISABLE)

TYPE

DEFAULT

3

R/W

0b

Disables EOP generation of EOF1 when in Full-Speed mode. During FS

operation only, this permits the Hub to send EOP if no downstream traffic is

detected at EOF1. See Section 11.3.1 of the USB 2.0 Specification for

additional details.

Note:

generation of an EOP at the EOF1 point may prevent a Host

controller (operating in FS mode) from placing the USB bus in

suspend.

0 = An EOP is generated at the EOF1 point if no traffic is detected

1 = EOP generation at EOF1 is disabled (Note: This is normal USB

operation)

Note:

This is a rarely used feature in the PC environment. It is included

because it is a permitted feature in Chapter 11 of the USB

specification.

2:1

Over Current Sense (CURRENT_SNS)

R/W

00b

Selects current sensing on a port-by-port basis, all ports ganged, or none

(only for bus-powered hubs) The ability to support current sensing on a port

or ganged basis is hardware implementation dependent.

00 = Ganged sensing (all ports together)

01 = Individual port-by-port

1x = Over current sensing not supported (Must only be used with Bus-

Powered configurations)

0

Port Power Switching (PORT_PWR)

R/W

0b

Enables power switching on all ports simultaneously (ganged), or port power

is individually switched on and off on a port- by-port basis (individual). The

ability to support power enabling on a port or ganged basis is hardware

implementation dependent.

0 = Ganged switching (all ports together)

1 = Individual port-by-port switching

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4.4.8

Configuration Data Byte 2 Register (CFG2)

Address:

07h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7

Dynamic Power Enable (DYNAMIC)

R/W

0b

Controls the ability of the Hub to automatically change from Self-Powered

operation to Bus- Powered operation if the local power source is removed

or is unavailable (and from Bus-Powered to Self-Powered if the local power

source is restored).

Note:

If the local power source is available, the Hub will always switch to

Self-Powered operation.

When Dynamic Power switching is enabled, the Hub detects the availability

of a local power source by monitoring the external LOCAL_PWR pin. If the

Hub detects a change in power source availability, the Hub immediately

disconnects and removes power from all downstream devices and

disconnects the upstream port. The Hub will then re-attach to the upstream

port as either a Bus-Powered Hub (if local-power is unavailable) or a Self-

Powered Hub (if local power is available).

0 = No Dynamic auto-switching

(pin becomes SUSP_IND) and the hub controller will utilize the inverse of

the SELF_BUS_PWR bit for 'Hub_Status_Field' bit '0' (local power source)

1 = Dynamic Auto-switching capable

(pin becomes LOCAL_PWR) and the hub controller will utilize the

LOCAL_PWR pin for 'Hub_Status_Field' bit '0' (local power source)

6

RESERVED

-

5:4

Over Current Timer Delay (OC_TIMER)

R/W

00b

00 = 0.1ms

01 = 4ms

10 = 8ms

11 = 16ms

3

Compound Device (COMPOUND)

R/W

0b

Allows the OEM to indicate that the Hub is part of a compound (see the USB

Specification for definition) device. The applicable port(s) must also be

defined as having a “Non-Removable Device”.

Note:

When configured via strapping options, declaring a port as non-

removable automatically causes the hub controller to report that it

is part of a compound device.

0 = No

1 = Yes, Hub is part of a compound device

2:0

RESERVED

-

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4.4.9

Configuration Data Byte 3 Register (CFG3)

Address:

08h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:4

3

RESERVED

Port Remapping Enable (PRTMAP_EN)

Selects the method used by the hub to assign port numbers and disable

ports

-

R/W

0b

0 = Standard Mode

Strap options or the following registers are used to define which ports are

enabled, and the ports are mapped as Port'n' on the hub is reported as

Port'n' to the host, unless one of the ports is disabled, then the higher

numbered ports are remapped in order to report contiguous port numbers to

the host.

Register 0Ah: Port Disable For Self Powered Operation (Reset = 0x00)

Register 0Bh: Port Disable For Bus Powered Operation (Reset = 0x00).

1 = Port Re-Map mode

The mode enables remapping via Register FBh: Port Remap 12

2:1

0

RESERVED

-

String Enable (STRING_EN)

Enables string descriptor support.

R/W

0b

0 = String support disabled

1 = String support enabled

4.4.10

Non-Removable Device Register (NRD)

Address:

09h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Non-Removable Device (NR_DEVICE)

Indicates which port(s) include non- removable devices.

R/W

00h

0 = port is removable

1 = port is non- removable

Informs the Host if one of the active physical ports has a permanent device

that is undetachable from the Hub.

Note:

The device must provide its own descriptor data.

When using the internal default option, the NON_REM[1:0] pins will

designate the appropriate ports as being non- removable.

Bit 7= Reserved

Bit 6= Reserved

Bit 5= Reserved

Bit 4= Reserved

Bit 3= Reserved

Bit 2= Port 2 non-removable

Bit 1= Port 1 non removable

Bit 0= Reserved

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4.4.11

Port Disable for Self-Powered Operation Register (PDS)

Address:

0Ah

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Port Disable Self-Powered (PORT_DIS_SP)

Disables 1 or more ports.

R/W

00h

0 = port is available

1 = port is disabled

During Self-Powered operation, when PRTMAP_EN = '0', this selects the

ports which will be permanently disabled, and are not available to be

enabled or enumerated by a Host Controller. The ports can be disabled in

any order, the internal logic will automatically report the correct number of

enabled ports to the USB Host, and will reorder the active ports in order to

ensure proper function.

When using the internal default option, the PRT_DIS[1:0] pins will disable

the appropriate ports.

Bit 7= Reserved

Bit 6= Reserved

Bit 5= Reserved

Bit 4= Reserved

Bit 3= Reserved

Bit 2= Port 2 Disable

Bit 1= Port 1 Disable

Bit 0= Reserved

4.4.12

Port Disable for Bus-Powered Operation Register (PDB)

Address:

0Bh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Port Disable Bus-Powered (PORT_DIS_BP)

Disables 1 or more ports.

R/W

00h

0 = port is available

1 = port is disabled

During Bus-Powered operation, when PRTMAP_EN = '0', this selects the

ports which will be permanently disabled, and are not available to be

enabled or enumerated by a Host Controller. The ports can be disabled in

any order, the internal logic will automatically report the correct number of

enabled ports to the USB Host, and will reorder the active ports in order to

ensure proper function.

When using the internal default option, the PRT_DIS[1:0] pins will disable

the appropriate ports.

Bit 7= Reserved

Bit 6= Reserved

Bit 5= Reserved

Bit 4= Reserved

Bit 3= Reserved

Bit 2= Port 2 Disable

Bit 1= Port 1 Disable

Bit 0= Reserved

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4.4.13

Max Power for Self-Powered Operation Register (MAXPS)

Address:

0Ch

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Max Power Self-Powered (MAX_PWR_SP)

R/W

00h

Value in 2mA increments that the Hub consumes from an upstream port

(VBUS) when operating as a self-powered hub. This value includes the hub

silicon along with the combined power consumption (from VBUS) of all

associated circuitry on the board. This value also includes the power

consumption of a permanently attached peripheral if the hub is configured

as a compound device, and the embedded peripheral reports 0mA in its

descriptors.

Note:

The USB2.0 Specification does not permit this value to exceed

100mA.

4.4.14

Max Power for Bus-Powered Operation Register (MAXPB)

Address:

0Dh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Max Power Bus-Powered (MAX_PWR_BP)

R/W

00h

Value in 2mA increments that the Hub consumes from an upstream port

(VBUS) when operating as a self-powered hub. This value includes the hub

silicon along with the combined power consumption (from VBUS) of all

associated circuitry on the board. This value also includes the power

consumption of a permanently attached peripheral if the hub is configured

as a compound device, and the embedded peripheral reports 0mA in its

descriptors.

4.4.15

Hub Controller Max Current for Self-Powered Operation Register

(HCMCS)

Address:

0Eh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Hub Controller Max Current Self-Powered (HC_MAX_C_SP)

R/W

00h

Value in 2mA increments that the Hub consumes from an upstream port

(VBUS) when operating as a self- powered hub. This value includes the hub

silicon along with the combined power consumption (from VBUS) of all

associated circuitry on the board. This value does NOT include the power

consumption of a permanently attached peripheral if the hub is configured

as a compound device.

Note:

The USB2.0 Specification does not permit this value to exceed

100mA.

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4.4.16

Hub Controller Max Power for Bus-Powered Operation Register

(HCMCB)

Address:

0Fh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Hub Controller Max Power Bus-Powered (MAX_PWR_BP)

R/W

00h

Value in 2mA increments that the Hub consumes from an upstream port

(VBUS) when operating as a bus- powered hub. This value will include the

hub silicon along with the combined power consumption (from VBUS) of all

associated circuitry on the board. This value will NOT include the power

consumption of a permanently attached peripheral if the hub is configured

as a compound device.

4.4.17

Power-On Time Register (PWRT)

Address:

10h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Power-On Time (POWER_ON_TIME)

R/W

00h

The length of time that is takes (in 2 ms intervals) from the time the host

initiated power-on sequence begins on a port until power is good on that

port. System software uses this value to determine how long to wait before

accessing a powered-on port.

4.4.18

Language ID High Register (LANGIDH)

Address:

11h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

USB Language ID High (LANG_ID_H)

Upper 8 bits of the 16-bit language ID field.

R/W

00h

4.4.19

Language ID Low Register (LANGIDL)

Address:

12h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

USB Language ID Low (LANG_ID_L)

Lower 8 bits of the 16-bit language ID field.

R/W

00h

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4.4.20

Manufacturer String Length Register (MFRSL)

Address:

13h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Manufacturer String Length (MFR_STR_LEN)

Maximum string length is 31 characters.

R/W

00h

4.4.21

Product String Length Register (PRDSL)

Address:

14h

Size:

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Product String Length (PRD_STR_LEN)

Maximum string length is 31 characters.

R/W

00h

4.4.22

Serial String Length Register (SERSL)

Address:

15h

Size:

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Serial String Length (SER_STR_LEN)

Maximum string length is 31 characters.

R/W

00h

4.4.23

Manufacturer String Registers (MANSTR)

Address:

16h-53h

Size:

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Manufacturer String (MFR_STR)

R/W

00h

UNICODE UTF-16LE per USB 2.0 Specification.

Maximum string length is 31 characters (62 Bytes).

Note:

The String consists of individual 16 Bit UNICODE UTF-16LE

characters. The Characters will be stored starting with the LSB at

the least significant address and the MSB at the next 8-bit location

(subsequent characters must be stored in sequential contiguous

address in the same LSB, MSB manner).

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4.4.24

Product String Registers (PRDSTR)

Address:

54h-91h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Product String (PRD_STR)

R/W

00h

UNICODE UTF-16LE per USB 2.0 Specification.

Maximum string length is 31 characters (62 Bytes).

Note: The String consists of individual 16 Bit UNICODE UTF-16LE

characters. The Characters will be stored starting with the LSB at

the least significant address and the MSB at the next 8-bit location

(subsequent characters must be stored in sequential contiguous

address in the same LSB, MSB manner).

4.4.25

Serial String Registers (SERSTR)

Address:

92h-CFh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Serial String (SER_STR)

R/W

00h

UNICODE UTF-16LE per USB 2.0 Specification.

Maximum string length is 31 characters (62 Bytes).

Note: The String consists of individual 16 Bit UNICODE UTF-16LE

characters. The Characters will be stored starting with the LSB at

the least significant address and the MSB at the next 8-bit location

(subsequent characters must be stored in sequential contiguous

address in the same LSB, MSB manner).

4.4.26

Battery Charging Enable Register (BC_EN)

Address:

D0h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Battery Charging Enable (BC_EN)

Enables the battery charging feature for the corresponding port.

R/W

00h

0 = Battery Charging support is not enabled

1 = Battery charging support is enabled

Bit 7= Reserved

Bit 6= Reserved

Bit 5= Reserved

Bit 4= Reserved

Bit 3= Reserved

Bit 2= Port 2 Battery Charging Enable

Bit 1= Port 1 Battery Charging Enable

Bit 0= Reserved

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4.4.27

Boost Upstream Register (BOOSTUP)

Address:

F6h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:2

1:0

RESERVED

-

Boost Upstream (BOOST_IOUT_A)

USB electrical signaling drive strength Boost Bit for Upstream Port 'A'.

R/W

00b

00 = Normal electrical drive strength

01 = Elevated electrical drive strength (+4% boost)

10 = Elevated electrical drive strength (+8% boost)

11 = Elevated electrical drive strength (+12% boost)

4.4.28

Boost Downstream Register (BOOST40)

Address:

F8h

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:4

3:2

RESERVED

-

Boost Downstream Port 2 (BOOST_IOUT_2)

USB electrical signaling drive strength Boost Bit for Upstream Port '2'.

R/W

00b

00 = Normal electrical drive strength

01 = Elevated electrical drive strength (+4% boost)

10 = Elevated electrical drive strength (+8% boost)

11 = Elevated electrical drive strength (+12% boost)

1:0

Boost Downstream Port 1 (BOOST_IOUT_1)

USB electrical signaling drive strength Boost Bit for Upstream Port '1'.

R/W

00b

00 = Normal electrical drive strength

01 = Elevated electrical drive strength (+4% boost)

10 = Elevated electrical drive strength (+8% boost)

11 = Elevated electrical drive strength (+12% boost)

Revision 1.0 (06-04-13)

SMSC USB2422

DATA³S⁶HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

4.4.29

Port Swap Register (PRTSP)

Address:

FAh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Port Swap (PRTSP)

Swaps the Upstream and Downstream USB DP and DM Pins for ease of

board routing to devices and connectors.

R/W

00h

0 = USB D+ functionality is associated with the DP pin and D-

functionality is associated with the DM pin.

1 = USB D+ functionality is associated with the DM pin and D-

functionality is associated with the DP pin

Bit 7= Reserved

Bit 6= Reserved

Bit 5= Reserved

Bit 4= Reserved

Bit 3= Reserved

Bit 2= Port 2 DP/DM Swap

Bit 1= Port 1 DP/DM Swap

Bit 0= Upstream Port DP/DM Swap

SMSC USB2422

Revision 1.0 (06-04-13)

DATA³S⁷HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

4.4.30

Port 1/2 Remap Register (PRTR12)

Address:

FBh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:0

Port 1/2 Remap (PRTR12)

R/W

00h

When a hub is enumerated by a USB Host Controller, the hub is only

permitted to report how many ports it has, the hub is not permitted to select

a numerical range or assignment. The Host Controller will number the

downstream ports of the hub starting with the number '1', up to the number

of ports that the hub reported as having.

The host's port number is referred to as “Logical Port Number” and the

physical port on the hub is the “Physical Port Number”. When remapping

mode is enabled (PRTMAP_EN in the Configuration Data Byte 3 Register

(CFG3)), the hub's downstream port numbers can be remapped to different

logical port numbers assigned by the host.

Note:

The OEM must ensure that Contiguous Logical Port Numbers are

used, starting from one up to the maximum number of enabled

ports. This ensures that the hub's ports are numbered in

accordance with the way a Host will communicate with the ports.

Bits[7:4] = 0000 Physical Port 2 is disabled

0001 Physical Port 2 is mapped to Logical Port 1

0010 Physical Port 2 is mapped to Logical Port 2

0011 RESERVED

to

1111

Will default to 0000 value.

Bits[3:0] = 0000 Physical Port 1 is disabled

0001 Physical Port 1 is mapped to Logical Port 1

0010 Physical Port 1 is mapped to Logical Port 2

0011 RESERVED

to

1111

Will default to 0000 value.

Revision 1.0 (06-04-13)

SMSC USB2422

DATA³S⁸HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

4.4.31

Status/Command Register (STCD)

Address:

FFh

Size:

8 bits

BITS

DESCRIPTION

TYPE

DEFAULT

7:3

2

RESERVED

-

SMBus Interface Power Down (INTF_PW_DN)

0 = Interface is active

R/W

0b

1 = Interface power down after ACK has completed

Note: This bit is write once and is only cleared by assertion of the

external RESET_N pin.

1

0

Reset (RESET)

R/W

0b

Resets the SMBus Interface and internal memory back to RESET_N

assertion default settings.

0 = Normal Run/Idle State

1 = Force a reset of the registers to their default state

Note:

During this reset, this bit is automatically cleared to its default value

of 0.

USB Attach and Write Protect (USB_ATTACH)

0 = SMBus slave interface is active

1 = Hub will signal a USB attach event to an upstream device, and the

internal memory that is not Modify capable in the address range 00h-

FEh, is “write-protected” to prevent unintentional data corruption.

Note:

This bit is write once and is only cleared by assertion of the

external RESET_N pin.

SMSC USB2422

Revision 1.0 (06-04-13)

DATA³S⁹HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Chapter 5 DC Parameters

5.1

Maximum Guaranteed Ratings

PARAMETER

SYMBOL

MIN

-55

MAX

150

UNITS

COMMENTS

Storage Temperature

Lead Temperature

T_STOR

°C

Refer to JEDEC Specification

J-STD-020D [3]

3.3 V supply voltage

Voltage on any I/O pin

Voltage on XTALIN

Voltage on XTALOUT

VDD33

4.6

5.5

4.0

2.5

V

-0.5

Note 5.1 Refer to JEDEC Specification J-STD-020D [3].

Note 5.2 Stresses above the specified parameters could cause permanent damage to the device.

This is a stress rating only and functional operation of the device at any condition above

those indicated in the operation sections of this specification is not implied.

Note 5.3 When powering this device from laboratory or system power supplies, it is important that

the absolute maximum ratings not be exceeded or device failure can result. Some power

supplies exhibit voltage spikes on their outputs when the AC power is switched on or off.

In addition, voltage transients on the AC power line may appear on the DC output. When

this possibility exists, it is suggested that a clamp circuit be used.

5.2

Operating Conditions

PARAMETER

SYMBOL

T_A

MIN

MAX

UNITS

COMMENTS

USB2422 Operating

Temperature

0

70

°C

Ambient temperature in still air

USB2422-i Operating

Temperature

T_A

-40

85

°C

Ambient temperature in still air

3.3 V supply voltage

3.3 V supply rise time

Voltage on any I/O pin

VDD33

t_RT33

3.0

0

3.6

400

5.5

V

μs

V

See Figure 5.1

-0.3

If any 3.3 V supply voltage drops

below 3.0 V, then the MAX

becomes:

(3.3 V supply voltage) + 0.5

Voltage on XTALIN

-0.3

VDD12

+ 0.3

V

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁴S⁰HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Voltage

t_RT33

VDD33

3.3 V

100%

90%

10%

VSS

t_90%

Time

t_10%

Figure 5.1 Supply Rise Time Model

Table 5.1 DC Electrical Characteristics

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

COMMENTS

I, IS Type Input Buffer

Low Input Level

High Input Level

Input Leakage

V_ILI

V_IHI

I_IL

0.8

V

TTL Levels

2.0

-10

250

+10

350

μA

mV

V_IN= 0 to VDD33

Hysteresis (IS only)

V_HYSI

Input Buffer with Pull-Up (IPU)

Low Input Level

V_ILI

V_IHI

I_ILL

0.8

V

TTL Levels

High Input Level

Low Input Leakage

High Input Leakage

2.0

+35

-10

+90

+10

μA

V_IN= 0

I_IHL

V_IN= VDD33

Input Buffer with Pull-Down (IPD)

Low Input Level

V_ILI

V_IHI

I_ILL

0.8

V

TTL Levels

High Input Level

Low Input Leakage

High Input Leakage

2.0

+10

-35

-10

-90

μA

V_IN= 0

I_IHL

V_IN= VDD33

ICLK Input Buffer

Low Input Level

High Input Level

Input Leakage

V_ILCK

V_IHCK

I_IL

0.3

V

0.9

-10

+10

μA

V_IN= 0 to VDD33

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁴S¹HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Table 5.1 DC Electrical Characteristics (continued)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

COMMENTS

O12, I/O12 & I/OSD12 Type Buffer

Low Output Level

V_OL

0.4

V

I_OL= 12 mA @

VDD33 = 3.3 V

High Output Level

V_OH

2.4

I_OH= -12 mA @

VDD33 = 3.3 V

Output Leakage

I_OL

-10

+10

350

μA

Hysteresis (SD pad only)

V_HYSC

250

mV

V_IN= VDD33

(Note 5.1)

Supply Current Unconfigured

I_CCINTHS

I_CCINTFS

40

35

45

40

mA

Hi-Speed Host

Supply Current

Hi-Speed Host, each additional

downstream port

Note 5.8

Supply Current

I_HCH1

I_HCH2

I_FCC1

I_FCC2

I_CSBY

47

70

58

89

40

45

mA

Note 5.8

Hi-Speed Host, 1 downstream port

Supply Current

Hi-Speed Host, 2 downstream ports

mA

Supply Current

Full-Speed Host, 1 downstream port

29

Supply Current

Full-Speed Host, 2 downstream ports

35

mA

Supply Current Suspend

Supply Current Reset

425

Note

5.6

μA

I_CRST

300

Note

5.7

μA

Note 5.4 Output leakage is measured with the current pins in high impedance.

Note 5.5 See USB 2.0 Specification [1] for USB DC electrical characteristics.

Note 5.6 1000 μA for commercial temperature part, and 1200 μA for industrial temperature part.

Note 5.7 800 μA for commercial temperature part, and 1000 μA for industrial temperature part.

Note 5.8 Current measured during peak USB traffic and does not reflect the average current draw.

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁴S²HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

5.2.1

Pin Capacitance

Table 5.2 Pin Capacitance

LIMITS

PARAMETER

SYMBOL

MIN

TYP MAX UNIT

TEST CONDITION

Clock Input

Capacitance

C_XTAL

6

pF

All pins except USB pins and the pins

under the test tied to AC ground.

Input Capacitance

C_IN

Capacitance T_A= 25°C

fc = 1 MHz

VDD33 = 3.3 V

Output Capacitance

C_OUT

6

pF

The maximum capacitance values

include the full length of the pin pad.

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁴S³HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Chapter 6 AC Specifications

6.1

Oscillator/Crystal

Parallel Resonant, Fundamental Mode, 24 MHz 350 ppm.

XTALIN

(C_S1= C_B1+ C_XTALIN

)

C₁

Crystal

C_L

C₀

C₂

XTALOUT

(C_S2= C_B2+ C_XTALOUT

)

Figure 6.1 Typical Crystal Circuit

Table 6.1 Crystal Circuit Legend

SYMBOL

DESCRIPTION

IN ACCORDANCE WITH

C₀

Crystal shunt capacitance

Crystal load capacitance

Total board or trace capacitance

Stray capacitance

Crystal manufacturer’s specification (See Note 6.1)

C_L

C_B

OEM board design

SMSC IC and OEM board design

SMSC IC

C_S

C_XTAL

C₁

XTAL pin input capacitance

Load capacitors installed on OEM

board

Calculated values based on Figure 6.2, "Formula to Find the

Value of C1 and C2" (See Note 6.2)

C₂

C₁= 2 x (C_L– C₀) – C_S1

C₂= 2 x (C_L– C₀) – C_S2

Figure 6.2 Formula to Find the Value of C₁and C₂

Note 6.1 C₀is usually included (subtracted by the crystal manufacturer) in the specification for C_L

and should be set to 0 for use in the calculation of the capacitance formulas in Figure 6.2,

"Formula to Find the Value of C1 and C2". However, the PCB itself may present a parasitic

capacitance between XTALIN and XTALOUT. For an accurate calculation of C₁and C_2,

take the parasitic capacitance between traces XTALIN and XTALOUT into account.

Note 6.2 Each of these capacitance values is typically approximately 18 pF.

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁴S⁴HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

6.2

External Clock

50% Duty cycle 10%, 24 MHz 350 ppm.

The external clock is recommended to conform to the signaling level designated in the JESD76-2

specification on 1.2 V CMOS Logic. XTALOUT should be treated as a weak (< 1 mA) buffer output.

6.2.1

USB 2.0

The SMSC hub conforms to all voltage, power, and timing characteristics and specifications as set

forth in the USB 2.0 Specification [1]. See the USB Specification for more information.

6.3

SMBus Interface

The SMSC hub conforms to all voltage, power, and timing characteristics and specifications as set

forth in the SMBus 1.0 Specification [2] for slave-only devices (except as noted in Section 4.3,

"SMBus," on page 22).

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁴S⁵HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Chapter 7 Package Outline

Figure 7.1 24-SQFN Package

Table 7.1 24-SQFN Dimensions

MIN

NOMINAL

MAX

REMARKS

A

A1

D/E

D2/E2

L

b

k

e

0.80

0

0.90

0.02

4.00

2.50

0.40

0.25

0.35

0.50 BSC

1.00

0.05

4.10

2.60

0.45

0.30

-

Overall Package Height

Standoff

X/Y Body Size

X/Y Exposed Pad Size

Terminal Length

3.90

2.40

0.35

0.18

0.25

Terminal Width

Pin to Exposed Pad Clearance

Terminal Pitch

Notes:

1. All dimensions are in millimeters unless otherwise noted.

2. Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip.

3. The pin 1 identifier may vary, but is always located within the zone indicated.

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁴S⁶HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Figure 7.2 Recommended PCB Land Pattern

Figure 7.3 Taping Dimensions and Part Orientation

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁴S⁷HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Figure 7.4 Reel Dimensions

Figure 7.5 Tape Length and Part Quantity

Note: Standard reel size is 4000 pieces per reel.

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁴S⁸HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Chapter 8 Datasheet Revision History

Table 8.1 Customer Revision History

REVISION LEVEL & DATE

SECTION/FIGURE/ENTRY

CORRECTION

Rev. 1.0 (06-04-13)

Initial Revision

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁴S⁹HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Appendix A (Acronyms)

OCS: Over-Current Sense

PCB: Printed Circuit Board

PHY: Physical Layer

PLL: Phase-Locked Loop

SQFN: Sawn Quad Flat No Leads

RoHS: Restriction of Hazardous Substances Directive

SCL: Serial Clock

SIE: Serial Interface Engine

SMBus: System Management Bus

TT: Transaction Translator

Revision 1.0 (06-04-13)

SMSC USB2422

DATA⁵S⁰HEET

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

Appendix B (References)

[1] Universal Serial Bus Specification, Version 2.0, April 27, 2000 (12/7/2000 and 5/28/2002 Errata)

USB Implementers Forum, Inc. http://www.usb.org

[2] System Management Bus Specification, version 1.0

SMBus. http://smbus.org/specs/

[3] JEDEC Specifications: JESD76-2 (June 2001) and J-STD-020D.1 (March 2008)

JEDEC Global Standards for the Microelectronics Industry.http://www.jedec.org/standards-documents

[4] USB Battery Charging Specification, Revision 1.1, April 15, 2009

USB Implementers Forum, Inc. http://www.usb.org

SMSC USB2422

Revision 1.0 (06-04-13)

DATA⁵S¹HEET

型号:	USB2422T-I/MJ
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	MICROCHIP TECHNOLOGY INC
包装说明：	4 X 4 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-220, SQFN-24
Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01
Factory Lead Time：	6 weeks
风险等级：	1.61
总线兼容性：	SMBUS
JESD-30 代码：	S-XQCC-N24
JESD-609代码：	e3
长度：	4 mm
湿度敏感等级：	1
端子数量：	24
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN
封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260
筛选级别：	TS 16949
座面最大高度：	1 mm
最大供电电压：	3.6 V
最小供电电压：	3 V
标称供电电压：	3.3 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	QUAD
处于峰值回流温度下的最长时间：	40
宽度：	4 mm
uPs/uCs/外围集成电路类型：	BUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches：	1

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