VNP20N07各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号VNP20N07的概述

芯片VNP20N07的概述 VNP20N07是一款N沟道功率MOSFET（金属氧化物半导体场效应晶体管），在现代电子电路中广泛用于开关和放大应用。由于其高效能和低导通电阻，VNP20N07在电源管理、驱动电机和其他需要高效能的设备中，展现了优良的性能。其良好的热特性和极高的开关速率使得它成为各种应用领域的一种理想选择，包括消费电子、工业设备和汽车电子等。芯片VNP20N07的详细参数 VNP20N07具有一系列关键参数，供设计人员在选择和应用时参考： - 最大漏极-源极电压（V_DS）：60V - 最大连续漏极电流（I_D）：20A - 最高脉冲漏极电流（I_DM）：45A - 最大功耗（P_D）：94W（在适当的散热条件下） - 栅极-源极电压（V_GS）：±20V - 阈值电压（V_GS(th)）：2V至4V (典型值) - 导通电阻（R_DS(on)）：0.04Ω（在V_GS ...

产品型号VNP20N07的Datasheet PDF文件预览

VNP20N07

”OMNIFET”:

FULLY AUTOPROTECTED POWER MOSFET

TYPE

V_clamp

R_DS(on)

I_lim

VNP20N07

70 V

0.05 Ω

20 A

■

LINEAR CURRENT LIMITATION

THERMAL SHUT DOWN

SHORT CIRCUIT PROTECTION

INTEGRATED CLAMP

LOW CURRENT DRAWN FROM INPUT PIN

DIAGNOSTIC FEEDBACK THROUGH INPUT

■

ESD PROTECTION

DIRECT ACCESS TO THE GATE OF THE

POWER MOSFET (ANALOG DRIVING)

COMPATIBLE WITH STANDARD POWER

MOSFET

TO-220

■

STANDARD TO-220 PACKAGE

DESCRIPTION

current limitation and overvoltage clamp protect

the chip in harsh enviroments.

Fault feedback can be detected by monitoring the

voltage at the input pin.

The VNP20N07 is a monolithic device made

using SGS-THOMSON Vertical Intelligent Power

M0 Technology, intended for replacement of

standard power MOSFETS in DC to 50 KHz

applications. Built-in thermal shut-down, linear

BLOCK DIAGRAM

1/11

April 1996

VNP20N07

ABSOLUTE MAXIMUM RATING

Symbol

V_DS

V_in

Parameter

Value

Internally Clamped

Unit

Drain-source Voltage (V_in= 0)

Input Voltage

I_D

Drain Current

Internally Limited

-28

I_R

Reverse DC Output Current

Electrostatic Discharge (C= 100 pF, R=1.5 KΩ)

Total Dissipation at T_c= 25 ^oC

Operating Junction Temperature

Case Operating Temperature

Storage Temperature

V_esd

P_tot

T_j

2000

^oC

Internally Limited

-55 to 150

T_c

T_{st g}

THERMAL DATA

R_thj-caseThermal Resistance Junction-case

R_thj-ambThermal Resistance Junction-ambient

Max

1.5

62.5

^oC/W

ELECTRICAL CHARACTERISTICS (T_case= 25 ^oC unless otherwise specified)

OFF

Symbol

Parameter

Test Conditions

I_D= 200 mA V_in= 0

Min.

Typ.

Max.

Unit

V_CLAMP

Drain-source Clamp

Voltage

V_CLTH

V_INCL

I_DSS

Drain-source Clamp

Threshold Voltage

I_D= 2 mA V_in= 0

I_in= -1 mA

-1

Input-Source Reverse

Clamp Voltage

-0.3

Zero Input Voltage

Drain Current (V_in= 0) V_DS= 25 V V_in= 0

V_DS= 13 V V_in= 0

200

µA

I_ISS

Supply Current from

Input Pin

V_DS= 0 V V_in= 10 V

250

500

µA

ON ( )

Symbol

Parameter

Test Conditions

V_DS= V_inI_D+ I_in= 1 mA

Min.

Typ.

Max.

Unit

V_IN(th)

Input Threshold

Voltage

0.8

R_DS(on)

Static Drain-source On V_in= 10 V I_D= 10 A

0.05

0.07

Ω

Resistance

V_in= 5 V

I_D= 10 A

DYNAMIC

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

g_fs( )

Forward

V_DS= 13 V

I_D= 10 A

Transconductance

C_oss

Output Capacitance

V_DS= 13 V f = 1 MHz V_in= 0

500

800

2/11

VNP20N07

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING (

)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

t_d(on)

t_r

t_d(off)

t_f

Turn-on Delay Time

Rise Time

Turn-off Delay Time

Fall Time

V_DD= 15 V

V_gen= 10 V

(see figure 3)

I_d= 10 A

R_gen= 10 Ω

180

400

800

300

240

430

150

t_d(on)

t_r

t_d(off)

t_f

Turn-on Delay Time

Rise Time

Turn-off Delay Time

Fall Time

V_DD= 15 V

V_gen= 10 V

(see figure 3)

I_d= 10 A

R_gen= 1000 Ω

800

1.5

1200

2.2

µs

3.5

5.5

(di/dt)_onTurn-on Current Slope V_DD= 15 V

V_in= 10 V

I_D= 10 A

R_gen= 10 Ω

A/µs

Q_i

Total Input Charge

V_DD= 12 V I_D= 10 A V_in= 10 V

SOURCE DRAIN DIODE

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

V_SD( ) Forward On Voltage

I_SD= 10 A V_in= 0

1.6

t_rr(

Q_rr(

I_RRM

)

Reverse Recovery

Time

Reverse Recovery

Charge

Reverse Recovery

Current

I_SD= 10 A

V_DD= 30 V

(see test circuit, figure 5)

di/dt = 100 A/µs

165

0.55

6.5

T_j= 25 ^oC

)

µC

(

)

PROTECTION

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

I_lim

t_dlim

T_jsh

T_jrs

Drain Current Limit

V_in= 10 V V_DS= 13 V

V_in= 5 V

V_DS= 13 V

(

)

Step Response

Current Limit

V_in= 10 V

V_in= 5 V

140

µs

^oC

(

Overtemperature

Shutdown

150

135

(

)

Overtemperature Reset

Fault Sink Current

^oC

I_gf

(

)

V_in= 10 V

V_in= 5 V

E_as

(

)

Single Pulse

Avalanche Energy

starting T_j= 25 ^oC

V_in= 10 V R_gen= 1 KΩ L = 10 mH

V_DD= 20 V

0.95

( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

) Parameters guaranteed by design/characterization

(

3/11

VNP20N07

PROTECTION FEATURES

During normal operation, the Input pin is

electrically connected to the gate of the internal

power MOSFET. The device then behaves like a

standard power MOSFET and can be used as a

switch from DC to 50 KHz. The only difference

from the user’s standpoint is that a small DC

current (I_iss) flows into the Input pin in order to

supply the internal circuitry.

- OVERTEMPERATURE AND SHORT CIRCUIT

PROTECTION: these are based on sensing

the chip temperatureand are not dependent on

the input voltage. The location of the sensing

element on the chip in the power stage area

ensures fast, accurate detection of the junction

temperature. Overtemperature cutout occurs at

minimum 150^oC. The device is automatically

restarted when the chip temperature falls

below 135^oC.

The device integrates:

- OVERVOLTAGE CLAMP PROTECTION:

internally set at 70V, along with the rugged

avalanche characteristics of the Power

MOSFET stage give this device unrivalled

ruggedness and energy handling capability.

This feature is mainly important when driving

inductiveloads.

- STATUS FEEDBACK: In the case of an

overtemperature fault condition,

a Status

Feedback is provided through the Input pin.

The internal protection circuit disconnects the

input from the gate and connects it instead to

ground via an equivalent resistance of 100 Ω.

The failure can be detected by monitoring the

voltage at the Input pin, which will be close to

ground potential.

- LINEAR CURRENT LIMITER CIRCUIT: limits

the drain current Id to Ilim whatever the Input

pin voltage. When the current limiter is active,

the device operates in the linear region, so

power dissipation may exceed the capability of

the heatsink. Both case and junction

temperatures increase, and if this phase lasts

long enough, junction temperature may reach

Additional features of this device are ESD

protection according to the Human Body model

and the ability to be driven from a TTL Logic

circuit (with a small increase in R_DS(on)).

the overtemperaturethreshold T_jsh

4/11

VNP20N07

Thermal Impedance

Derating Curve

Output Characteristics

Transconductance

Static Drain-Source On Resistance vs Input

Voltage

Static Drain-Source On Resistance

5/11

VNP20N07

Static Drain-Source On Resistance

Input Charge vs Input Voltage

Capacitance Variations

Normalized Input Threshold Voltage vs

Temperature

Normalized On Resistance vs Temperature

6/11

VNP20N07

Turn-on Current Slope

Turn-off Drain-Source Voltage Slope

Switching Time Resistive Load

7/11

VNP20N07

Switching Time Resistive Load

Current Limit vs Junction Temperature

Step Response Current Limit

Source Drain Diode Forward Characteristics

8/11

VNP20N07

Fig. 1: Unclamped Inductive Load Test Circuits

Fig. 2: Unclamped Inductive Waveforms

Fig. 3: Switching Times Test Circuits For

Fig. 4: Input Charge Test Circuit

Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching

Fig. 6: Waveforms

And Diode Recovery Times

9/11

VNP20N07

TO-220 MECHANICAL DATA

inch

TYP.

DIM.

MIN.

4.40

1.23

2.40

TYP.

MAX.

4.60

1.32

2.72

MIN.

0.173

0.048

0.094

MAX.

0.181

0.051

0.107

1.27

0.050

0.49

0.61

1.14

4.95

2.4

0.70

0.88

1.70

5.15

2.7

0.019

0.024

0.044

0.194

0.094

0.393

0.027

0.034

0.067

0.203

0.106

0.409

DIA.

10.0

10.40

16.4

0.645

13.0

2.65

15.25

6.2

14.0

2.95

15.75

6.6

0.511

0.104

0.600

0.244

0.137

0.147

0.551

0.116

0.620

0.260

0.154

0.151

3.5

3.93

3.85

3.75

Dia.

P011C

10/11

VNP20N07

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the

consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No

license is granted by implication or otherwise underany patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned

in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.

SGS-THOMSON Microelectronics productsare notauthorized for use as criticalcomponents in life supportdevices or systems withoutexpress

written approval of SGS-THOMSON Microelectonics.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia- Brazil - Canada - China - France - Germany - Hong Kong - Italy- Japan- Korea - Malaysia- Malta- Morocco - TheNetherlands -

Singapore - Spain- Sweden- Switzerland - Taiwan - Thailand - United Kingdom - U.S.A

11/11

VNP20N07相关文章

配单直通车

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VNP20N07产品参数

型号:	VNP20N07
Brand Name：	STMicroelectronics
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	STMICROELECTRONICS
零件包装代码：	SFM
包装说明：	TO-220, 3 PIN
针数：	3
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	2.24
内置保护：	TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL
接口集成电路类型：	BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码：	R-PSFM-T3
JESD-609代码：	e3
功能数量：	1
端子数量：	3
输出电流流向：	SINK
标称输出峰值电流：	20 A
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
表面贴装：	NO
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
断开时间：	10 µs
接通时间：	1.2 µs
Base Number Matches：	1

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