VNQ5050KTR-E全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

当前位置：IC37首页_>V字母起始型号索引_>V字母起始型号索引第268页更新时间：2024-10-25 17:35:56

产品型号VNQ5050KTR-E的概述

VNQ5050KTR-E芯片概述 VNQ5050KTR-E是一款高性能的N-channel MOSFET驱动器，广泛应用于汽车、消费电子、工业自动化等领域中的各种电子设备。该芯片具备强大的负载驱动能力和高度集成的特性，能够有效地满足复杂电源管理系统的需求。 VNQ5050KTR-E的设计注重于高效能和可靠性，提供了出色的低导通电阻和快速开关速率，使其能够在各种操作条件下保持高效运行。这种芯片不仅适用于负载切换，还适合用于电源转换、功率分配和信号调理等应用场合。芯片详细参数 VNQ5050KTR-E的主要技术参数如下： - 工作电压范围：14V - 36V - 导通电阻：通常为50毫欧，最大值可达70毫欧 - 最大输出电流：可达50A - 工作温度范围：-40℃ 至 +150℃ - 输入控制电压：高电平（Vth）为2.0V，低电平（Vtl）为0.8V - 开关频率：支持高达1MHz的开...

产品型号VNQ5050KTR-E的Datasheet PDF文件预览

VNQ5050K-E

QUAD CHANNEL HIGH SIDE DRIVER

FOR AUTOMOTIVE APPLICATIONS

ADVANCE DATA

Table 1. General Features

Figure 1. Package

TYPE

DS(on)

out

(*)

VNQ5050K-E

41V

12A

50mΩ

(*) Per channel

^ꢀOUTPUT CURRENT: 12A

ꢀ 3.0 V CMOS COMPATIBLE INPUT

ꢀ STATUS DISABLE

ꢀ ON STATE OPEN LOAD DETECTION

ꢀ OFF STATE OPEN LOAD DETECTION

ꢀ OUTPUT STUCK TO V

DETECTION

ꢀ OPEN DRAIN STATUS OUTPUT

ꢀ UNDERVOLTAGE SHUT-DOWN

PowerSSO-24

ꢀ OVERVOLTAGE CLAMP

ꢀ THERMAL SHUT DOWN

ꢀ CURRENT AND POWER LIMITATION

ꢀ VERY LOW STAND-BY CURRENT

ꢀ PROTECTION AGAINST LOSS OF GROUND

AND LOSS OF V

ꢀ VERY LOW ELECTROMAGNETIC

SUSCEPTIBILITY

ꢀ OPTIMIZED ELECTROMAGNETIC EMISSION

ꢀ REVERSE BATTERY PROTECTION (**)

The device detects open load condition both in on

and off state, when STAT_DIS is left open or

ꢀꢀ IN COMPLIANCE WITH THE 2002/95/EC

driven low. Output shorted to V

the off state.

is detected in

EUROPEAN DIRECTIVE

When STAT_DIS is driven high, the STATUS pin

is in a high impedance condition.

DESCRIPTION

Output current limitation protects the device in

overload condition. In case of long duration over-

load, the device limits the dissipated power to safe

level up to thermal shut-down intervention. . Ther-

mal shut-down with automatic restart allows the

device to recover normal operation as soon as

fault condition disappears.

The VNQ5050K-E is a monolithic device made

using STMicroelectronics VIPower technology. It

is intended for driving resistive or inductive loads

with one side connected to ground. Active V pin

voltage clamp protects the device against low

energy

spikes

(see

ISO7637

transient

compatibility table).

Table 2. Order Codes

Package

Tube

VNQ5050K-E

Tape and Reel

PowerSSO-24

VNQ5050KTR-E

Note: (**) See application schematic at page 9.

Rev. 2

March 2005

1/13

This is preliminary information on a new product now in development. Details are subject to change without notice.

VNQ5050K-E

Figure 2. Block Diagram

OUTPUT1

V_CC

CLAMP

UNDERVOLTAGE

CLAMP 1

GND

INPUT1

INPUT2

STATUS1

STAT_DIS

CONTROL & PROTECTION

EQUIVALENT TO

CHANNEL1

STATUS2

OUTPUT2

OUTPUT3

OUTPUT4

DRIVER 1

LOGIC

OVERTEMP. 1

INPUT2

CURRENT LIMITER 1

OPENLOAD ON 1

INPUT3

CONTROL & PROTECTION

EQUIVALENT TO

CHANNEL1

STATUS2

INPUT3

STATUS3

INPUT4

OPENLOAD OFF 1

INPUT4

CONTROL & PROTECTION

EQUIVALENT TO

CHANNEL1

STATUS4

PWR

LIM

STATUS4

Table 3. Pin Function

Name

Function

Battery connection

Power output

OUTPUTn

GND

Ground connection. Must be reverse battery protected by an external diode/resistor network

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state

Open drain digital diagnostic pin

INPUTn

STATUSn

STAT_DIS

Active high CMOS compatible pin, to disable the STATUS pin

Figure 3. Current and Voltage Conventions

V_CC

(*)

OUTn

STAT_DIS

INPUTn

OUTPUTn

STATUSn

OUTn

INn

STATn

INn

STATn

GND

(*) V = V - V

during reverse battery condition

OUTn

2/13

VNQ5050K-E

Figure 4. Configuration Diagram (Top View) & Suggested Connections For Unused and n.c. Pins

GND

OUTPUT1

OUTPUT2

OUTPUT3

OUTPUT4

INPUT1

STATUS1

INPUT2

STATUS2

INPUT3

STATUS3

INPUT4

STATUS4

STAT_DIS

TAB = V

Connection / Pin Status N.C. Output

Input

Floating

To Ground

Through 10KΩ resistor

Table 4. Absolute Maximum Ratings

Symbol

Parameter

Value

Unit

DC Supply Voltage

- 0.3

- V

Reverse DC Supply Voltage

GND

OUT

- I

DC Reverse Ground Pin Current

DC Output Current

- 200

Internally Limited

- 15

- I

Reverse DC Output Current

DC Input Current

OUT

+10/-1

DC Status Current

+10/-1

STAT

ESD

Electrostatic discharge (R=1.5kΩ; C=100pF)

Junction Operating Temperature

Storage Temperature

2000

-40 to 150

- 55 to 150

°C

stg

Table 5. Thermal Data

Symbol

Parameter

Value

Unit

°C/W

thj-case

Thermal Resistance Junction-case

Thermal Resistance Junction-ambient

1.7

(1)

thj-amb

Note: 1. When mounted on a standard single-sided FR-4 board with 1 cm of Cu (at least 35µm thick) connected to TAB.

3/13

VNQ5050K-E

ELECTRICAL CHARACTERISTICS (8V<V <36V; -40°C< T <150°C, unless otherwise specified)

Table 6. Power Section

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Operating supply voltage

Undervoltage shut-down

4.5

USD

4.5

Undervoltage shut-down

hysteresis

0.5

USDhyst

=2A; T =25°C

100

mΩ

OUT

(**)

On state resistance

Clamp Voltage

Supply current

=2A; T =150°C

=2A; V =5V; T =25°C

I =20 mA

clamp

Off State; V =13V; V =V =0V;

OUT

T =25°C

(2)

µA

On State; V =5V; V =13V; I

=0A

OUT

V =V

=0V; V =13V; T =25°C

µA

OUT

(**) Off state output current

L(off1)

V =V

=0V; V =13V; T =125°C

CC j

OUT

V =0V; V

= 4V

-75

µA

L(off2)

OUT

Note: (**) Per each channel.

Note: 2. PowerMOS leakage included.

Table 7. Switching (V =13V)

Symbol

Parameter

Test Conditions

R =6.5Ω

Min.

Typ.

Max.

Unit

µs

Turn-on Delay Time

Turn-off Delay Time

d(on)

d(off)

R =6.5Ω

µs

/dt

Turn-on Voltage Slope R =6.5Ω

0.3

0.35

V/µs

OUT (on)

/dt

OUT (off)

Turn-off Voltage Slope R =6.5Ω

Switching energy

losses at turn-on

R =6.5Ω

TBD

Switching energy

losses at turn-off

R =6.5Ω

OFF

4/13

VNQ5050K-E

ELECTRICAL CHARACTERISTICS (continued)

Table 8. Status Pin (V =0)

Symbol

Parameter

Test Conditions

= 1.6 mA, V =0V

Min

Typ

Max

Unit

STAT

Status Low Output Voltage I

0.5

STAT

Normal Operation or V =5V,

Status Leakage Current

µA

LSTAT

STAT

= 5V

Status Pin Input

Capacitance

Normal Operation or V =5V,

100

STAT

= 5V

= 1mA

5.5

TBD

STAT

SCL

Status Clamp Voltage

= - 1mA

-0.7

Table 9. Protections (see note 3)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

=13V

DC Short circuit current

limH

5V<V <36V

=13V

Short circuit current dur-

ing thermal cycling

limL

T <T <T

TSD

Shutdown temperature

Reset temperature

150

175

200

°C

TSD

+ 1

+ 5

Thermal reset of STATUS

Thermal hysteresis

135

°C

HYST

-T )

TSD

Status Delay in Overload

Conditions

T >T

TSD

µs

SDL

=2A; V =0; L=6mH

Turn-off output voltage

clamp

OUT

-41

-46

V -52

DEMAG

Output voltage drop

limitation

=0.1A (see fig. 6)

OUT

T = -40°C...+150°C

Note: 3. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be

used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration

and number of activation cycles

Table 10. Openload Detection

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

Openload ON State

Detection Threshold

= 5V , 8V<Vcc<18V

Openload ON State

Detection Delay

= 0A, V =13V

200

µs

DOL(on)

OUT

Delay between INPUT

falling edge and STATUS

rising edge in Openload

condition

= 0A

200

500

1000

POL

OUT

Openload OFF State

Voltage Detection

Threshold

= 0V, 8V<V <16V

Output Short Circuit to V

Detection Delay at Turn Off

180

µs

DSTKON

POL

5/13

VNQ5050K-E

Figure 5.

OPEN LOAD STATUS TIMING (with external pull-up)

OPEN LOAD STATUS TIMING (without external pull-up)

< I

OUT

> V

< V

OUT

STAT

DOL(on)

POL

OVER TEMP STATUS TIMING

T > T

OUTPUT STUCK TO Vcc

> I

TSD

OUT

> V

OUT

STAT

DOL(on)

SDL

DSTKON

SDL

Figure 6.

V -V

cc out

T =150 C

T =25 C

T =-40 C

out

V /R

on on(T)

6/13

VNQ5050K-E

ELECTRICAL CHARACTERISTICS (continued)

Table 11. Logic Input

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Input Low Level

0.9

Low Level Input Current

Input High Level

= 0.9V

µA

2.1

High Level Input Current

Input Hysteresis Voltage

= 2.1V

µA

0.25

5.5

I(hyst)

= 1mA

TBD

Input Clamp Voltage

ICL

= -1mA

-0.7

STAT_DIS low level

voltage

0.9

µA

SDL

Low level STAT_DIS

current

=0.9V

=2.1V

SDL

STAT_DIS high level volt-

age

2.1

SDH

High level STAT_DIS

current

µA

SDH

STAT_DIS hysteresis volt-

age

0.25

5.5

SD(hyst)

=1mA

TBD

STAT_DIS clamp voltage

SDCL

=-1mA

-0.7

Table 12. Truth Table

CONDITIONS

(1)

INPUTn

OUTPUTn

STATUSn (V =0V)

Normal Operation

Current Limitation

Overtemperature

Undervoltage

(2)

Output Voltage > V

(3)

Output Current < I

Note: 1. If the V is high, the STATUS pin is in a high impedance.

2. The STATUS pin is low with a delay equal to t

after INPUT falling edge.

DSTKON

3. The STATUS pin becomes high with a delay equal to t

after INPUT falling edge.

POL

7/13

VNQ5050K-E

Figure 7. Switching Characteristics

OUT

90%

80%

dV /dt

OUT (off)

dV /dt

OUT (on)

10%

INPUT

d(on)

d(off)

Table 13. Electrical Transient Requirements

ISO T/R 7637/1

TEST LEVELS

III

Delays and

Impedance

Test Pulse

-25 V

+25 V

-25 V

-50 V

+50 V

-50 V

-75 V

+75 V

-100 V

+75 V

-6 V

-100 V

2 ms 10 Ω

0.2 ms 10 Ω

0.1 µs 50 Ω

+100 V

-150 V

+100 V

-7 V

+25 V

-4 V

+50 V

-5 V

100 ms, 0.01 Ω

400 ms, 2 Ω

+26.5 V

+46.5 V

+66.5 V

+86.5 V

ISO T/R 7637/1

Test Pulse

TEST LEVELS RESULTS

III

CLASS

CONTENTS

All functions of the device are performed as designed after exposure to disturbance.

One or more functions of the device are not performed as designed after exposure to disturbance

and cannot be returned to proper operation without replacing the device.

8/13

VNQ5050K-E

Figure 8. Application Schematic

+5V

prot

STAT_DIS

prot

INPUTn

µC

OUTPUTn

STATUSn

prot

GND

Note: Channels 2, 3 and 4 have the same internal circuit as channel 1.

This small signal diode can be safely shared amongst

several different HSDs. Also in this case, the presence of

the ground network will produce a shift ( 600mV) in the

input threshold and in the status output values if the

microprocessor ground is not common to the device

ground. This shift will not vary if more than one HSD

shares the same diode/resistor network.

GND PROTECTION NETWORK AGAINST

REVERSE BATTERY

Solution 1: Resistor in the ground line (R

can be used with any type of load.

only). This

GND

The following is an indication on how to dimension the

resistor.

GND

1) R

2) R

where -I

≤ 600mV / (I

S(on)max

)

GND

LOAD DUMP PROTECTION

≥ (−V ) / (-I

is necessary (Voltage Transient Suppressor) if the

is the DC reverse ground pin current and can

load dump peak voltage exceeds to V

max DC rating.

GND

be found in the absolute maximum rating section of the

device datasheet.

Power Dissipation in R

battery situations) is:

The same applies if the device is subject to transients on

the V line that are greater than the ones shown in the

ISO T/R 7637/1 table.

(when V <0: during reverse

GND

µC I/Os PROTECTION:

P = (-V ) /R

GND

If a ground protection network is used and negative

This resistor can be shared amongst several different

HSDs. Please note that the value of this resistor should

transient are present on the V line, the control pins will

be pulled negative. ST suggests to insert a resistor (R

)

prot

be calculated with formula (1) where I

becomes

S(on)max

in line to prevent the µC I/Os pins to latch-up.

the sum of the maximum on-state currents of the different

The value of these resistors is a compromise between the

leakage current of µC and the current required by the

HSD I/Os (Input levels compatibility) with the latch-up

limit of µC I/Os.

devices.

Please note that if the microprocessor ground is not

shared by the device ground then the R

will produce a

GND

shift (I

* R

) in the input thresholds and the

GND

S(on)max

-V

≤ R

≤ (V

-V -V

) / I

CCpeak latchup

prot

OHµC IH GND IHmax

status output values. This shift will vary depending on

how many devices are ON in the case of several high side

Calculation example:

drivers sharing the same R

For V

= - 100V and I

≥ 20mA; V ≥ 4.5V

OHµC

GND

CCpeak

latchup

If the calculated power dissipation leads to a large

resistor or several devices have to share the same

resistor then ST suggests to utilize Solution 2 (see

below).

5kΩ ≤ R

Recommended R

≤ 65kΩ.

prot

value is 10kΩ.

prot

Solution 2: A diode (D

) in the ground line.

GND

A resistor (R

GND

=1kΩ) should be inserted in parallel to

GND

if the device drives an inductive load.

9/13

VNQ5050K-E

Figure 9. Waveforms

NORMAL OPERATION

INPUT

STAT_DIS

LOAD CURRENT

STATUS

UNDERVOLTAGE

USDhyst

V_CC

USD

INPUT

STAT_DIS

LOAD CURRENT

STATUS

undefined

OPEN LOAD with external pull-up

INPUT

STAT_DIS

V_OUT>V_OL

LOAD VOLTAGE

STATUS

V_OL

OPEN LOAD without external pull-up

INPUT

STAT_DIS

LOAD VOLTAGE

LOAD CURRENT

STATUS

I_OUT<I_OL

POL

RESISTIVE SHORT TO Vcc, NORMAL LOAD

INPUT

STAT_DIS

I_OUT>I_OL

V_OUT>V_OL

LOAD VOLTAGE

STATUS

V_OL

DSTKON

OVERLOAD OPERATION

T_TSD

T_RS

T_R

INPUT

STAT_DIS

I_LIMH

I_LIML

LOAD CURRENT

STATUS

thermal cycling

SHORTED LOAD

current

limitation

power

limitation

NORMAL LOAD

10/13

VNQ5050K-E

PACKAGE MECHANICAL

Table 14. PowerSSO-24™ Mechanical Data

millimeters

Typ

Symbol

Min

Max

1.9

2.22

2.15

0.07

0.46

0.32

10.4

7.6

0.34

0.23

10.2

7.4

0.4

0.8

8.8

0.1

0.06

10.5

0.4

10.1

0.55

0.85

10º

4.3

3.9

6.1

6.5

Figure 10. PowerSSO-24™ Package Dimensions

11/13

VNQ5050K-E

REVISION HISTORY

Table 1. Revision History

Date

Revision

Description of Changes

Oct. 2004

Mar. 2005

- First issue.

- Minor changes

12/13

VNQ5050K-E

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is

granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are

subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products

are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics.

All other names are the property of their respective owners

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -

Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

13/13

VNQ5050KTR-E相关文章

配单直通车

深圳市中利达电子科技有限公司服务专线: 0755-83200645/13686833545 在线联系:

QQ：1902134819 复制

QQ：2881689472 复制

深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

QQ：2881495808 复制

QQ：308365177 复制

北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

QQ：857273081 复制

QQ：1594462451 复制

首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

QQ：528164397 复制

QQ：1318502189 复制

柒号芯城电子商务（深圳）有限公司服务专线: 0755-83209937 在线联系:

QQ：2881677436 复制

QQ：2881620402 复制

电子百科

产品导航

产品型号VNQ5050KTR-E的概述

产品型号VNQ5050KTR-E的Datasheet PDF文件预览

VNQ5050KTR-E相关产品

VNQ5050KTR-E相关文章

IC37:专业IC行业平台