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产品型号X9315WSZ的概述

芯片X9315WSZ的概述 X9315WSZ是一种高性能的数字电位计，广泛应用于电子元件中，特别是在需要精确电阻调整的场景。该芯片由Intersil（可以追溯至现在的Renesas Electronics）生产，具备高精度和宽工作电压范围等特性，正因如此，它在诸如音频设备、传感器校准和自动增益控制等应用中得到广泛使用。 X9315WSZ芯片可通过数字信号对电阻值进行调整，具体而言，它实现了对电压分配的精确控制，用户可通过串行接口（如I2C或SPI）来控制其工作状态。该芯片的设计旨在减少传统使用的可变电阻器的弊端，同时提供更高的稳定性和可靠性。芯片X9315WSZ的详细参数以下是X9315WSZ的一些关键技术参数： - 电源电压范围：2.7V到5.5V - 电阻范围：一般为100kΩ，具体可根据型号选择不同的电阻值 - 分辨率：通常为8位或更高，根据实际需要。 - 线性度：通常达到±...

产品型号X9315WSZ的Datasheet PDF文件预览

X9315

Low Noise, Low Power, 32 Taps

Data Sheet

September 15, 2005

FN8179.1

Digitally Controlled Potentiometer

(XDCP™)

The Intersil X9315 is a digitally controlled potentiometer

(XDCP). The device consists of a resistor array, wiper

switches, a control section, and nonvolatile memory. The

wiper position is controlled by a 3-wire interface.

Features

• Solid-state potentiometer

• 3-wire serial interface

• 32 wiper tap points

- Wiper position stored in nonvolatile memory and

recalled on power-up

The potentiometer is implemented by a resistor array

composed of 31 resistive elements and a wiper switching

network. Between each element and at either end are tap

points accessible to the wiper terminal. The position of the

wiper element is controlled by the CS, U/D, and INC inputs.

The position of the wiper can be stored in nonvolatile

memory and then be recalled upon a subsequent power-up

operation.

• 31 resistive elements

- Temperature compensated

- End to end resistance range ± 20%

- Terminal voltage, 0 to V

• Low power CMOS

- V

= 2.7V or 5V

- Active current, 50/400µA max.

- Standby current, 1µA max.

The device can be used as a three-terminal potentiometer or

as a two-terminal variable resistor in a wide variety of

applications including:

• High reliability

- Endurance, 100,000 data changes per bit

- Register data retention, 100 years

• Control

• Parameter Adjustments

• Signal Processing

• R

TOTAL

values = 10kΩ, 50kΩ, 100kΩ

• Packages

- 8 Ld SOIC, MSOP and PDIP

• Pb-free plus anneal available (RoHS compliant)

Block Diagram

U/D

INC

5-Bit

R /V

Up/Down

Counter

(Supply Voltage)

R /V

Up/Down

(U/D)

5-Bit

Nonvolatile

Memory

Control

and

Memory

Increment

(INC)

One

Transfer

Gates

Resistor

Array

Thirty

Two

Decoder

Device Select

(CS)

R /V

Store and

Recall

Control

Circuitry

(Ground)

General

R /V

Detailed

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

X9315

Ordering Information

LIMITS

(V)

TEMP RANGE

(°C)

TOTAL

PART NUMBER

PART MARKING

AAW

DDT

(kΩ)

PACKAGE

8 Ld MSOP

X9315WM*

5 ±10%

0 to 70

X9315WMZ* (Note)

X9315WMI*

8 Ld MSOP (Pb-free)

8 Ld MSOP

AAX

-40 to 85

0 to 70

X9315WMIZ* (Note)

X9315WP

AKW

8 Ld MSOP (Pb-free)

8 Ld PDIP

X9315WP

X9315WP I

X9315W

X9315W Z

X9315W I

X9315W Z I

X9315WPI

-40 to 85

0 to 70

8 Ld PDIP

X9315WS*

8 Ld SOIC

X9315WSZ* (Note)

X9315WSI*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

0 to 70

X9315WSIZ* (Note)

X9315UM*

8 Ld SOIC (Pb-free)

8 Ld MSOP

X9315UMZ* (Note)

X9315UMI*

DDS

0 to 70

8 Ld MSOP (Pb-free)

8 Ld MSOP

AEB

-40 to 85

0 to 70

X9315UMIZ* (Note)

X9315UP

DDR

8 Ld MSOP (Pb-free)

8 Ld PDIP

X9315UP

X9315UP I

X9315U

X9315U Z

X9315U I

X9315U Z I

AEJ

X9315UPI

-40 to 85

0 to 70

8 Ld PDIP

X9315US*

8 Ld SOIC

X9315USZ* (Note)

X9315USI*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

0 to 70

X9315USIZ* (Note)

X9315TM*

8 Ld SOIC (Pb-free)

8 Ld MSOP

100

X9315TMZ* (Note)

X9315TMI*

DDN

0 to 70

8 Ld MSOP (Pb-free)

8 Ld MSOP

ADZ

-40 to 85

0 to 70

X9315TMIZ* (Note)

X9315TP

DDL

8 Ld MSOP (Pb-free)

8 Ld PDIP

X9315TP

X9315TP I

X9315T

X9315T Z

X9315T I

X9315T Z I

X9315TPI

-40 to 85

0 to 70

8 Ld PDIP

X9315TS*

8 Ld SOIC

X9315TSZ* (Note)

X9315TSI*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

X9315TSIZ* (Note)

8 Ld SOIC (Pb-free)

FN8179.1

September 15, 2005

X9315

Ordering Information (Continued)

LIMITS

(V)

TEMP RANGE

(°C)

TOTAL

PART NUMBER

X9315TP-2.7

PART MARKING

(kΩ)

PACKAGE

8 Ld PDIP

X9315TP F

X9315TP G

AAU

2.7-5.5

0 to 70

-40 to 85

0 to 70

X9315TPI-2.7

8 Ld PDIP

X9315WM-2.7*

8 Ld MSOP

X9315WMZ-2.7* (Note)

X9315WMI-2.7*

AOI

0 to 70

8 Ld MSOP (Pb-free)

8 Ld MSOP

AAV

-40 to 85

0 to 70

X9315WMIZ-2.7* (Note)

X9315WP-2.7

8 Ld MSOP (Pb-free)

8 Ld PDIP

X9315WP F

X9315WP G

X9315W F

X9315W Z F

X9315W G

X9315W Z G

AEK

X9315WPI-2.7

-40 to 85

0 to 70

8 Ld PDIP

X9315WS-2.7*

8 Ld SOIC

X9315WSZ-2.7* (Note)

X9315WSI-2.7*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

0 to 70

X9315WSIZ-2.7* (Note)

X9315UM-2.7*

8 Ld SOIC (Pb-free)

8 Ld MSOP

X9315UMZ-2.7* (Note)

X9315UMI-2.7*

AKU

0 to 70

8 Ld MSOP (Pb-free)

8 Ld MSOP

AEA

-40 to 85

0 to 70

X9315UMIZ-2.7* (Note)

X9315UP-2.7

AJG

8 Ld MSOP (Pb-free)

8 Ld PDIP

X9315UPI-2.7

-40 to 85

0 to 70

8 Ld PDIP

X9315US-2.7*

X9315U F

X9315U Z F

X9315U G

X9315U Z G

AEI

8 Ld SOIC

X9315USZ-2.7* (Note)

X9315USI-2.7*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

0 to 70

X9315USIZ-2.7* (Note)

X9315TM-2.7*

8 Ld SOIC (Pb-free)

8 Ld MSOP

100

X9315TMZ-2.7* (Note)

X9315TMI-2.7*

DDP

0 to 70

8 Ld MSOP (Pb-free)

8 Ld MSOP

ADY

-40 to 85

0 to 70

X9315TMIZ-2.7* (Note)

X9315TS-2.7*

DDM

8 Ld MSOP (Pb-free)

8 Ld SOIC

X9315T F

X9315T Z F

X9315T G

X9315T Z G

X9315TSZ-2.7* (Note)

X9315TSI-2.7*

0 to 70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to 85

X9315TSIZ-2.7* (Note)

8 Ld SOIC (Pb-free)

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

*Add "T1" suffix for tape and reel.

FN8179.1

September 15, 2005

X9315

Pin Descriptions

Pin Names

SYMBOL

DESCRIPTION

R /V and R /V

The high (R /V ) and low (R /V ) terminals of the X9315

INC

Increment control input

Chip Select control input

are equivalent to the fixed terminals of a mechanical

potentiometer. The minimum voltage is V and the

maximum is V . The terminology of R /V and R /V

Principles of Operation

references the relative position of the terminal in relation to

wiper movement direction selected by the U/D input, and not

the voltage potential on the terminal.

There are three sections of the X9315: the input control,

counter and decode section; the nonvolatile memory; and

the resistor array. The input control section operates just like

an up/down counter. The output of this counter is decoded to

turn on a single electronic switch connecting a point on the

resistor array to the wiper output. Under the proper

conditions the contents of the counter can be stored in

nonvolatile memory and retained for future use. The resistor

array is comprised of 31 individual resistors connected in

series. At either end of the array and between each resistor

is an electronic switch that transfers the connection at that

point to the wiper.

R_W/V_W

R /V is the wiper terminal and is equivalent to the movable

terminal of a mechanical potentiometer. The position of the

wiper within the array is determined by the control inputs.

The wiper terminal series resistance is typically 200Ω at V

= 5V.

Up/Down (U/D)

The U/D input controls the direction of the wiper movement

and whether the counter is incremented or decremented.

The wiper, when at either fixed terminal, acts like its

mechanical equivalent and does not move beyond the last

position. That is, the counter does not wrap around when

clocked to either extreme.

Increment (INC)

The INC input is negative-edge triggered. Toggling INC will

move the wiper and either increment or decrement the

counter in the direction indicated by the logic level on the

U/D input.

The electronic switches on the device operate in a “make

before break” mode when the wiper changes tap positions. If

the wiper is moved several positions, multiple taps are

Chip Select (CS)

connected to the wiper for t (INC to V change). The

The device is selected when the CS input is LOW. The

current counter value is stored in nonvolatile memory when

CS is returned HIGH while the INC input is also HIGH. After

the store operation is complete the X9315 will be placed in

the low power standby mode until the device is selected

once again.

value for the device can temporarily be reduced by

TOTAL

a significant amount if the wiper is moved several positions.

When the device is powered-down, the last wiper position

stored will be maintained in the nonvolatile memory. When

power is restored, the contents of the memory are recalled

and the wiper is set to the value last stored.

Pin Configuration

Instructions and Programming

DIP/SOIC/MSOP

The INC, U/D and CS inputs control the movement of the

wiper along the resistor array. With CS set LOW the device

is selected and enabled to respond to the U/D and INC

inputs. HIGH to LOW transitions on INC will increment or

decrement (depending on the state of the U/D input) a five

bit counter. The output of this counter is decoded to select

one of thirty two wiper positions along the resistive array.

INC

U/D

R /V

X9315

The value of the counter is stored in nonvolatile memory

whenever CS transitions HIGH while the INC input is also

HIGH.

Pin Names

SYMBOL

DESCRIPTION

High terminal

Wiper terminal

Low terminal

Ground

R /V

The system may select the X9315, move the wiper and

deselect the device without having to store the latest wiper

position in nonvolatile memory. After the wiper movement is

performed as described above and once the new position is

reached, the system must keep INC LOW while taking CS

HIGH. The new wiper position will be maintained until

R /V

Supply voltage

U/D

Up/Down control input

FN8179.1

September 15, 2005

X9315

changed by the system or until a power-up/down cycle

recalled the previously stored data.

This procedure allows the system to always power-up to a

preset value stored in nonvolatile memory; then during

system operation minor adjustments could be made. The

adjustments might be based on user preference, system

parameter changes due to temperature drift, etc...

The state of U/D may be changed while CS remains LOW.

This allows the host system to enable the device and then

move the wiper up and down until the proper trim is attained.

Mode Selection

INC

U/D

MODE

Wiper Up

Wiper Down

Store Wiper Position

Standby Current

No Store, Return to Standby

Symbol Table

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from Low to

High

Will change

from Low to

High

May change

from High to

Low

Will change

from High to

Low

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance

FN8179.1

September 15, 2005

X9315

Absolute Maximum Ratings

Recommended Operating Conditions

Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS, INC, U/D, V , V and

Temperature (Commercial) . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C

Temperature (Industrial). . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Supply Voltage (V ) (Note 4) Limits

with respect to V

. . . . . . . . . . . . . . . . . . . . . . . -1V to +7V

X9315. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%

X9315-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

∆V = |V –V | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V

Lead temperature (soldering 10 seconds) . . . . . . . . . . . . . . . .300°C

(10 seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7.5mA

CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; the functional

operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.

Potentiometer Characteristics (Over recommended operating conditions unless otherwise stated.)

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS/NOTES

MIN

TYP

MAX.

UNIT

End to end resistance tolerance

±20

terminal voltage

Power rating

Wiper resistance

Wiper current

Noise

≥ 10kΩ

Ω

TOTAL

= 1mA, V

= 5V

200

400

= 2.7V

1000

±3.75

Ω

dBV

Ref: 1kHz

-120

Resolution

(1)

(3)

Absolute linearity

- V

±1

w(n)(actual)

w(n)(expected)

(2)

(3)

Relative linearity

temperature coefficient

- [V

]

w(n) + MI

±0.2

w(n + 1)

±300

ppm/°C

TOTAL

Ratiometric temperature coefficient

Potentiometer capacitances

±20

C /C /C

See circuit #3

10/10/25

Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V

Maximum.

(actual) - V

(expected)) = ±1 Ml

w(n)

(2) Relative linearity is a measure of the error in step size between taps = R

- [R

+ Ml] = ±0.2 Ml.

w(n)

W(n+1)

(3) 1 Ml = Minimum Increment = R

/31.

TOT

(4) Typical values are for T = 25°C and nominal supply voltage.

(5) This parameter is periodically sampled and not 100% tested

DC Electrical Specifications (Over recommended operating conditions unless otherwise specified.

LIMITS

(4)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

active current (Increment)

CS = V , U/D = V or V and INC = 0.4V

µA

CC1

@ max. t

CYC

active current (Store) (EEPROM CS = V , U/D = V or V and INC = V

Store)

400

µA

CC2

@ max. t

Standby supply current

CS = V

- 0.3V, U/D and INC = V or

- 0.3V

CS, INC, U/D input leakage current

CS, INC, U/D input HIGH voltage

CS, INC, U/D input LOW voltage

CS, INC, U/D input capacitance

= V to V

SS CC

±10

µA

x 0.7

+ 0.5

-0.5

x 0.1

(5)

= 5V, V = V , T = 25°C, f = 1MHz

IN SS

FN8179.1

September 15, 2005

X9315

Endurance and Data Retention

PARAMETER

MIN

100,000

100

UNIT

Data changes per bit

Years

Minimum endurance

Data retention

Test Circuit #1

Test Circuit #2

Circuit #3 SPICE Macro Model

V /R

TOTAL

Test Point

10pF

25pF

Force

Current

10pF

V /R

AC Conditions of Test

Input pulse levels

0V to 3V

10ns

Input rise and fall times

Input reference levels

1.5V

AC Electrical Specifications (Over recommended operating conditions unless otherwise specified)

LIMITS

(6)

SYMBOL

PARAMETER

MIN

100

2.9

TYP

MAX

UNIT

CS to INC setup

INC HIGH to U/D change

U/D to INC setup

µs

INC LOW period

µs

INC HIGH period

µs

INC Inactive to CS inactive

CS Deselect time (NO STORE)

CS Deselect time (STORE)

INC to Vw change

µs

100

CPH

µs

INC cycle time

µs

CYC

(7)

INC input rise and fall time

Power-up to wiper stable

500

µs

R, F

(7)

µs

(7)

power-up rate

0.2

V/ms

Store cycle

FN8179.1

September 15, 2005

X9315

Power-up and Down Requirements

There are no restrictions on the power-up or power-down

conditions of V

and the voltages applied to the

potentiometer pins provided that V

is always more

positive than or equal to V , V , and V , i.e., V

≥ V , V ,

V . The V

ramp rate spec is always in effect.

AC Timing

CYC

(Store)

CPH

90%

INC

U/D

10%

(8)

Notes: (6) Typical values are for T = 25°C and nominal supply voltage.

(7) This parameter is not 100% tested.

(8) MI in the A.C. timing diagram refers to the minimum incremental change in the V output due to a change in the wiper position.

Performance Characteristics (Typical)

Typical Noise

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-150

20 30

40 50

60 70

80 90 100 110 120 130 140 150 160 170 180 190 200

Frequency (kHz)

FN8179.1

September 15, 2005

X9315

Typical Rtotal vs. Temperature

10000

9800

9600

9400

9200

9000

8800

8600

8400

8200

8000

-55

-45 -35 -25 -15 -5

35 45

C°

75 85 95 105 115 125

Temperature⁶⁵

Typical Total Resistance Temperature Coefficient

-50

-100

-150

PPM

-200

-250

-300

-350

-55 -45 -35 -25 -15

-5

105 115 125 °C

Temperature

Typical Wiper Resistance

800

700

600

500

400

300

200

100

= 2.7V

Tap

FN8179.1

September 15, 2005

X9315

Typical Absolute% Error per Tap Position

40.0%

30.0%

20.0%

10.0%

0.0%

-10.0%

-20.0%

-30.0%

-40.0%

Tap

Typical Relative% Error per Tap Position

20.0%

15.0%

10.0%

5.0%

0.0%

-5.0%

-10.0%

-15.0%

-20.0%

Tap

Applications Information

Electronic digitally controlled (XDCP) potentiometers provide

three powerful application advantages; (1) the variability and

reliability of a solid-state potentiometer, (2) the flexibility of

computer-based digital controls, and (3) the retentivity of

nonvolatile memory used for the storage of multiple

potentiometer settings or data.

FN8179.1

September 15, 2005

X9315

Basic Configurations of Electronic Potentiometers

Three terminal potentiometer;

variable voltage divider

Two terminal variable resistor;

variable current

Basic Circuits

Noninverting Amplifier

Buffered Reference Voltage

Cascading Techniques

+5V

LM308A

–

+5V

OP-07

–

REF

-5V

OUT

-5V

= V /R

OUT

(a)

(b)

= (1 + R /R )V

2 1 S

Voltage Regulator

Comparator with Hysteresis

(REG)

317

LT311A

–

adj

= {R /(R + R )} V (max)

1 1 2 O

= {R /(R + R )} V (min)

1 1 2 O

(REG) = 1.25V (1 + R /R ) + I

adj

(for additional circuits see AN115)

FN8179.1

September 15, 2005

X9315

Packaging Information

8-Lead Miniature Small Outline Gull Wing Package Type M

0.118 ± 0.002

(3.00 ± 0.05)

0.012 + 0.006 / -0.002

0.0256 (0.65) Typ.

(0.30 + 0.15 / -0.05)

R 0.014 (0.36)

0.118 ± 0.002

(3.00 ± 0.05)

0.030 (0.76)

0.0216 (0.55)

7° Typ.

0.036 (0.91)

0.032 (0.81)

0.040 ± 0.002

(1.02 ± 0.05)

0.008 (0.20)

0.004 (0.10)

0.0256" Typical

0.025"

Typical

0.150 (3.81)

0.007 (0.18)

0.005 (0.13)

Ref.

0.193 (4.90)

Ref.

0.220"

0.020"

Typical

8 Places

FOOTPRINT

NOTE:

1. ALL DIMENSIONS IN INCHES AND (MILLIMETERS)

FN8179.1

September 15, 2005

X9315

Packaging Information

8-Lead Plastic Dual In-Line Package Type P

0.430 (10.92)

0.360 (9.14)

0.260 (6.60)

0.240 (6.10)

Pin 1 Index

Pin 1

0.060 (1.52)

0.020 (0.51)

0.300

(7.62) Ref.

Half Shoulder Width On

All End Pins Optional

0.145 (3.68)

0.128 (3.25)

Seating

Plane

0.025 (0.64)

0.015 (0.38)

0.065 (1.65)

0.150 (3.81)

0.125 (3.18)

0.045 (1.14)

0.110 (2.79)

0.090 (2.29)

0.020 (0.51)

0.016 (0.41)

0.325 (8.25)

0.300 (7.62)

.073 (1.84)

Max.

0°

Typ. 0.010 (0.25)

15°

NOTE:

1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)

2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH

FN8179.1

September 15, 2005

X9315

Packaging Information

8-Lead Plastic Small Outline Gull Wing Package Type S

0.150 (3.80) 0.228 (5.80)

0.158 (4.00) 0.244 (6.20)

Pin 1 Index

Pin 1

0.014 (0.35)

0.019 (0.49)

0.188 (4.78)

0.197 (5.00)

(4X) 7°

0.053 (1.35)

0.069 (1.75)

0.004 (0.19)

0.050 (1.27)

0.010 (0.25)

0.020 (0.50)

0.050"Typical

X 45°

0.050"

Typical

0° - 8°

0.0075 (0.19)

0.010 (0.25)

0.250"

0.016 (0.410)

0.037 (0.937)

0.030"

Typical

8 Places

FOOTPRINT

NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN8179.1

September 15, 2005

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X9315WSZ产品参数

型号:	X9315WSZ
Brand Name：	Intersil
生命周期：	Unknown
IHS 制造商：	INTERSIL CORP
零件包装代码：	MSOP, SOIC
包装说明：	SOP, SOP8,.25
针数：	8, 8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	6 weeks
风险等级：	5.06
Is Samacsys：	N
其他特性：	NONVOLATILE MEMORY
控制接口：	INCREMENT/DECREMENT
转换器类型：	DIGITAL POTENTIOMETER
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3
长度：	4.9 mm
湿度敏感等级：	1
功能数量：	1
位置数：	32
端子数量：	8
最高工作温度：	70 °C
最低工作温度：
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
电源：	5 V
认证状态：	Not Qualified
电阻定律：	LINEAR
最大电阻容差：	20%
最大电阻器端电压：	5 V
最小电阻器端电压：
座面最大高度：	1.75 mm
子类别：	Digital Potentiometers
标称供电电压：	5 V
表面贴装：	YES
技术：	CMOS
标称温度系数：	300 ppm/ °C
温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
标称总电阻：	10000 Ω
宽度：	3.9 mm
Base Number Matches：	1

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