XTR101AG各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

®

XTR101

Precision, Low Drift

4-20mA TWO-WIRE TRANSMITTER

FEATURES

● INSTRUMENTATION AMPLIFIER INPUT

Low Offset Voltage, 30µV max

APPLICATIONS

● INDUSTRIAL PROCESS CONTROL

Pressure Transmitters

Low Voltage Drift, 0.75µV/°C max

Low Nonlinearity, 0.01% max

Temperature Transmitters

Millivolt Transmitters

● TRUE TWO-WIRE OPERATION

Power and Signal on One Wire Pair

Current Mode Signal Transmission

High Noise Immunity

● RESISTANCE BRIDGE INPUTS

● THERMOCOUPLE INPUTS

● RTD INPUTS

● CURRENT SHUNT (mV) INPUTS

● PRECISION DUAL CURRENT SOURCES

● AUTOMATED MANUFACTURING

● DUAL MATCHED CURRENT SOURCES

● WIDE SUPPLY RANGE: 11.6V to 40V

● –40°C to +85°C SPECIFICATION RANGE

● POWER/PLANT ENERGY SYSTEM

● SMALL 14-PIN DIP PACKAGE, CERAMIC

MONITORING

AND PLASTIC

DESCRIPTION

The XTR101 is a microcircuit, 4-20mA, two-wire

transmitter containing a high accuracy instrumenta-

tion amplifier (IA), a voltage-controlled output current

source, and dual-matched precision current reference.

This combination is ideally suited for remote signal

conditioning of a wide variety of transducers such as

thermocouples, RTDs, thermistors, and strain gauge

bridges. State-of-the-art design and laser-trimming,

wide temperature range operation and small size make

it very suitable for industrial process control applica-

tions. In addition, the optional external transistor al-

lows even higher precision.

I_REF1

Optional

I_REF2

External

10

Transistor

+V_CC

8

3

11

e₁

–

5

6

12⁽¹⁾

XTR101

Span

B

The two-wire transmitter allows signal and power to

be supplied on a single wire-pair by modulating the

power supply current with the input signal source. The

transmitter is immune to voltage drops from long runs

and noise from motors, relays, actuators, switches,

transformers, and industrial equipment. It can be used

by OEMs producing transmitter modules or by data

acquisition system manufacturers.

4

e₂

+

9

(1)

13

E

14

7

2

I_OUT

1

Optional

Offset Null

NOTE: (1) Pins 12 and 13 are used for optional BW control.

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

FAXLine: (800) 548-6133 (US/Canada Only)

• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP

•

Telex: 066-6491

•

FAX: (520) 889-1510

•

Immediate Product Info: (800) 548-6132

PDS-627G

Printed in U.S.A. October, 1993

SPECIFICATIONS

ELECTRICAL

At T_A= +25°C, +V_CC= 24VDC, and R_L= 100Ω with external transistor connected, unless otherwise noted

XTR101AG

TYP MAX

XTR101BG

TYP MAX

XTR101AP

TYP MAX

XTR101AU

TYP MAX

PARAMETER

CONDITIONS

MIN

UNITS

OUTPUT AND LOAD CHARACTERISTICS

Current

Linear Operating Region

Derated Performance

4

3.8

20

22

✻

mA

Current Limit

Offset Current Error

vs Temperature

Full Scale Output Current Error

Power Supply Voltage

28

±3.9

±10.5

±20

38

✻

±2.5

±8

✻

±6

±15

±30

✻

31

±8.5

±10.5

±30

✻

31

±8.5

✻

±19

mA

µA

ppm, FS/°C

µA

VDC

I

_OS, I_O= 4mA

∆I_OS/∆T

±10

±20

±40

±19

±20

±60

✻

Full Scale = 20mA

_CC, Pins 7 and 8,

Compliance⁽¹⁾

±15

±30

±60

✻

V

+11.6

✻

Load Resistance

At V_CC= +24V, I_O= 20mA

At V_CC= +40V, I_O= 20mA

600

1400

✻

600

1400

✻

Ω

SPAN

Output Current Equation

Span Equation

vs Temperature

Untrimmed Error⁽²⁾

Nonlinearity

R_Sin Ω, e₁and e₂in V

R_Sin Ω

Excluding TCR of R_S

ε_SPAN

i_O= 4mA + [0.016Ω + (40/R_S)] (e₂– e₁)

S = [0.016Ω + (40/R_S)]

A/V

ppm/°C

%

±30

–2.5

±100

0

0.01

✻

–5

✻

ε_NONLINEARITY

%

Hysteresis

Dead Band

0

✻

%

INPUT CHARACTERISTICS

Impedance: Differential

Common-Mode

Voltage Range, Full Scale

Offset Voltage

vs Temperature

Power Supply Rejection

Bias Current

vs Temperature

Offset Current

vs Temperature

Common-Mode Rejection⁽⁴⁾

Common-Mode Range

0.4 || 3

10 || 3

✻

GΩ || pF

V

µV

µV/°C

dB

nA

nA/°C

nA

nA/°C

dB

∆e = (e₂– e₁)⁽³⁾

V_OS

∆V_OS/∆T

0

1

±60

±1.5

✻

±30

±0.75

✻

±100

✻

±100

✻

±30

±0.75

125

60

0.30

10

±20

±0.35

✻

122

✻

122

✻

∆V_CC/PSRR = V_OSError

110

I_B

∆I_B/∆T

I_OSI

∆I_OSI/∆T

DC

150

1

±30

0.3

✻

±20

✻

0.1

100

✻

90

4

✻

e₁and e₂with Respect

to Pin 7

6

✻

V

CURRENT SOURCES

Magnitude

1

✻

mA

Accuracy

V_CC= 24V,

V

_{PIN 8}– V_{PIN 10}

,

= 19V

11

R₂= 5kΩ, Fig. 5

±0.06

±50

±3

±0.17

±80

±0.025 ±0.075

±0.2

✻

±0.37

✻

±0.2

✻

±0.37

✻

%

ppm/°C

ppm/V

ppm/month

V

vs Temperature

vs V_CC

vs Time

Compliance Voltage

Ratio Match

Accuracy

vs Tempeature

vs V_CC

±30

✻

±50

±8

✻

With Respect to Pin 7

Tracking

(1 – I_REF1/I_REF2) X 100%

0

V

– 3.5

✻

CC

±0.014

±0.06

±15

±0.009

±0.04

±0.031 ±0.088

%

ppm/°C

ppm/V

ppm/month

MΩ

10

✻

±10

±1

20

✻

15

✻

15

vs Time

Output Impedance

10

TEMPERATURE RANGE

Specification

Operating

–40

–55

+85

+125

+165

✻

–40

–55

+85

+125

✻

–40

–55

✻

+85

+125

°C

Storage

✻ Same as XTR101AG.

NOTES: (1) See Typical Performance Curves. (2) Span error shown is untrimmed and may be adjusted to zero. (3) e₁and e₂are signals on the –In and +In terminals

with respect to the output, pin 7. While the maximum permissible ∆e is 1V, it is primarily intended for much lower input signal levels, e.g., 10mV or 50mV full scale

for the XTR101A and XTR101B grades respectively. 2mV FS is also possible with the B grade, but accuracy will degrade due to possible errors in the low value

span resistance and very high amplification of offset, drift, and noise. (4) Offset voltage is trimmed with the application of a 5V common-mode voltage. Thus the

associated common-mode error is removed. See Application Information section.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

®

XTR101

2

PIN CONFIGURATION

Top View

DIP

Top View

SOIC

1

2

3

4

5

6

7

8

Zero Adjust

–In

16 Zero Adjust

15 Bandwidth

14 B Control

13 I_REF2

1

2

3

4

5

6

7

Zero Adjust

–In

14 Zero Adjust

13 Bandwidth

12 B Control

SOL-16

Surface-Mount

+In

DIP

+In

11

10 I_REF1

I_REF2

Span

12 I_REF1

Span

11

10 +V_CC

NC

E

Span

9

8

E

Out

+V_CC

NC

9

ABSOLUTE MAXIMUM RATINGS

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

Power Supply, +V_CC........................................................................... 40V

Input Voltage, e₁or e₂........................................................ ≥V_OUT, ≤+V_CC

Storage Temperature Range, Ceramic ........................ –55°C to +165°C

Plastic ............. –55°C to +125°C

Lead Temperature (soldering 10s) G, P ...................................... +300°C

(wave soldering, 3s) U .......................... +260°C

Output Short-Circuit Duration ........................... Continuous +V_CCto I_OUT

Junction Temperature ................................................................... +165°C

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

PACKAGE/ORDERING INFORMATION

PACKAGE

DRAWING

NUMBER⁽¹⁾

TEMPERATURE

RANGE

PRODUCT

PACKAGE

XTR101AG

XTR101BG

XTR101AP

XTR101AU

14-Pin Ceramic DIP

14-Pin Plastic DIP

16-Lead SOIC

169

010

211

–40°C to +85°C

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

®

3

XTR101

TYPICAL PERFORMANCE CURVES

At T_A= +25°C, +V_CC= 24VDC, unless otherwise noted.

SPAN vs FREQUENCY

80

STEP RESPONSE

25

20

15

10

C_C= 0

R_S= 25Ω

R_S= ∞

60

40

R

_S= 100Ω

_S= 400Ω

R_S= 25Ω

R_S= 2kΩ

R_S= ∞

20

0

5

0

100

1k

10k

Frequency (Hz)

100k

1M

0

0.1

1

200

400

600

800

1000

Time (µs)

FULL SCALE INPUT VOLTAGE vs R_S

R

_S(kΩ)

0

2

4

6

8

COMMON-MODE REJECTION vs FREQUENCY

0.08

0.06

0.04

0.8

0.6

0.4

120

100

80

0 to 800mV and

0 to 8kΩ scale

60

40

0.02

0

0.2

0

20

0

0 to 80mV (low level signals)

and 0 to 400Ω scale

0

100

200

300

400

1

10

100

1k

10k

100k

R_S(Ω)

Frequency (Hz)

POWER SUPPLY REJECTION vs FREQUENCY

BANDWIDTH vs PHASE COMPENSATION

100k

10k

1k

140

120

100

80

R

_S= ∞

R

_S= 400Ω

R_S= 100Ω

R_S= 25Ω

100

10

60

40

1

20

0

0.1

10

100

1k

10k

100k

1M

10M

10

100

1k

10k

100k

1M

Frequency (Hz)

Bandwidth Control, C_C(pF)

®

XTR101

4

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C, +V_CC= 24VDC, unless otherwise noted.

INPUT VOLTAGE NOISE DENSITY vs FREQUENCY

INPUT CURRENT NOISE DENSITY vs FREQUENCY

60

50

40

30

20

6

5

4

3

2

10

0

1

0

1

10

100

1k

10k

100k

1

10

100

1k

10k

100k

Frequency (Hz)

OUTPUT CURRENT NOISE DENSITY vs FREQUENCY

6

5

4

3

2

1

0

1

10

100

1k

10k

100k

Frequency (Hz)

THEORY OF OPERATION

A simplified schematic of the XTR101 is shown in Figure 1.

Basically the amplifiers, A₁and A₂, act as a single power

supply instrumentation amplifier controlling a current source,

A₃and Q₁. Operation is determined by an internal feedback

loop. e₁applied to pin 3 will also appear at pin 5 and

similarly e₂will appear at pin 6. Therefore the current in R_S,

the span setting resistor, will be I_S= (e₂– e₁)/R_S= e_IN/R_S.

This current combines with the current, I₃, to form I₁. The

circuit is configured such that I₂is 19 times I₁. From this

point the derivation of the transfer function is straightfor-

ward but lengthy. The result is shown in Figure 1.

since I_Ois unipolar e₂must be kept larger than e₁; i.e., e₂≥

e₁or e_IN≥ 0. Also note that in order not to exceed the output

upper range limit of 20mA, e_INmust be kept less than 1V

when R_S= ∞ and proportionately less as R_Sis reduced.

INSTALLATION AND

OPERATING INSTRUCTIONS

BASIC CONNECTION

The basic connection of the XTR101 is shown in Figure 1.

A difference voltage applied between input pins 3 and 4 will

cause a current of 4-20mA to circulate in the two-wire

output loop (through R_L, V_PS, and D₁). For applications

requiring moderate accuracy, the XTR101 operates very

cost-effectively with just its internal drive transistor. For

more demanding applications (high accuracy in high gain)

an external NPN transistor can be added in parallel with the

internal one. This keeps the heat out of the XTR101 package

Examination of the transfer function shows that I_Ohas a

lower range-limit of 4mA when e_IN= e₂– e₁= 0V. This 4mA

is composed of 2mA quiescent current exiting pin 7 plus

2mA from the current sources. The upper range limit of I_Ois

set to 20mA by the proper selection of R_Sbased on the upper

range limit of e_IN. Specifically R_Sis chosen for a 16mA

output current span for the given full scale input voltage

Ω

span; i.e., (0.016 + 40/R_S)(e_INfull scale) = 16mA. Note that

®

5

XTR101

e_IN

R_S

–

+

(e₁)

(e₂)

I_S

5

6

I₃

I₄

R₃

R₄

1.25kΩ

+V_CC

A₁

+V_CC

A₂

+V_CC

8

D₁

(e₁)

I_B1

–In₃

e_IN

I_B2

V_PS

+In₄

(e₂)

100µA

I_O

7

+

Q₁

+V_CC

e_L

+V_CC

A₃

–

R_L

2mA

I₁

R

1kΩ

1

R

2

52.6Ω

I₂

I_O

Voltage Controlled

Current Source

10

I_REF1

11

I_REF2

2.5kΩ

Ω

I_O= 4mA + (0.016 + 40/R_S) e_IN, e_IN= e₂– e₁

FIGURE 1. Simplified Schematic of the XTR101.

and minimizes thermal feedback to the input stage. Also in

such applications where e_INfull scale is small (<50mV) and

tions shown in Figure 2. Thus the 2N2222 will safely

operate below its 400mW rating at the upper temperature

of +85°C. Heat sinking the 2N2222 will result in greatly

reduced accuracy improvement and is not recommended.

R_SPANis small (<150Ω), caution should be taken to consider

errors from the external span circuit plus high amplification

of offset drift and noise.

2. TIP29B in the TO-220 package. This transistor will

operate over the specified temperature and output voltage

range without a series collector resistor. Heat sinking the

TIP29B will result in slightly less accuracy improvement.

It can be done, however, when mechanical constraints

require it.

OPTIONAL EXTERNAL TRANSISTOR

The optional external transistor, when used, is connected in

parallel with the XTR101’s internal transistor. The purpose

is to increase accuracy by reducing heat change inside the

XTR101 package as the output current spans from 4-20mA.

Under normal operating conditions, the internal transistor is

never completely turned off as shown in Figure 2. This

maintains frequency stability with varying external transis-

tor characteristics and wiring capacitance. The actual “cur-

rent sharing” between internal and external transistors is

dependent on two factors: (1) relative geometry of emitter

areas and (2) relative package dissipation (case size and

thermal conductivity). For best results, the external device

should have a larger base-emitter area and smaller package.

It will, upon turn on, take about [0.95 (I_O– 3.3mA)]mA.

However, it will heat faster and take a greater share after a

few seconds.

ACCURACY WITH AND

WITHOUT EXTERNAL TRANSISTOR

The XTR101 has been tested in a circuit using an external

transistor. The relative difference in accuracy with and

without an external transistor is shown in Figure 3. Notice

that a dramatic improvement in offset voltage change with

supply voltage is evident for any value of load resistor.

MAJOR POINTS TO

CONSIDER WHEN USING THE XTR101

1. The leads to R_Sshould be kept as short as possible to

reduce noise pick-up and parasitic resistance.

Although any NPN of suitable power rating will operate

with the XTR101, two readily available transistors are

recommended.

2. +V_CCshould be bypassed with a 0.01µF capacitor as close

to the unit as possible (pin 8 to 7).

3. Always keep the input voltages within their range of

linear operation, +4V to +6V (e₁and e₂measured with

respect to pin 7).

1. 2N2222 in the TO-18 package. For power supply volt-

ages above 24V, a 750Ω, 1/2W resistor should be con-

nected in series with the collector. This will limit the

power dissipation to 377mW under the worst-case condi-

®

XTR101

6

4mA

20mA

16mA

+V_CC

8

750Ω⁽²⁾

12V, 200mW

3.5mA

0.5mA

B

Q_EXT23.6V, 377mW

2N2222⁽¹⁾

12

XTR101

Q_INT18mW

Other Suitable Types

Package

Type

V_PS

40V

9

E

TO-225

TO-220

2N4922

TIP29B

TIP31B

210Ω

3.47V, 60mW

1.5mA

Quiescent

0.95V, 17mW

I_OUT

52.6Ω

7

11

Short Circuit

Worst Case

R_L

250Ω

10

1mA

2mA

18mA

20mA

NOTES: (1) An external transistor is used in the maufacturing test circuit for testing electrical specifications.

(2) This resistor is required for the 2N2222 with V_PS> 24V to limit power dissipation.

FIGURE 2. Power Calculation of XTR101 with External Transistor.

1500

1250

1000

750

30

25

20

15

10

60

50

40

30

20

Span = ∆I_O= 16mA

Without external transistor

V_PS– 11.6V

20mA

R_Lmax =

Ω

_L= 600

R

Operating

Region

Ω

500

_L= 1k

R

With external transistor

R_L= 600Ω

250

0

5

0

10

0

R_L= 1kΩ

R_L= 100Ω

0

10

20

30

40

50

60

10

20

30

40

V_CC(V)

Power Supply Voltage, V_PS(V)

FIGURE 3. Thermal Feedback Due to Change in Output

Current.

FIGURE 4. Power Supply Operating Range.

4. The maximum input signal level (e_INFS) is 1V with R_S= ∞

6. Always choose R_L(including line resistance) so that the

voltage between pins 7 and 8 (+V_CC) remains within the

11.6V to 40V range as the output changes between the

4-20mA range (see Figure 4).

and proportionally less as R_Sdecreases.

5. Always return the current references (pins 10 and 11) to

the output (pin 7) through an appropriate resistor. If the

references are not used for biasing or excitation, connect

them together to pin 7. Each reference must have between

0V and +(V_CC– 4V) with respect to pin 7.

7. It is recommended that a reverse polarity protection diode

(D₁in Figure 1) be used. This will prevent damage to the

XTR101 caused by a momentary (e.g., transient) or long

term application of the wrong polarity of voltage between

pins 7 and 8.

®

7

XTR101

8. Consider PC board layout which minimizes parasitic

capacitance, especially in high gain.

Figure 6 shows a similar connection for a resistive trans-

ducer. The transducer could be excited either by one (as

shown) or both current sources. Also, the offset adjustment

has higher resolution compared to Figure 5.

SELECTING R_S

R_SPANis chosen to that a given full scale input span e_INFS

CMV AND CMR

will result in the desired full scale output span of ∆I_OFS

,

Ω

The XTR101 is designed to operate with a nominal 5V

common-mode voltage at the input and will function prop-

erly with either input operating over the range of 4V to 6V

with respect to pin 7. The error caused by the 5V CMV is

already included in the accuracy specifications.

[(0.016 ) + (40/R_S)] ∆e_IN= ∆I_O= 16mA.

Solving for R_S:

40

R_S=

(1)

Ω

∆I_O/∆e_IN– 0.016

If the inputs are biased at some other CMV then an input

offset error term is (CMV – 5)/CMRR; CMR is in dB,

CMRR is in V/V.

For example, if ∆e_INFS= 100mV for ∆I_OFS= 16mA,

40

R_S=

=

16mA/100mV) – 0.016

0.16 – 0.016

SIGNAL SUPPRESSION AND ELEVATION

40

In some applications it is desired to have suppressed zero

range (input signal elevation) or elevated zero range (input

signal suppression). This is easily accomplished with the

XTR101 by using the current sources to create the suppres-

sion/elevation voltage. The basic concept is shown in Fig-

ures 7 and 8(a). In this example the sensor voltage is derived

from R_T(a thermistor, RTD, or other variable resistance

element) excited by one of the 1mA current sources. The

other current source is used to create the elevated zero range

voltage. Figures 8(b), (c) and (d) show some of the possible

circuit variations. These circuits have the desirable feature

of noninteractive span and suppression/elevation adjust-

ments. Note: It is not recommended to use the optional offset

voltage null (pins 1, 2 and 14) for elevation/suppression.

This trim capability is used only to null the amplifier’s input

offset voltage. In many applications the already low offset

voltage (typically 20µV) will not need to be nulled at all.

Adjusting the offset voltage to nonzero values will disturb

the voltage drift by ±0.3µV/°C per 100µV or induced offset.

= 278Ω

0.144

See Typical Performance Curves for a plot of R_Svs ∆e_INFS

.

Note that in order not to exceed the 20mA upper range limit,

e_INmust be less than 1V when R_S= ∞ and proportionately

smaller as R_Sdecreases.

BIASING THE INPUTS

Because the XTR operates from a single supply both e₁and

e₂must be biased approximately 5V above the voltage at pin

7 to assure linear response. This is easily done by using one

or both current sources and an external resistor R₂. Figure 5

shows the simplest case— a floating voltage source e'₂. The

2mA from the current sources flows through the 2.5kΩ

value of R₂and both e₁and e₂are raised by the required 5V

with respect to pin 7. For linear operation the constraint is

+4V ≤ e₁≤ +6V

+4V ≤ e₂≤ +6V

The offset adjustment is used to remove the offset voltage of

the input amplifier. When the input differential voltage (e_IN)

equals zero, adjust for 4mA output.

D₁

11

e₁

3

5

10

–

8

1mA 1mA

11

D₁

10

e₁

3

5

+

e_IN

–

R_S

8

XTR101

0.01µF

6

+

–

24V

R_L

e_L

4-20 mA

–

e_IN

+

R_S

–

2mA

4

7

XTR101

Adj.

6

+

14

2

e₂

0.01µF

+

–

24V

R_L

+

100kΩ

1

Offset

Adjust

e_L

e₂

R_T

–

1MΩ

7

e₂

R₂

–

14

+

1

2

4

2.5kΩ

1MΩ

+

I_O

Ω

40

R_S

e'₂

I_O= 4mA + (0.016

+

)e_IN

2mA

+5V

Offset

Adjust

0.01µF

Alternate circuitry

shown in Figure 8.

e_IN= e'₂= 1mA X R_T

R₂

2.5kΩ

Ω

40

R_S

0.01µF

I_O= 4mA + (0.016

_IN= e₂

+

)e_IN

e

2mA

+5V

FIGURE 6. Basic Connection for Resistive Source.

FIGURE 5. Basic Connection for Floating Voltage Source.

®

XTR101

8

at the transducer. Thus the XTR101 is, in general, very

suitable for individualized and special purpose applications.

20

15

10

Span Adjust

EXAMPLE 1

RTD Transducer shown in Figure 9.

Given a process with temperature limits of +25°C and

+150°C, configure the XTR101 to measure the temperature

with a platinum RTD which produces 100Ω at 0°C and

200Ω at +266°C (obtained from standard RTD tables).

Transmit 4mA for +25°C and 20mA for +150°C.

Elevated

Zero

Range

Suppressed

Zero

Range

5

0

COMPUTING R_S:

– 0 +

e_IN(V)

The sensitivity of the RTD is ∆R/∆T = 100Ω/266°C. When

excited with a 1mA current source for a 25°C to 150°C range

(i.e., 125°C span), the span of e_INis 1mA X (100Ω/266°C)

X 125°C = 47mV = ∆e_IN.

FIGURE 7. Elevation and Suppression Graph.

40

From equation 1, R_S=

∆I_O/∆e_IN– 0.016Ω

1mA

–

+

1mA

–

+

e_IN

40

R_S=

=

Ω

= 123.3Ω

16mA/47mV – 0.016

0.3244

+

e'₂

+

–

R_T

V₄

R₄

e'₂

Span adjustment (calibration) is accomplished by trimming

R_S.

–

R_T

+

–

V₄

R₄

COMPUTING R₄:

At +25°C, e'₂= 1mA (R_T+ ∆R_T)

100Ω

2mA

e

V

_IN= (e'₂–V₄)

₄= 1mA X R₄

e'₂= 1mA X R_T

e_IN= (e'₂+V₄)

₄= 1mA X R₄

e'₂= 1mA X R_T

V

= 1mA [100Ω +

X 25°C]

266°C

(a) Elevated Zero Range

(b) Suppressed Zero Range

= 1mA (109.4Ω) = 109.4mV

In order to make the lower range limit of 25°C correspond

to the output lower range limit of 4mA, the input circuitry

shown in Figure 9 is used.

2mA

–

+

e_IN

+

e'₂

+

–

e_IN, the XTR101 differential input, is made 0 at 25°C or

+

V₄

e'_{2 25°C}– V₄= 0

R₄

+

–

V₄

R₄

e'₂

–

thus, V₄= e'_{2 25°C}= 109.4mV

–

V₄

109.4mV

1mA

R₄=

=

= 109.4Ω

2mA

1mA

e

_IN= (e'₂–V₄)

e

_IN= (e'₂+V₄)

V₄= 2mA X R₄

COMPUTING R₂AND CHECKING CMV:

At +25°C, e'₂= 109.4mV

At +150°C, e'₂= 1mA (R_T+ ∆R_T)

100Ω

(c) Elevated Zero Range

(d) Suppressed Zero Range

FIGURE 8. Elevation and Suppression Circuits.

APPLICATION INFORMATION

= 1mA [100Ω +(

X 150°C)]

266°C

The small size, low offset voltage and drift, excellent linear-

ity, and internal precision current sources, make the XTR101

ideal for a variety of two-wire transmitter applications. It can

be used by OEMs producing different types of transducer

transmitter modules and by data acquisition systems manu-

facturers who gather transducer data. Current mode trans-

mission greatly reduces noise interference. The two-wire

nature of the device allows economical signal conditioning

= 156.4mV

Since both e'₂and V₄are small relative to the desired 5V

common-mode voltage, they may be ignored in computing

R₂as long as the CMV is met.

R₂= 5V/2mA = 2.5kΩ

e₂min = 5V + 0.1094V

The +4V to +6V CMV

e₂max = 5V + 0.1564V

requirement is met.

e₁= 5V + 0.1094V

®

9

XTR101

1mA

D

1mA

–

e₁

3

D₁

11

R₅

2kΩ

10

–

11

8

3

10

8

5

–

e_IN

+

R₆

51Ω

R_S

XTR101

+

e₁

–

0.01µF

e_IN

6

4

XTR101

+

–

24V

R_L

e_L

–

Thermocouple

T_TC

+

7

+

R₄

e₂

R_T

V₄

7

4

+

–

+

e₂

–

+

e'₂

0.01µF

V_TC

+

–

V₄

R₄

–

R₂

2.5kΩ

Temperature T₂= T_D

Temperature T₁

0.01µF

FIGURE 10. Thermocouple Input Circuit with Two

Temperature Regions and Diode (D) Cold

Junction Compensation.

FIGURE 9. Circuit for Example 1.

EXAMPLE 2

With e_IN= 0 and V_TC= –1.28mV,

V₄= e₁+ e_IN– V_TC

Thermocouple Transducer shown in Figure 10.

Given a process with temperature (T₁) limits of 0°C and

+1000°C, configure the XTR101 to measure the temperature

with a type J thermocouple that produces a 58mV change for

1000°C change. Use a semiconductor diode for a cold

junction compensation to make the measurement relative to

0°C. This is accomplished by supplying a compensating

voltage, V_R6, equal to that normally produced by the thermo-

couple with its “cold junction” (T₂) at ambient. At a typical

ambient of +25°C this is 1.28mV (obtained from standard

thermocouple tables with reference junction of 0°C). Trans-

mit 4mA for T₁= 0°C and 20mA for T₁= +1000°C. Note:

e_IN= e₂– e₁indicates that T₁is relative to T₂.

= 14.9mV + 0V – (–1.28mV)

1mA (R₄) = 16.18mV

R₄= 16.18Ω

COLD JUNCTION COMPENSATION:

The temperature reference circuit is shown in Figure 11.

The diode voltage has the form

I_DIODE

KT

q

V_D

=

ln

I_SAT

ESTABLISHING R_S:

Typically at T₂= +25°C, V_D= 0.6V and ∆V_D/∆T =

–2mV/°C. R₅and R₆form a voltage divider for the diode

voltage V_D. The divider values are selected so that the

gradient ∆_VD/∆T equals the gradient of the thermocouple at

the reference temperature. At +25°C this is approximately

52µV/°C (obtained from standard thermocouple table);

therefore,

The input full scale span is 58mV (∆e_INFS= 58mV).

R_Sis found from equation (1)

40

R_S=

Ω

∆I_O/∆e_IN– 0.016

R₆

(2)

40

∆T_C/∆T = ∆_VD/∆T

=

Ω

= 153.9Ω

R₅+ R₆

16mA/58mV – 0.016

0.2599

R₆

52µV/°C = 2000µV/°C

SELECTING R₄:

R₄is chosen to make the output 4mA at T_TC= 0°C (V_TC

R₅+ R₆

=

–1.28mV) and T_D= +25°C (V_D= 0.6V). A circuit is shown

in Figure 10.

R₅is chosen as 2kΩ to be much larger than the resistance of

the diode. Solving for R₆yields 51Ω.

V_TCwill be –1.28mV when T_TC= 0°C and the reference

junction is at +25°C. e₁must be computed for the condition

of T_D= +25°C to make e_IN= 0V.

THERMOCOUPLE BURN-OUT INDICATION

In process control applications it is desirable to detect when

a thermocouple has burned out. This is typically done by

forcing the two-wire transmitter current to either limit when

V_{D 25°C}= 600mV

e_{1 25°C}= 600mV (51/2051) = 14.9mV

e_IN= e₂– e₁= V_TC+ V₄– e₁

®

XTR101

10

0.0047µF

1mA

R₅

1mA

(1)

R₃

11

3

–

+

V₅

–

1mA

R₁

+

V_D

–

C₂

D

XTR101

+

R₆

V₆

–

(1)

R₄

4

13

+

12

C₁

R₂

FIGURE 11. Cold Junction Compensation Circuit.

NOTE: (1) R₃and R₄should be equal if used.

2

e²

+

INPUT STAGE

the thermocouple impedance goes very high. The circuits of

Figures 16 and 17 inherently have down scale indication.

When the impedance of the thermocouple gets very large

(open) the bias current flowing into the + input (large

impedance) will cause I_Oto go to its lower range limit value

(about 3.8mA). If up scale indication is desired the circuit of

Figure 18 should be used. When the T_Copens the output will

go to its upper range limit value (about 25mA or higher).

Internally e_{NOISE RTI}

=

OUTPUT STAGE

Gain

FIGURE 12. Optional Filtering.

APPLICATION CIRCUITS

Voltage

Reference

OPTIONAL INPUT OFFSET VOLTAGE TRIM

MC1403A

+

The XTR101 has provisions for nulling the input offset

voltage associated with the input amplifiers. In many appli-

cations the already low offset voltages (30µV max for the B

grade, 60µV max for the A grade) will not need to be nulled

at all. The null adjustment can be done with a potentiometer

at pins 1, 2 and 14 as shown in Figures 5 and 6. Either of

these two circuits may be used. NOTE: It is not recom-

mended to use this input offset voltage nulling capability for

elevation or suppression. See the Signal Suppression and

Elevation section for the proper techniques.

V_R= 2.5V

–

100pF

V+

XTR101

I_O

OPA27

(4-20mA)

V–

R₁

125Ω

R₂

500Ω

I_O⁽¹⁾(0-20mA)

OPTIONAL BANDWIDTH CONTROL

Low-pass filtering is recommended where possible and can

be done by either one of two techniques shown in Figure 12.

C₂connected to pins 3 and 4 will reduce the bandwidth with

a cutoff frequency given by,

V_R

R₂

R₁

NOTE: (1) I_O= 1 +

I_O

–

= 1.25 I_O– 5mA

R₂

Other conversions are readily achievable by

changing the reference and ratio of R₁to R₂.

15.9

f_CO

=

(R₁+ R₂+ R₃+ R₄) (C₂+ 3pF)

FIGURE 13. 0-20mA Output Converter.

This method has the disadvantage of having f_COvary with

R₁, R₂, R₃, R₄, and it may require large values of R₃and R₄.

The other method, using C₁, will use smaller values of

capacitance and is not a function of the input resistors. It is,

however, more subject to nonlinear distortion caused by

slew rate limiting. This is normally not a problem with the

slow signals associated with most process control transduc-

ers. The relationship between C₁and f_COis shown in the

Typical Performance Curves.

®

11

XTR101

2mA

0.9852mA

1.0147mA

1.8kΩ

–

R

LM129

6.9V

Voltage

Ref

300Ω

R_S

XTR101

R

+

0.01µF

4.7kΩ

FIGURE 14. Bridge Input, Voltage Excitation.

1mA

This circuit has down

scale burn-out indication.

2mA

R

1mA

–

300Ω

Type J

–

+

R

R_S

20Ω

RTD

100Ω

XTR101

R_S

XTR101

15Ω

Zero

Adjust

J

+

2.5kΩ

+

2.2kΩ

FIGURE 15. Bridge Input, Current Excitation.

FIGURE 16. Thermocouple Input with RTD Cold Junction

Compensation.

1mA

This circuit has down

scale burn-out indication.

1mA

2kΩ

This circuit has up

1mA

scale burn-out indication.

+

–

Type J

–

+

20Ω

51Ω

R_S

RTD

XTR101

20Ω

100Ω

15Ω

Zero

Adjust

+

2.5kΩ

+

Zero

Adjust

2.5kΩ

FIGURE 17. Thermocouple Input with Diode Cold Junction

Compensation.

FIGURE 18. Thermocouple Input with RTD Cold Junction

Compensation.

®

XTR101

12

11

–

I₁

I₂

10

+V_CC

8

+V_CC

3

OPA21

V_REF

Out

R₁

R₂

XTR101

15V

0.01µF

4

+

7

2.5kΩ

V_REF= ImA R₂

FIGURE 19. Dual Precision Current Sources Operated From One Supply.

Isolation

Barrier

+15V

1µF

P+

+V₂

C₂

–

1kΩ

8

V+

E

722

–V₂

1µF

C₁+V₁–V₁

V–

4-20mA

+

30V

–

+15V

∆e_IN

XTR101

7

1MΩ

15

10

+

–15V

1MΩ

12

7

9

2

4

3

250Ω

ISO100

(1)

V_OUT

+1V to +5V

8

I_REF2

17

–

16

18

NOTE: (1) Can be shifted and amplified

using ISO100 current sources.

I_REF1

FIGURE 20. Isolated Two-Wire Current Loop.

®

13

XTR101

DETAILED ERROR ANALYSIS

The ideal output current is

A. AT THE LOWER RANGE VALUE (T = +25°C).

σ_O= I_{OS RTO}= ±6µA

i_{O IDEAL}= 4mA + K e_IN

∆V_CC

σ_I= V_OSI+ (I_B1∆R + I_OS1R₄) +

PSRR

K is the span (gain) term, (0.016Ω + (40/R_S))

(3)

(e₁+ e₂)/2 – 5V

In the XTR101 there are three major components of error:

+

CMRR

1. σ_O= errors associated with the output stage.

2. σ_S= errors associated with span adjustment.

3. σ_I= errors associated with the input stage.

∆R = R_{T 25°C}– R₄= 109.4 – 109 ≈ 0

∆V_CC= (24 X 0.005) + 4mA (250Ω + 100Ω) + 0.6V

= 120mV + 1400mV + 600mV

= 2120mV

The transfer function including these errors is

i_{O ACTUAL}= (4mA + σ_O) + K (1 + σ_S)(e_IN+ σ_I)

(4)

When this expression is expanded, second order terms

(σ_Sσ₁) dropped, and terms collected, the result is

e₁= (2mA X 2.5kΩ) + (1mA X 109Ω) = 5.109V

e₂= (2mA X 2.5kΩ) + (1mA X 109.4Ω)

= 5.1094V

i_{O ACTUAL}= (4mA + σ_O) + K e_IN+ Kσ_I+ Kσ_Se_IN

(5)

(e₁+ e₂)/2 – 5 = 0.1092V

PSRR= 3.16 X 10⁵for 110dB

CMRR = 31.6 X 10³for 90dB

The error in the output current is i_{O ACTUAL}– i_{O IDEAL}and

can be found by subtracting equations (5) and (3).

i_{O ERROR}= σ_O+ Kσ₁+ Kσ_Se_IN

(6)

σ₁= 30µV + (150nA X 0 + 20nA X 109Ω)

This is a general error expression. The composition of each

component of error depends on the circuitry inside the

XTR101 and the particular circuit in which it is applied. The

circuit of Figure 9 will be used to illustrate the principles.

2120mV

3.16 X 10⁵

0.1092V

3.16 X 10³

+

(10)

= 30µV + 2.18µV + 6.7µV + 3.46µV

= 42.34µV

1. σ_O= I_{OS RTO}

2. σ_S= ε_NONLINEARITY+ ε_SPAN

(7)

(8)

(9)

σ_S= ε_NONLIN+ ε_SPAN

∆V_CC

= 0.0001 + 0 (assumes trim of R_S)

I_Oerror = σ_O+ K σ_I+ K σ_Se_IN

3. σ_I= V_OSI+ (I_B1+ R₄– I_B2R_T) +

PSRR

(e₁+ e₂)/2 – 5V

+

40

R_S

40

Ω

K = 0.016 +

= 0.016 +

= 0.340

CMRR

123.3Ω

The term in parentheses may be written in terms of offset

current and resistor mismatches as I_B1∆R + I_OS' R₄.

e_IN= e₂– V₄= I_REF1R_{T 25°C}– I_REF2R₄

since R_{T 25°C}= R₄,

V_OSI* = input offset voltage

I_B1*, I_B2* = input bias current

I_OSI* = input offset current

e_IN= (I_REF1– I_REF2) R₄= 0.4µA X 109Ω

= 43.6µV

I

_{OS RTO}* = output offset current error

∆R = R_T– R₄= mismatch in resistor

∆V_CC= change supply voltage between

pins 7 and 8 away from 24V nominal

PSRR* = power supply rejection ratio

Since the maximum mismatch of the current references is

0.04% of 1mA = 0.4µA,

Ω

I_Oerror = 6µA + (0.34 X 42.34µV) + (0.34

X

0.0001 X 43.6µV) = 6µA + 14.40µA + 0.0015µA

= 20.40µA

CMRR* = common-mode rejection ratio

ε_NONLIN* = span nonlinearity

20.40µA

ε_SPAN* = span equation error. Untrimmed error

= 5% max. May be trimmed to zero.

% error =

X 100%

16mA

Items marked with an asterisk (*) can be found in the

Electrical Specifications.

0.13% of span at lower range value.

B. AT THE UPPER RANGE VALUE (T = +150°C).

∆R = R_{T 150°C}– R₄= 156.4 – 109.4 = 47Ω

∆V_CC= (24 X 0.005) + 20mA (250Ω + 100Ω) +

0.6V = 7720mV

EXAMPLE 3

The circuit in Figure 9 with the XTR101BG specifications

and the following conditions: R_T= 109.4Ω at 25°C, R_T=

156.4Ω at 150°C, I_O= 4mA at 25°C, I_O= 20mA at 150°C,

R_S= 123.3Ω, R₄= 109Ω, R_L= 250Ω, R_LINE= 100Ω, V_DI

=

e₁= 5.109V

0.6V, V_PS= 24V ±0.5%. Determine the % error at the upper

and lower range values.

e₂= (2mA X 2.5kΩ) + (1mA X 156.4Ω) = 5.156V

(e₁+ e₂)/2 – 5V = 0.1325V

®

XTR101

14

σ_O= 6µA

Upper Range: From equation (11), the predominant errors

are I_{OS RTO}(6µA), V_{OS RTI}(30µV), and I_B(150nA), max, B

grade. Both I_OSand V_OScan be trimmed to zero; however,

the result is an error of 0.09% of span instead of 0.19% span.

σ₁= 30µV + (150nA X 47Ω + 20nA X 190Ω)

7720mV

3.16 X 10⁵

0.1325V

3.16 X 10³

+

= 30µV + 9.23µV + 24µV + 4.19µV

= 67.42µV

RECOMMENDED HANDLING

PROCEDURES FOR INTEGRATED CIRCUITS

All semiconductor devices are vulnerable, in varying

degrees, to damage from the discharge of electrostatic

energy. Such damage can cause performance degradation or

failure, either immediate or latent. As a general practice, we

recommend the following handling procedures to reduce the

risk of electrostatic damage.

σ_S= 0.0001

e_IN= e'₂– V₄= I_REF1R_{T 150°C}– I_REF2R₄

= (1mA X 156.4Ω) – (1mA X 109Ω) = 47mV

I_Oerror = σ_O+ K σ_I+ K σ_Se_IN= 6µA +

Ω

(0.34 X 67.42µV) + (0.34 X 0.0001

X 47000µV) = 6µA + 22.92µA + 1.60µA

= 30.52µA

1. Remove the static-generating materials, such as untreated

plastic, from all areas that handle microcircuits.

30.52µA

2. Ground all operators, equipment, and work stations.

% error =

X 100%

16mA

= 0.19% of span at upper range value.

3. Transport and ship microcircuits, or products incorporat

ing microcircuits, in static-free, shielded containers.

4. Connect together all leads of each device by means of a

conductive material, when the device is not connected

into a circuit.

CONCLUSIONS

Lower Range: From equation (10) it is observed that the

predominant error term is the input offset voltage (30µV for

the B grade). This is of little consequence in many applica-

tions. V_{OS RTI}can, however, be nulled using the pot shown

in Figures 5 and 6. The result is an error of 0.06% of span

instead of 0.13% if span.

5. Control relative humidity to as high a value as practical

(50% recommended).

®

15

XTR101

型号:	XTR101AG
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	BURR-BROWN CORP
包装说明：	CERAMIC, DIP-14
Reach Compliance Code：	unknown
风险等级：	5.89
放大器类型：	INSTRUMENTATION AMPLIFIER
最大平均偏置电流 (IIB)：	0.15 µA
最小共模抑制比：	90 dB
最大输入失调电流 (IIO)：	0.03 µA
最大输入失调电压：	60 µV
JESD-30 代码：	R-CDIP-T14
JESD-609代码：	e0
最大非线性：	0.01%
功能数量：	1
端子数量：	14
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装形状：	RECTANGULAR
封装形式：	IN-LINE
认证状态：	Not Qualified
供电电压上限：	40 V
标称供电电压 (Vsup)：	24 V
表面贴装：	NO
温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE
端子位置：	DUAL

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