Z04 Series
Fig. 1: Maximum power dissipation versus RMS
Fig. 2: RMS on-state current versus ambient
on-state current (full cycle).
temperature (full cycle).
P(W)
IT(RMS)(A)
7
4.5
Rth(j-a)=Rth(j-l)
4.0
3.5
3.0
2.5
2.0
6
5
4
3
2
1.5
Rth(j-a)=100°C/W
1.0
1
0.5
IT(RMS)(A)
Tamb(°C)
0.0
0
0
25
50
75
100
125
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Fig. 3: Relative variation of thermal impedance
junction to ambient versus pulse duration.
Fig. 4: Relative variation of gate trigger current,
holding current and latching current versus
junction temperature (typical values).
IGT,IH,IL [Tj] / IGT,IH,IL [Tj=25°C]
K=[Zth(j-a)/Rth(j-a)]
2.5
1E+0
IGT
2.0
1E-1
1E-2
1.5
IH & IL
1.0
0.5
Tj(°C)
40 60
tp(s)
1E-3
0.0
-40 -20
1E-3
1E-2
1E-1
1E+0
1E+1
1E+2 5E+2
0
20
80 100 120 140
Fig. 5: Surge peak on-state current versus
number of cycles.
Fig. 6: Non-repetitive surge peak on-state
current for sinusoidal pulse with width
a
tp < 10ms, and corresponding value of I²t.
ITSM(A)
ITSM (A), I²t (A²s)
25
500
Tj initial=25°C
t=20ms
20
100
10
1
dI/dt limitation:
20A/µs
One cycle
ITSM
Non repetitive
Tj initial=25°C
15
Repetitive
Tamb=25°C
10
I²t
5
tp (ms)
Number of cycles
0
1
10
100
1000
0.01
0.10
1.00
10.00
4/6
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