A-Data
ADS8608A8A
AC Characteristics
Speed
75
75A
Parameter
Symbol
Unit
Note
Min
7.5
7
Max
Min
Max
/CAS Latency = 2 tCK2
/CAS Latency = 3 tCK3
1000
1000
10
10
7
System clock
Cycle time
ns
7.5
2.5
2.5
2.5
2.5
Clock high pulse width
Clock low pulse width
tCHW
tCLW
ns
ns
1
1
5.4
5.4
/CAS Latency = 2 tAC2
/CAS Latency = 3 tAC3
Access time form
clock
ns
2
Write Recovery /CAS Latency = 2 tWR2
7.5
7
10
7.5
65
7.5
Time
/CAS Latency = 3 tWR3
56
/RAS cycle time
tRC
ns
ns
ns
ns
ns
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
15
40
15
15
1
20
45
20
15
1
/RAS to /CAS delay
tRCD
tRAS
tRP
100K
/RAS active time
100K
/RAS precharge time
/RAS to /RAS bank active delay
/CAS to /CAS delay
tRRD
tCCD
tDS
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
3
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
3
Data – input setup time
Data – input hold time
Address setup time
1
1
1
1
1
1
1
1
tDH
tAS
Address hold time
tAH
CKE setup time
tCKS
tCKH
tCMS
tCMH
tOH
CKE hold time
Command setup time
Command hold time
Output Data Hold Time
Output Data High Impedance Time
Output Data Low Impedance Time
Mode register Set Cycle Time
Refresh time
3
7
3
tHZ
7.5
64
0
0
tLZ
14
15
tRSC
tREF
64
Note : 1. Assume tR / tF (input rise and fall time) is 1 ns.
2. Access times to be measured with input signals of 1v / ns edge rate.
3.A new command can be given tRRC after self refresh exit.
Rev 1.0 December, 2001
6
ADATA [ ADATA Technology Co., Ltd. ]
