I/Os Per Package
1
ProASIC3
Devices
ARM7 Devices
Cortex-M1
Devices
M1A3P250
3,6
I/O Type
Differential I/O Pairs
Differential I/O Pairs
Differential I/O Pairs
Differential I/O Pairs
–
–
–
–
35
25
44
74
FG484
23 × 23
529
1.0
2.23
Single-Ended I/O
2
Single-Ended I/O
2
Single-Ended I/O
2
Single-Ended I/O
2
–
–
–
–
154
97
177
300
M1A3P400
3
M1A3P600
A3P015
A3P030
A3P060
A3P125
A3P250
3
A3P400
3
A3P600
A3P1000
M7A3P1000
M1A3P1000
Single-Ended I/O
Single-Ended I/O
Single-Ended I/O
Package
QN68
QN132
VQ100
TQ144
PQ208
FG144
FG256
FG484
Notes:
49
–
–
–
–
–
–
–
–
81
77
–
–
–
–
–
–
80
71
91
–
96
–
–
Single-Ended I/O
–
84
71
100
133
97
–
–
–
87
68
–
151
97
157
–
–
19
13
–
34
24
38
–
–
–
–
–
151
97
178
194
–
–
–
–
34
25
38
38
–
154
97
177
235
–
–
–
–
35
25
43
60
1. When considering migrating your design to a lower- or higher-density device, refer to the
handbook to ensure complying with design and board migration requirements.
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For A3P250 and A3P400 devices, the maximum number of LVPECL pairs in east and west banks cannot exceed 15. Refer
to the
handbook for position assignments of the 15 LVPECL pairs.
4. FG256 and FG484 are footprint-compatible packages.
5. "G" indicates RoHS-compliant packages. Refer to
for the location of the
"G" in the part number.
6. The M1A3P250 device does not support FG256 or QN132 packages.
Table 1-1 •
ProASIC3 FPGAs Package Sizes Dimensions
Package
Length × Width
(mm\mm)
Nominal Area
(mm
2
)
Pitch (mm)
Height (mm)
QN68
8×8
64
0.4
0.90
QN132
8×8
64
0.5
0.75
VQ100
14 × 14
196
0.5
1.00
TQ144
20 × 20
400
0.5
1.40
PQ208
28 × 28
784
0.5
3.40
FG144
13 × 13
169
1.0
1.45
FG256
17 × 17
289
1.0
1.60
II
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