Automotive ProASIC3 Flash FPGAs
Advanced Flash Technology
The Automotive ProASIC3 family offers many benefits, including nonvolatility and
reprogrammability, through an advanced flash-based, 130-nm LVCMOS process with seven layers of
metal. Standard CMOS design techniques are used to implement logic and control functions. The
combination of fine granularity, enhanced flexible routing resources, and abundant flash switches
allows for very high logic utilization without compromising device routability or performance.
Logic functions within the device are interconnected through a four-level routing hierarchy.
Advanced Architecture
The proprietary Automotive ProASIC3 architecture provides granularity comparable to standard-
cell ASICs. The Automotive ProASIC3 device consists of five distinct and programmable architectural
features (Figure
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FPGA VersaTiles
Dedicated FlashROM
Dedicated SRAM memory
Extensive CCCs and PLLs
Advanced I/O structure
The FPGA core consists of a sea of VersaTiles. Each VersaTile can be configured as a three-input
logic function, a D-flip-flop (with or without enable), or a latch by programming the appropriate
flash switch interconnections. The versatility of the Automotive ProASIC3 core tile as either a three-
input lookup table (LUT) equivalent or a D-flip-flop/latch with enable allows for efficient use of the
FPGA fabric. The VersaTile capability is unique to the Actel ProASIC family of third-generation-
architecture flash FPGAs. VersaTiles are connected with any of the four levels of routing hierarchy.
Flash switches are distributed throughout the device to provide nonvolatile, reconfigurable
interconnect programming. Maximum core utilization is possible for virtually any design.
In addition, extensive on-chip programming circuitry allows for rapid, single-voltage (3.3 V)
programming of Automotive ProASIC3 devices via an IEEE 1532 JTAG interface.
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ACTEL [ Actel Corporation ]
