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A3P250-FG144T 参数 Datasheet PDF下载

A3P250-FG144T图片预览
型号: A3P250-FG144T
PDF下载: 下载PDF文件 查看货源
内容描述: 汽车的Flash的ProASIC3系列FPGA [Automotive ProASIC3 Flash Family FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 136 页 / 4329 K
品牌: ACTEL [ Actel Corporation ]
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Automotive ProASIC3 Flash FPGAs
VersaTiles
The Automotive ProASIC3 core consists of VersaTiles, which have been enhanced beyond the
ProASIC
PLUS®
core tiles. The Automotive ProASIC3 VersaTile supports the following:
All 3-input logic functions—LUT-3 equivalent
Latch with clear or set
D-flip-flop with clear or set
Enable D-flip-flop with clear or set
Refer to
for VersaTile configurations.
LUT-3 Equivalent
X1
X2
X3
D-Flip-Flop with Clear or Set
Data
CLK
CLR
Y
D-FF
Enable D-Flip-Flop with Clear or Set
Data
CLK
Enable
CLR
D-FF
Y
LUT-3
Y
Figure 1-3 •
VersaTile Configurations
User Nonvolatile FlashROM
Actel Automotive ProASIC3 devices have 1 kbit of on-chip, user-accessible, nonvolatile FlashROM.
The FlashROM can be used in diverse system applications:
Unique protocol addressing (wireless or fixed)
System calibration settings
Device serialization and/or inventory control
Subscription-based business models (for example, infotainment systems)
Secure key storage for secure communications algorithms
Asset management/tracking
Date stamping
Version management
The FlashROM is written using the standard Automotive ProASIC3 IEEE 1532 JTAG programming
interface.
The FlashROM can be programmed via the JTAG programming interface, and its contents can be
read back either through the JTAG programming interface or via direct FPGA core addressing. Note
that the FlashROM can only be programmed from the JTAG interface and cannot be programmed
from the internal logic array.
The FlashROM is programmed as 8 banks of 128 bits; however, reading is performed on a byte-by-
byte basis using a synchronous interface. A 7-bit address from the FPGA core defines which of the 8
banks and which of the 16 bytes within that bank are being read. The three most significant bits
(MSBs) of the FlashROM address determine the bank, and the four least significant bits (LSBs) of
the FlashROM address define the byte.
The Actel Automotive ProASIC3 development software solutions, Libero
®
Integrated Design
Environment (IDE) and Designer, have extensive support for the FlashROM. One such feature is
auto-generation of sequential programming files for applications requiring a unique serial number
in each part. Another feature allows the inclusion of static data for system version control. Data for
the FlashROM can be generated quickly and easily using Actel Libero IDE and Designer software
tools. Comprehensive programming file support is also included to allow for easy programming of
large numbers of parts with differing FlashROM contents.
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