IGLOO PLUS Device Family Overview
Security
The nonvolatile, flash-based IGLOO PLUS devices do not require a boot PROM, so there is no
vulnerable external bitstream that can be easily copied. IGLOO PLUS devices incorporate FlashLock,
which provides a unique combination of reprogrammability and design security without external
overhead, advantages that only an FPGA with nonvolatile flash programming can offer.
IGLOO PLUS devices (except AGLP030) utilize a 128-bit flash-based lock and a separate AES key to
secure programmed intellectual property and configuration data. In addition, all FlashROM data in
IGLOO PLUS devices can be encrypted prior to loading, using the industry-leading AES-128
(FIPS192) bit block cipher encryption standard. AES was adopted by the National Institute of
Standards and Technology (NIST) in 2000 and replaces the 1977 DES standard. IGLOO PLUS devices
have a built-in AES decryption engine and a flash-based AES key that make them the most
comprehensive programmable logic device security solution available today. IGLOO PLUS devices
with AES-based security allow for secure, remote field updates over public networks such as the
Internet, and ensure that valuable IP remains out of the hands of system overbuilders, system
cloners, and IP thieves. The contents of a programmed IGLOO PLUS device cannot be read back,
although secure design verification is possible.
Security, built into the FPGA fabric, is an inherent component of the IGLOO PLUS family. The flash
cells are located beneath seven metal layers, and many device design and layout techniques have
been used to make invasive attacks extremely difficult. The IGLOO PLUS family, with FlashLock and
AES security, is unique in being highly resistant to both invasive and noninvasive attacks. Your
valuable IP is protected and secure, making remote ISP possible. An IGLOO PLUS device provides
the most impenetrable security for programmable logic designs.
Single Chip
Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed,
the configuration data is an inherent part of the FPGA structure, and no external configuration
data needs to be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based
IGLOO PLUS FPGAs do not require system configuration components such as EEPROMs or
microcontrollers to load device configuration data. This reduces bill-of-materials costs and PCB
area, and increases security and system reliability.
The IGLOO PLUS devices can be operated with a 1.2 V or 1.5 V single-voltage supply for core and
I/Os, eliminating the need for additional supplies while minimizing total power consumption.
Live at Power-Up
The Actel flash-based IGLOO PLUS devices support Level 0 of the LAPU classification standard. This
feature helps in system component initialization, execution of critical tasks before the processor
wakes up, setup and configuration of memory blocks, clock generation, and bus activity
management. The LAPU feature of flash-based IGLOO PLUS devices greatly simplifies total system
design and reduces total system cost, often eliminating the need for CPLDs and clock generation
PLLs. In addition, glitches and brownouts in system power will not corrupt the IGLOO PLUS device's
flash configuration, and unlike SRAM-based FPGAs, the device will not have to be reloaded when
system power is restored. This enables the reduction or complete removal of the configuration
PROM, expensive voltage monitor, brownout detection, and clock generator devices from the PCB
design. Flash-based IGLOO PLUS devices simplify total system design and reduce cost and design
risk while increasing system reliability and improving system initialization time.
IGLOO PLUS flash FPGAs allow the user to quickly enter and exit Flash*Freeze mode. This is done
almost instantly (within 1 µs), and the device retains configuration and data in registers and RAM.
Unlike SRAM-based FPGAs, the device does not need to reload configuration and design state from
external memory components; instead, it retains all necessary information to resume operation
immediately.
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike
SRAM-based FPGAs, flash-based IGLOO PLUS devices allow all functionality to be live at power-up;
no external boot PROM is required. On-board security mechanisms prevent access to all the
programming information and enable secure remote updates of the FPGA logic. Designers can
perform secure remote in-system reprogramming to support future design iterations and field
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ACTEL [ Actel Corporation ]
