Axcelerator Family FPGAs
Silicon Explorer II Probe Interface
Silicon Explorer II is an integrated hardware and
software solution that, in conjunction with the Designer
tools, allows users to examine any of the internal nets
(except I/O registers) of the device while it is operating in
a prototype or a production system. The user can probe
up to four nodes at a time without changing the
placement and routing of the design and without using
any additional device resources. Highlighted nets in
Designer’s ChipPlanner can be accessed using Silicon
Explorer II in order to observe their real time values.
Silicon Explorer II's noninvasive method does not alter
timing or loading effects, thus shortening the debug
cycle. In addition, Silicon Explorer II does not require
relayout or additional MUXes to bring signals out to
external pins, which is necessary when using
programmable logic devices from other suppliers. By
eliminating multiple place-and-route program cycles, the
integrity of the design is maintained throughout the
debug process.
Each member of the Axcelerator family has four external
pads: PRA, PRB, PRC, and PRD. These can be used to bring
out four probe signals from the Axcelerator device (note
that the AX125 only has two probe signals that can be
observed: PRA and PRB). Each core tile has up to two
probe signals. To disallow probing, the SFUS security fuse
in the silicon signature has to be programmed (see
Silicon Explorer II connects to the host PC using a
standard serial port connector. Connections to the circuit
board are achieved using a nine-pin D-Sub connector
Once the design has been
placed-and-routed, and the Axcelerator device has been
programmed, Silicon Explorer II can be connected and
the Explorer software can be launched.
Silicon Explorer II comes with an additional optional PC
hosted tool that emulates an 18-channel logic analyzer.
Four channels are used to monitor four internal nodes,
and 14 channels are available to probe external signals.
The software included with the tool provides the user
with an intuitive interface that allows for easy viewing
and editing of signal waveforms.
Programming
Device programming is supported through the Silicon
Sculptor II, a single-site, robust and compact device
programmer for the PC. Up to four Silicon Sculptor IIs can
be daisy-chained and controlled from a single PC host.
With standalone software for the PC, Silicon Sculptor II is
designed to allow concurrent programming of multiple
units from the same PC when daisy-chained.
Silicon Sculptor II programs devices independently to
achieve the fastest programming times possible. Each
fuse is verified by Silicon Sculptor II to ensure correct
programming. Furthermore, at the end of programming,
there are integrity tests that are run to ensure that
programming was completed properly. Not only does it
test programmed and nonprogrammed fuses, Silicon
Sculptor II also provides a self-test to test its own
hardware extensively.
Programming an Axcelerator device using Silicon
Sculptor II is similar to programming any other antifuse
device. The procedure is as follows:
1. Load the .AFM file.
2. Select the device to be programmed.
3. Begin programming.
When the design is ready to go to production, Actel
offers device volume-programming services either
through distribution partners or via our In-House
Programming Center.
In addition, BP
programmers that
Axcelerator devices.
Microsystems offers multi-site
provide qualified support for
For more details on programming the Axcelerator
devices, please refer to the
v2.7
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ACTEL [ Actel Corporation ]
