Axcelerator Family FPGAs
Figure 1-2 •
Axcelerator Family Interconnect Elements
Logic Modules
Actel's Axcelerator family provides two types of logic
modules: the register cell (R-cell) and the combinatorial
cell (C-cell). The
can implement more than 4,000 combinatorial functions
of up to five inputs (Figure
The R-cell contains a flip-flop featuring asynchronous
clear, asynchronous preset, and active-low enable control
signals (Figure
The R-cell registers
feature programmable clock polarity selectable on a
register-by-register basis. This provides additional
flexibility (e.g., easy mapping of dual-data-rate functions
into the FPGA) while conserving valuable clock resources.
The clock source for the R-cell can be chosen from the
hardwired clocks, routed clocks, or internal logic.
Two C-cells, a single R-cell, and two Transmit (TX) and two
Receive (RX) routing buffers form a Cluster, while two
Clusters comprise a SuperCluster (Figure
Each SuperCluster also contains an independent Buffer (B)
module, which supports buffer insertion on high-fanout
nets by the place-and-route tool, minimizing system
delays while improving logic utilization.
The logic modules within the SuperCluster are arranged
so that two combinatorial modules are side-by-side,
giving a C–C–R – C–C–R pattern to the SuperCluster. This
C–C–R pattern enables efficient implementation
(minimum delay) of two-bit carry logic for improved
arithmetic performance (Figure
The AX architecture is fully fracturable, meaning that if
one or more of the logic modules in a SuperCluster are
used by a particular signal path, the other logic modules
are still available for use by other paths.
At the chip level, SuperClusters are organized into core
tiles, which are arrayed to build up the full chip. For
example, the AX1000 is composed of a 3x3 array of nine
core tiles. Surrounding the array of core tiles are blocks
of I/O Clusters and the I/O bank ring (Table
Each core tile consists of an array of 336
SuperClusters and four SRAM blocks (176 SuperClusters
and three SRAM blocks for the AX250). The SRAM blocks
are arranged in a column on the west side of the tile
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v2.7
ACTEL [ Actel Corporation ]
