ADSP-2189M
ABSOLUTE MAXIMUM RATINGS1
Parameter
Value
Min Max
Internal Supply Voltage (VDDINT
)
–0.3 V +3.0 V
External Supply Voltage (VDDEXT
)
–0.3 V +4.6 V
–0.5 V +4.6 V
–0.5 V VDDEXT + 0.5 V
Input Voltage2
Output Voltage Swing3
Operating Temperature Range (Ambient) –40°C +85°C
Storage Temperature Range
Lead Temperature (5 sec) LQFP
–65°C +150°C
+280°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Applies to Bidirectional pins (D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0,
TFS1, A1–A13, PF0–PF7) and Input only pins (CLKIN, RESET, BR, DR0,
DR1, PWD).
3AppliestoOutputpins(BG,PMS,DMS, BMS,IOMS, CMS,RD,WR, PWDACK,
A0, DT0, DT1, CLKOUT, FL2-0, BGH).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADSP-2189M features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
MEMORY TIMING SPECIFICATIONS
TIMING PARAMETERS
The table below shows common memory device specifications
and the corresponding ADSP-2189M timing parameters, for
your convenience.
GENERAL NOTES
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
Memory
Device
Specification
Timing
Parameter
Parameter Definition1
Address Setup to
Write Start
tASW
A0–A13, xMS Setup before
WR Low
TIMING NOTES
Address Setup to
Write End
tAW
A0–A13, xMS Setup before
WR Deasserted
Switching characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use
switching characteristics to ensure that any timing requirement
of a device connected to the processor (such as memory) is
satisfied.
Address Hold Time tWRA
A0–A13, xMS Hold before
WR Low
Data Setup Time
tDW
Data Setup before WR
High
Data Hold Time
OE to Data Valid
tDH
tRDD
Data Hold after WR High
RD Low to Data Valid
Timing requirements apply to signals that are controlled by
circuitry external to the processor, such as the data input for a
read operation. Timing requirements guarantee that the proces-
sor operates correctly with other devices.
Address Access Time tAA
A0–A13, xMS to Data Valid
NOTE
1xMS = PMS, DMS, BMS, CMS or IOMS.
REV. A
–15–
ADI [ ADI ]
