ADSP-2189M
FREQUENCY DEPENDENCY FOR TIMING
Output Drive Currents
SPECIFICATIONS
Figure 14 shows typical I-V characteristics for the output drivers
on the ADSP-2189M. The curves represent the current drive
capability of the output drivers as a function of output voltage.
tCK is defined as 0.5tCKI. The ADSP-2189M uses an input clock
with a frequency equal to half the instruction rate: a 37.50 MHz
input clock (which is equivalent to 28 ns) yields a 13 ns proces-
sor cycle (equivalent to 75 MHz). tCK values within the range of
0.5tCKI period should be substituted for all relevant timing pa-
rameters to obtain the specification value.
80
V
60
40
OH
V
= 3.6V @ –40؇C
= 3.3V @ +25؇C
DDEXT
Example: tCKH = 0.5tCK – 7 ns = 0.5 (15 ns) – 7 ns = 0.5 ns
V
DDEXT
20
ENVIRONMENTAL CONDITIONS1
V
= 2.5V @ +85؇C
DDEXT
0
Rating Description
Symbol
Value
–20
–40
V
= 3.6V @ –40؇C
DDEXT
Thermal Resistance
(Case-to-Ambient)
(Junction-to-Ambient)
(Junction-to-Case)
θCA
θJA
θJC
48°C/W
50°C/W
2°C/W
V
= 2.5V @ +85؇C
DDEXT
V
OL
V
= 3.3V @ +25؇C
DDEXT
–60
–80
NOTE
1Where the ambient temperature rating (TAMB) is:
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
SOURCE VOLTAGE – V
TAMB = TCASE – (PD × θCA
)
TCASE = Case temperature in °C
Figure 14. Typical Output Driver Characteristics
PD = Power dissipation in W.
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C × VDD2 × f
C = load capacitance, f = output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as follows:
Assumptions:
•
External data memory is accessed every cycle with 50% of
the address pins switching.
•
External data memory writes occur every other cycle with
50% of the data pins switching.
•
•
Each address and data pin has a 10 pF total load at the pin.
The application operates at VDDEXT = 3.3 V and tCK = 15 ns.
Total Power Dissipation = PINT + (C × VDDEXT2 × f)
P
INT = internal power dissipation from Power vs. Frequency
graph (Figure 15).
(C × VDDEXT2 × f) is calculated for each output:
# of
Pins C
f
2
Parameters
VDDEXT
PD
Address, DMS
Data Output, WR 9
RD
CLKOUT
8
10 pF 3.32 V
10 pF 3.32 V
10 pF 3.32 V
10 pF 3.32 V
33.3 MHz
16.67 MHz 16.3 mW
16.67 MHz
33.3 MHz
29.0 mW
1
1
1.8 mW
3.6 mW
50.7 mW
Total power dissipation for this example is PINT + 50.7 mW.
–16–
REV. A
ADI [ ADI ]
