OP37
1.
2.
3.
4.
6.
7.
8.
NULL
(–) INPUT
(+) INPUT
V–
OUTPUT
V+
NULL
Wafer Test Limits
Parameter
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Input Voltage
Range
Common Mode
Rejection Ratio
Power Supply
Rejection Ratio
Symbol
V
OS
I
OS
I
B
IVR
CMRR
(V
S
= 15 V, T
A
= 25 C for OP37N, OP37G, and OP37GR devices; T
A
= 125 C for OP37NT and OP37GT devices,
unless otherwise noted.)
Conditions
Note 1
OP37NT
Limit
60
50
±
60
±
10.3
V
CM
=
±
11 V
108
OP37N
Limit
35
35
±
40
±
11
114
OP37GT
Limit
200
85
±
95
±
10.3
100
OP37G
Limit
60
50
±
55
±
11
106
OP37GR
Limit
100
75
±
80
±
11
100
Unit
µV
MAX
nA MAX
nA MAX
V MIN
dB MIN
PSRR
T
A
= 25°C,
V
S
=
±
4 V to
±
18 V
10
T
A
= 125°C,
V
S
=
±
4.5 V to
±
18 V
16
R
L
≥
2 kΩ,
V
O
=
±
10 V
R
L
≥
1 kΩ,
V
O
=
±
10 V
R
L
≥
2 kΩ
R
L
≥
600 kΩ
V
O
= 0
600
10
10
10
20
µV/V
MAX
µV/V
MAX
20
Large-Signal
Voltage Gain
A
VO
1000
800
500
1000
800
700
V/mV MIN
V/mV MIN
Output Voltage
Swing
Power
Consumption
V
O
P
d
±
11.5
±
12
±
10
140
±
11
±
12
±
10
140
±
11.5
±
10
170
V MIN
V MIN
mW MAX
NOTES
For 25°C characterlstics of OP37NT and OP37GT devices, see OP37N and OP37G characteristics, respectively.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. A
–5–
AD [ ANALOG DEVICES ]
