instead of the current one, and therefore a currently set status bit will not be seen by the Bus Controller.
Therefore the user is advised to hold SERVREQ low until the requested service takes place.
Use of the Subsystem Status Bit
This status bit is used by the RT to indicate a subsystem fault condition. If the subsystem sets SSERR low at
any time, the subsystem fault condition in the RT will be set, and the Subsystem Flag status bit will subsequently
be set. The fault condition will also be set if a handshaking failure takes place during a data transfer to or from
the subsystem. The fault condition is cleared on power-up or by a Reset mode command.
Dynamic Bus Control Acceptance Status Bit
DBCACC, when set true, enables an RT to configure itself into a Bus Controller, if the subsystem has the
capability, by allowing DBCREQ to pulse true and BIT TIME 18 to be set in the status response. If Dynamic Bus
Control is not required then DBCACC must be tied high. DBCACC tied high inhibits DBCREQ and clears BIT
TIME 18 in the status response.
OPTIONAL STATUS WORD CONTROL
Message Error Bit
The CT1990/1 monitors all receptions for errors and sets the Message Error Bit as prescribed in
MIL-STD-1553B. The subsystem designer may, however, exercise the option of monitoring for illegal commands
and forcing the Message Error Bit to be set.
The word count and subaddress lines for the current command are valid when INCMD goes low. The subsystem
must then determine whether or not the word count or subaddress is to be considered illegal by the RT. If either
of them is considered illegal, the subsystem must produce a positive-going pulse called MEREQ. The
positive-going edge of MEREQ must occur within 500 ns of the falling edge of INCMD .
Subsystem Flag and Terminal Flag Bits
The conditions that cause the Subsystem Flag and Terminal Flag Bits in the Status Word to be reset may be
controlled by the subsystem using the ENABLE, BIT DECODE, NEXT STATUS, and STATUS UPDATE inputs. If
ENABLE is inactive (high), then the Terminal Flag and Subsystem Flag behavior is the same as described
below: (i.e. the other three option lines are disabled).
Subsystem Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset
the remote terminal (code 01000).
This bit shall be set in the current status register if the subsystem error line, SSERR, from the subsystem
ever goes active low. This bit shall also be set if an RT/subsystem handshaking failure occurs. This bit,
once set, shall be repeatedly set until the detected error condition is known to be no longer present.
Terminal Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset
the remote terminal (code 01000). This bit can be set to logic one in the current status register in four
possible ways:
a) If the RX detects any message encoding error in the terminals transmission. A loop test failure,
LTFAIL, will be signalled which shall cause the Terminal Flag to be set and the transmission aborted.
b) If a transmitter timeout occurs while the terminal is transmitting.
c) If a remote terminal self test fails.
d) If there is a parity error in the hard wired address to the RX chip.
This bit, once set, shall be repeatedly set until the detected error condition is known to be no longer
present. The transmission of this bit as a logic one can be inhibited a legal mode command to inhibit
terminal flag bit (code 00110). Similarly, this inhibit can be removed by a mode command to override inhibit
terminal flag bit (code 00111), a power up initialization or a legal mode command to reset remote terminal
(code 01000).
Aeroflex Circuit Technology
6
SCDCT1990 REV B 8/21/00 Plainview NY (516) 694-6700
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
