STATUS INPUTS
Aeroflex Circuit Technology
RTADDR
DBACCEPT
SSFLAG
SERREQ
SSERR
SSBUSY
MODE CODE CONTROL
CH A
CONTROL
REMOTE
TERMINAL
LOGIC
TXINH A
TXDATA A
TXDATA A
RXDATA A
RXDATA A
CH A
ENCODE/
DECODE
WC0-WC4
T/R
LMC
ILLCMD
I/O0 - I/O16
DATA
BUFFERS
DATA BUS
BUFENA
R/W
EN
2
CH B
CONTROL
CONTROL BUS
BUS
CONTROLLER
LOGIC
I/O BUS
I/O LOGIC
BUFFERS
PARITY
CHECKER
TXINH
TXDATA
TXDATA
RXDATA
RXDATA
B
B
B
B
B
CH B
ENCODE/
DECODE
RTADDR
RTADR0
RTADR1
RTADR2
RTADR3
RTADR4
RTADRP
RTADDR
BUSREQ
BUSGRNT
BUSACK
TIMEOUT
SOM
EOM
INCMD
CS
OE
WR
TESTIN
TESTOUT
RT/BC
MT
BCSTART
CHA/CHB
LOOPERR
MSGERR
STATERR
LWORD
HSFAIL
STATEN
BITEN
NBGRNT
ADRINC
NODT
BSCTRCV
16MHz
SCDCT2561 REV A 8/16/99 Plainview NY (516) 694-6700
Figure 1 – CT2561 Block Diagram