Table 1A – Pin Function Table (78 Pin Plug-In) (continued)
Pin #
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
Symbol
EOM
BUFENA
BUSACK
DB1
DB3
DB5
DB7
DB9
DB11
DB13
DB15(MSB)
STATERR
TXDATA A
RXDATA A
NODT
RTAD0
RTAD2
RTAD4
BCSTRCV
TXDATA B
RXDATA B
SOM
I/O
O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
O
I
I
I
O
O
I
O
Description
End of message output. Logic "0" occurs when BC/RT message is completed.
Buffer enable input, may be driven LOW by STATEN or BITEN if subsystem
must read bit or Status words. Enables internal 16 bit bus onto subsystem bus.
Bus acknowledge output. LOW during DMA Handshake, in response to
BUSGRNT.
Bit 1 of 16 bit parallel bus.
Bit 3 of 16 bit parallel bus.
Bit 5 of 16 bit parallel bus.
Bit 7 of 16 bit parallel bus.
Bit 9 of 16 bit parallel bus.
Bit 11 of 16 bit parallel bus.
Bit 13 of 16 bit parallel bus.
Bit 15 of 16 bit parallel bus.
BC output indicates one or more bits set or address mismatch in a received
status word.
Bipolar serial data output to negative input of bus transceiver.
Bipolar serial data input from positive output of bus transceiver.
No data input. Logic "0" indicates the 1553 bus is idle; HIGH means device front
end is active.
LSB of 5 bit RT address.
Bit 2 of RT address.
Bit 4 of RT address.
Broadcast receive. Logic "0" means the current command was a broadcast
command.
Bipolar serial output to positive input of bus transceiver.
Bipolar serial input from negative output of bus transceiver.
Start of message output indicates beginning of RT/BC message transfer
sequence.
Aeroflex Circuit Technology
5
SCDCT2561 REV A 8/16/99 Plainview NY (516) 694-6700
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
