USS-820FD
USB Device Controller
Data Sheet, Rev. 1
August 2004
Register Interface (continued)
Table 14. Serial Bus Interrupt Register (SBI)—Address: 14H; Default: 0000 0000B
This register contains the USB function’s transmit and receive done interrupt flags for nonisochronous endpoints.
These bits are never set for isochronous endpoints.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
FRXD3
FTXD3
FRXD2
FTXD2
FRXD1
FTXD1
FRXD0
FTXD0
R/W (S*)
Bit
Symbol
Function/Description
7
6
5
4
3
2
1
0
FRXD3
FTXD3
FRXD2
FTXD2
FRXD1
FTXD1
FRXD0
FTXD0
Function Receive Done Flag, Endpoint 3.
Function Transmit Done Flag, Endpoint 3.
Function Receive Done Flag, Endpoint 2.
Function Transmit Done Flag, Endpoint 2.
Function Receive Done Flag, Endpoint 1.
Function Transmit Done Flag, Endpoint 1.
Function Receive Done Flag, Endpoint 0.
Function Transmit Done Flag, Endpoint 0.
* S = shared bit. See Special Firmware Action for Shared Register Bits section.
For all bits in the interrupt flag register, a 1 indicates that an interrupt is actively pending; a 0 indicates that the inter-
rupt is not active. The interrupt status is shown regardless of the state of the corresponding interrupt enable bit in
the SBIE/SBIE1.
Hardware can only set bits to 1. In normal operation, firmware should only clear bits to 0. Firmware can also set the
bits to 1 for test purposes. This allows the interrupt to be generated in firmware.
A set receive bit indicates either that valid data is waiting to be serviced in the RX FIFO for the indicated endpoint
and that the data was received without error and has been acknowledged, or that data was received with a receive
data error requiring firmware intervention to be cleared.
A set transmit bit indicates either that data has been transmitted from the TX FIFO for the indicated endpoint and
has been acknowledged by the host, or that data was transmitted with an error requiring firmware intervention to be
cleared.
If TXNAKE = 1, this also may indicate that a NAK was sent to the host in response to an IN packet that was
received when TXFIF = 00. This condition also sets TXVOID. This SBI/SBI1 setting will persist until firmware clears
TXVOID (or clears TXNAKE).
16
Agere Systems Inc.
AGERE [ AGERE SYSTEMS ]
