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L-USS820FD-DB 参数 Datasheet PDF下载

L-USS820FD-DB图片预览
型号: L-USS820FD-DB
PDF下载: 下载PDF文件 查看货源
内容描述: USB设备控制器 [USB Device Controller]
分类和应用: 外围集成电路控制器时钟
文件页数/大小: 56 页 / 846 K
品牌: AGERE [ AGERE SYSTEMS ]
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Data Sheet, Rev. 1
August 2004
USS-820FD
USB Device Controller
Register Interface
(continued)
Register Descriptions
Table 12. Serial Bus Interrupt Enable Register (SBIE)—Address: 16H; Default: 0000 0000B
This register enables and disables the receive and transmit done interrupts for function endpoints 0 through 3.
Bit 7
FRXIE3
Bit 6
FTXIE3
Bit 5
FRXIE2
Bit 4
FTXIE2
R/W
Bit* Symbol
7
6
5
4
3
2
1
0
FRXIE3
FTXIE3
FRXIE2
FTXIE2
FRXIE1
FTXIE1
FRXIE0
FTXIE0
Function/Description
Function Receive Interrupt Enable 3.
Enables receive done interrupt for endpoint 3 (FRXD3).
Function Transmit Interrupt Enable 3.
Enables transmit done interrupt for endpoint 3 (FTXD3).
Function Receive Interrupt Enable 2.
Enables receive done interrupt for endpoint 2 (FRXD2).
Function Transmit Interrupt Enable 2.
Enables transmit done interrupt for endpoint 2 (FTXD2).
Function Receive Interrupt Enable 1.
Enables receive done interrupt for endpoint 1 (FRXD1).
Function Transmit Interrupt Enable 1.
Enables transmit done interrupt for endpoint 1 (FTXD1).
Function Receive Interrupt Enable 0.
Enables receive done interrupt for endpoint 0 (FRXD0).
Function Transmit Interrupt Enable 0.
Enables transmit done interrupt for endpoint 0 (FTXD0).
Bit 3
FRXIE1
Bit 2
FTXIE1
Bit 1
FRXIE0
Bit 0
FTXIE0
* For all bits, a 1 indicates that the interrupt is enabled and causes an interrupt to be signaled to the microcontroller. A 0 indicates that the asso-
ciated interrupt source is disabled and cannot cause an interrupt. However, the interrupt bit’s value is still reflected in the SBI/SBI1 register. All
of these bits can be read/written by firmware.
Table 13. Serial Bus Interrupt Enable Register 1 (SBIE1)—Address: 17H; Default: 0000 0000B
This register enables and disables the receive and transmit done interrupts for function endpoints 4 through 7.
Bit 7
FRXIE7
Bit 6
FTXIE7
Bit 5
FRXIE6
Bit 4
FTXIE6
R/W
Bit* Symbol
7
6
5
4
3
2
1
0
FRXIE7
FTXIE7
FRXIE6
FTXIE6
FRXIE5
FTXIE5
FRXIE4
FTXIE4
Function/Description
Function Receive Interrupt Enable 7.
Enables receive done interrupt for endpoint 7 (FRXD7).
Function Transmit Interrupt Enable 7.
Enables transmit done interrupt for endpoint 7 (FTXD7).
Function Receive Interrupt Enable 6.
Enables receive done interrupt for endpoint 6 (FRXD6).
Function Transmit Interrupt Enable 6.
Enables transmit done interrupt for endpoint 6 (FTXD6).
Function Receive Interrupt Enable 5.
Enables receive done interrupt for endpoint 5 (FRXD5).
Function Transmit Interrupt Enable 5.
Enables transmit done interrupt for endpoint 5 (FTXD5).
Function Receive Interrupt Enable 4.
Enables receive done interrupt for endpoint 4 (FRXD4).
Function Transmit Interrupt Enable 4.
Enables transmit done interrupt for endpoint 4 (FTXD4).
Bit 3
FRXIE5
Bit 2
FTXIE5
Bit 1
FRXIE4
Bit 0
FTXIE4
* For all bits, a 1 indicates that the interrupt is enabled and causes an interrupt to be signaled to the microcontroller. A 0 indicates that the asso-
ciated interrupt source is disabled and cannot cause an interrupt. However, the interrupt bit’s value is still reflected in the SBI/SBI1 register. All
of these bits can be read/written by firmware.
Agere Systems Inc.
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