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OR3T80-6PS240 参数 Datasheet PDF下载

OR3T80-6PS240图片预览
型号: OR3T80-6PS240
PDF下载: 下载PDF文件 查看货源
内容描述: 3C和3T现场可编程门阵列 [3C and 3T Field-Programmable Gate Arrays]
分类和应用: 现场可编程门阵列可编程逻辑
文件页数/大小: 210 页 / 4391 K
品牌: AGERE [ AGERE SYSTEMS ]
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Data Sheet
June 1999
ORCA
Series 3C and 3T FPGAs
Timing Characteristics
(continued)
Table 64. Slave Serial Configuration Mode Timing Characteristics
OR3Cxx Commercial: V
DD
= 5.0 V ± 5%, 0 °C
<
T
A
<
70 °C; Industrial: V
DD
= 5.0 V ± 10%, –40 °C
<
T
A
<
+85 °C.
OR3Txxx Commercial: V
DD
= 3.0 V to 3.6 V, 0 °C
<
T
A
<
70 °C; Industrial: V
DD
= 3.0 V to 3.6 V, –40 °C
<
T
A
<
+85 °C.
Parameter
DIN Setup Time:
3Cxx
3Txxx
DIN Hold Time
CCLK High Time:
3Cxx
3Txxx
CCLK Low Time:
3Cxx
3Txxx
CCLK Frequency:
3Cxx
3Txxx
CCLK to DOUT
Symbol
T
S
Min
20.00
10.50
Max
25.00
66.00
20.00
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
T
H
T
CH
0.00
20.00
7.00
T
CL
20.00
7.00
F
C
T
D
Note: Serial configuration data is transmitted out on DOUT on the falling edge of CCLK after it is input on DIN.
DIN
T
S
CCLK
T
D
DOUT
BIT N
T
H
T
CL
T
CH
BIT N
5-4535(F).
Figure 86. Slave Serial Configuration Mode Timing Diagram
Lucent Technologies Inc.
139