[AK4621]
DC CHARACTERISTICS
(Ta=25°C; AVDD=4.75
∼
5.25V; DVDD=3.0
∼
3.6V, TVDD=DVDD
∼
5.25V)
Parameter
Symbol
min
High-Level Input Voltage
VIH
70%DVDD
Low-Level Input Voltage
VIL
-
High-Level Output Voltage (Iout=-100μA)
VOH
DVDD-0.5
VOL
-
Low-Level Output Voltage (Iout=100μA)
Input Leakage Current
Iin
-
typ
-
-
-
-
-
max
TVDD
30%DVDD
-
0.5
±10
Units
V
V
V
V
μA
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD=4.75
∼
5.25V; DVDD=3.0
∼
3.6V, TVDD=DVDD
∼
5.25V; C
L
=20pF)
Parameter
Symbol
min
typ
max
Units
Master Clock Timing
Frequency
fCLK
8.192
-
55.296
MHz
Pulse Width Low
tCLKL
0.4/fCLK
-
-
ns
Pulse Width High
tCLKH
0.4/fCLK
-
-
ns
LRCK Frequency
fsn
32
-
54
kHz
Normal Speed Mode (DFS0=“0”, DFS1=“0”)
fsd
54
-
108
kHz
Double Speed Mode (DFS0=“1”, DFS1=“0”)
fsq
108
-
216
kHz
Quad Speed Mode (DFS0=“0”, DFS1=“1”)
45
-
55
%
Duty Cycle
PCM Audio Interface Timing
BICK Period
Normal Speed Mode
tBCK
1/128fsn
-
-
ns
Double Speed Mode
tBCK
1/64fsd
-
-
ns
Quad Speed Mode
tBCK
1/64fsq
-
-
ns
BICK Pulse Width Low
tBCKL
33
-
-
ns
Pulse Width High
tBCKH
33
-
-
ns
LRCK Edge to BICK “↑”
tLRB
20
-
-
ns
tBLR
20
-
-
ns
BICK “↑” to LRCK Edge
2
tLRS
-
-
20
ns
LRCK to SDTO (MSB) (Except I S mode)
tBSD
-
-
20
ns
BICK “↓” to SDTO
tSDH
20
-
-
ns
SDTI Hold Time
tSDS
20
-
-
ns
SDTI Setup Time
Note 20. When the normal/double/quad speed modes are switched, the AK4621 must be reset by the PDN pin or RSTN
bit.
Note 21. BICK rising edge must not occur at the same time as LRCK edge.
MS1258-E-01
- 15 -
2011/01
AKM [ ASAHI KASEI MICROSYSTEMS ]
