3966
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL BLOCK DIAGRAM
OUT 1A
OUT 1B
V CC
PHASE
1
V BB
PHASE 2
+
LOGIC
SUPPLY
OUT 2A
OUT 2B
LOAD
SUPPLY
UVLO
& TSD
CONTROL LOGIC1
CONTROL LOGIC2
UVLO
& TSD
ENABLE
1
SOURCE
ENABLE 1
ENABLE 2
CURRENT-SENSE
COMPARATOR
1
SENSE
1
SENSE
2
CURRENT-SENSE
COMPARATOR
2
PWM LATCH
1
R
Q
S
BLANKING
GATE
1
+
–
+
–
BLANKING
GATE
2
PWM LATCH
2
R
Q
S
÷4
OSC
RC
R1S
R 2S
SOURCE
ENABLE 2
GROUND
RT
CT
REFERENCE
Dwg. FP-036-6
A3966SA
(DIP)
SENSE
1
OUT
1B
LOAD
SUPPLY
REFERENCE
RC
LOGIC
SUPPLY
OUT
2B
SENSE
2
1
LOGIC
TRUTH TABLE
16
15
14
ENABLE
1
PHASE
1
OUT
1A
GROUND
GROUND
OUT
2A
PHASE
2
ENABLE
2
2
3
4
5
6
7
8
V
REF
RC
V
PHASE
X
H
L
ENABLE
H
L
L
OUT
A
Off
H
L
OUT
B
Off
L
H
V
BB
13
12
11
X = Irrelevant
CC
LOGIC
10
9
Dwg. PP-066-2
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1998, 2003 Allegro MicroSystems, Inc.
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
